From: Rajesh Patil <rajpat@codeaurora.org>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Rob Herring <robh+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, rnayak@codeaurora.org,
saiprakash.ranjan@codeaurora.org, msavaliy@qti.qualcomm.com,
skakit@codeaurora.org, sboyd@kernel.org, mka@chromium.org,
dianders@chromium.org, Rajesh Patil <rajpat@codeaurora.org>
Subject: [PATCH V7 0/7] Add QSPI and QUPv3 DT nodes for SC7280 SoC
Date: Fri, 3 Sep 2021 09:58:53 +0530 [thread overview]
Message-ID: <1630643340-10373-1-git-send-email-rajpat@codeaurora.org> (raw)
Changes in V7:
- As per Stephen's comments
1. Moved qup_opp_table under /soc@0/geniqup@9c0000
2. Removed qupv3_id_1 in sc7280-idp board file
3. Sorted alias names for i2c and spi as per alphabet order
- As per Matthias comment
Configuring cs pin with gpio (qup_spiN_cs_gpio) definitions are removed
Changes in V6:
- As per Matthias' comments,
1. Squashed "Update QUPv3 UART5 DT node" and "Configure debug uart for sc7280-idp"
2. Moved qup_opp_table from /soc to /
3. Changed convention "clocks" followed by "clock-names"
- As per Doug comments, added aliases for i2c and spi
Changes in V5:
- As per Matthias' comments, I've split the patches as below:
1. Add QSPI node
2. Configure SPI-NOR FLASH for sc7280-idp
3. Add QUPv3 wrapper_0 nodes
4. Update QUPv3 UART5 DT node
5. Configure debug uart for sc7280-idp
6. Configure uart7 to support bluetooth on sc7280-idp
7. Add QUPv3 wrapper_1 nodes
Changes in V4:
- As per Stephen's comment updated spi-max-frequency to 37.5MHz, moved
qspi_opp_table from /soc to / (root).
- As per Bjorn's comment, added QUP Wrapper_0 nodes
as separate patch and debug-uart node as separate patch.
- Dropped interconnect votes for wrapper_0 and wrapper_1 node
- Corrected QUP Wrapper_1 SE node's pin control functions like below
QUP Wrapper_0: SE0-SE7 uses qup00 - qup07 pin-cntrl functions.
QUP Wrapper_1: SE0-SE7 uses qup10 - qup17 pin-cntrl functions.
Changes in V3:
- Broken the huge V2 patch into 3 smaller patches.
1. QSPI DT nodes
2. QUP wrapper_0 DT nodes
3. QUP wrapper_1 DT nodes
Changes in V2:
- As per Doug's comments removed pinmux/pinconf subnodes.
- As per Doug's comments split of SPI, UART nodes has been done.
- Moved QSPI node before aps_smmu as per the order.
Rajesh Patil (3):
arm64: dts: sc7280: Configure SPI-NOR FLASH for sc7280-idp
arm64: dts: sc7280: Configure uart7 to support bluetooth on sc7280-idp
arm64: dts: sc7280: Add aliases for I2C and SPI
Roja Rani Yarubandi (4):
arm64: dts: sc7280: Add QSPI node
arm64: dts: sc7280: Add QUPv3 wrapper_0 nodes
arm64: dts: sc7280: Update QUPv3 UART5 DT node
arm64: dts: sc7280: Add QUPv3 wrapper_1 nodes
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 125 ++-
arch/arm64/boot/dts/qcom/sc7280.dtsi | 1520 +++++++++++++++++++++++++++++-
2 files changed, 1628 insertions(+), 17 deletions(-)
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
next reply other threads:[~2021-09-03 4:29 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-03 4:28 Rajesh Patil [this message]
2021-09-03 4:28 ` [PATCH V7 1/7] arm64: dts: sc7280: Add QSPI node Rajesh Patil
2021-09-03 15:54 ` Matthias Kaehlcke
2021-09-03 16:28 ` Doug Anderson
2021-09-16 4:31 ` rajpat
2021-09-03 4:28 ` [PATCH V7 2/7] arm64: dts: sc7280: Configure SPI-NOR FLASH for sc7280-idp Rajesh Patil
2021-09-03 4:28 ` [PATCH V7 3/7] arm64: dts: sc7280: Add QUPv3 wrapper_0 nodes Rajesh Patil
2021-09-03 16:33 ` Matthias Kaehlcke
2021-09-09 4:46 ` rajpat
2021-09-09 14:06 ` Matthias Kaehlcke
2021-09-03 4:28 ` [PATCH V7 4/7] arm64: dts: sc7280: Update QUPv3 UART5 DT node Rajesh Patil
2021-09-03 4:28 ` [PATCH V7 5/7] arm64: dts: sc7280: Configure uart7 to support bluetooth on sc7280-idp Rajesh Patil
2021-09-03 4:28 ` [PATCH V7 6/7] arm64: dts: sc7280: Add QUPv3 wrapper_1 nodes Rajesh Patil
2021-09-03 17:22 ` Matthias Kaehlcke
2021-09-09 4:44 ` rajpat
2021-09-09 14:07 ` Matthias Kaehlcke
2021-09-03 4:29 ` [PATCH V7 7/7] arm64: dts: sc7280: Add aliases for I2C and SPI Rajesh Patil
2021-09-03 19:01 ` Stephen Boyd
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1630643340-10373-1-git-send-email-rajpat@codeaurora.org \
--to=rajpat@codeaurora.org \
--cc=agross@kernel.org \
--cc=bjorn.andersson@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=dianders@chromium.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mka@chromium.org \
--cc=msavaliy@qti.qualcomm.com \
--cc=rnayak@codeaurora.org \
--cc=robh+dt@kernel.org \
--cc=saiprakash.ranjan@codeaurora.org \
--cc=sboyd@kernel.org \
--cc=skakit@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).