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From: Rajesh Patil <rajpat@codeaurora.org>
To: Andy Gross <agross@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Rob Herring <robh+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, rnayak@codeaurora.org,
	saiprakash.ranjan@codeaurora.org, msavaliy@qti.qualcomm.com,
	skakit@codeaurora.org, sboyd@kernel.org, mka@chromium.org,
	dianders@chromium.org, Roja Rani Yarubandi <rojay@codeaurora.org>,
	Rajesh Patil <rajpat@codeaurora.org>
Subject: [PATCH V7 1/7] arm64: dts: sc7280: Add QSPI node
Date: Fri,  3 Sep 2021 09:58:54 +0530	[thread overview]
Message-ID: <1630643340-10373-2-git-send-email-rajpat@codeaurora.org> (raw)
In-Reply-To: <1630643340-10373-1-git-send-email-rajpat@codeaurora.org>

From: Roja Rani Yarubandi <rojay@codeaurora.org>

Add QSPI DT node and qspi_opp_table for SC7280 SoC.

Move qspi_opp_table to / because SPI nodes assume
any child node is a spi device and so we can't put the
table underneath the spi controller.

Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org>
Signed-off-by: Rajesh Patil <rajpat@codeaurora.org>
---
 arch/arm64/boot/dts/qcom/sc7280.dtsi | 61 ++++++++++++++++++++++++++++++++++++
 1 file changed, 61 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 53a21d0..7ec9871 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -415,6 +415,25 @@
 		method = "smc";
 	};
 
+	qspi_opp_table: qspi-opp-table {
+		compatible = "operating-points-v2";
+
+		opp-75000000 {
+			opp-hz = /bits/ 64 <75000000>;
+			required-opps = <&rpmhpd_opp_low_svs>;
+		};
+
+		opp-150000000 {
+			opp-hz = /bits/ 64 <150000000>;
+			required-opps = <&rpmhpd_opp_svs>;
+		};
+
+		opp-300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			required-opps = <&rpmhpd_opp_nom>;
+		};
+	};
+
 	soc: soc@0 {
 		#address-cells = <2>;
 		#size-cells = <2>;
@@ -1318,6 +1337,23 @@
 			};
 		};
 
+		qspi: spi@88dc000 {
+			compatible = "qcom,qspi-v1";
+			reg = <0 0x088dc000 0 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
+				 <&gcc GCC_QSPI_CORE_CLK>;
+			clock-names = "iface", "core";
+			interconnects = <&gem_noc MASTER_APPSS_PROC 0
+					&cnoc2 SLAVE_QSPI_0 0>;
+			interconnect-names = "qspi-config";
+			power-domains = <&rpmhpd SC7280_CX>;
+			operating-points-v2 = <&qspi_opp_table>;
+			status = "disabled";
+		};
+
 		dc_noc: interconnect@90e0000 {
 			reg = <0 0x090e0000 0 0x5080>;
 			compatible = "qcom,sc7280-dc-noc";
@@ -1513,6 +1549,31 @@
 			gpio-ranges = <&tlmm 0 0 175>;
 			wakeup-parent = <&pdc>;
 
+			qspi_clk: qspi-clk {
+				pins = "gpio14";
+				function = "qspi_clk";
+			};
+
+			qspi_cs0: qspi-cs0 {
+				pins = "gpio15";
+				function = "qspi_cs";
+			};
+
+			qspi_cs1: qspi-cs1 {
+				pins = "gpio19";
+				function = "qspi_cs";
+			};
+
+			qspi_data01: qspi-data01 {
+				pins = "gpio12", "gpio13";
+				function = "qspi_data";
+			};
+
+			qspi_data12: qspi-data12 {
+				pins = "gpio16", "gpio17";
+				function = "qspi_data";
+			};
+
 			qup_uart5_default: qup-uart5-default {
 				pins = "gpio46", "gpio47";
 				function = "qup13";
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member 
of Code Aurora Forum, hosted by The Linux Foundation


  reply	other threads:[~2021-09-03  4:30 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-03  4:28 [PATCH V7 0/7] Add QSPI and QUPv3 DT nodes for SC7280 SoC Rajesh Patil
2021-09-03  4:28 ` Rajesh Patil [this message]
2021-09-03 15:54   ` [PATCH V7 1/7] arm64: dts: sc7280: Add QSPI node Matthias Kaehlcke
2021-09-03 16:28   ` Doug Anderson
2021-09-16  4:31     ` rajpat
2021-09-03  4:28 ` [PATCH V7 2/7] arm64: dts: sc7280: Configure SPI-NOR FLASH for sc7280-idp Rajesh Patil
2021-09-03  4:28 ` [PATCH V7 3/7] arm64: dts: sc7280: Add QUPv3 wrapper_0 nodes Rajesh Patil
2021-09-03 16:33   ` Matthias Kaehlcke
2021-09-09  4:46     ` rajpat
2021-09-09 14:06       ` Matthias Kaehlcke
2021-09-03  4:28 ` [PATCH V7 4/7] arm64: dts: sc7280: Update QUPv3 UART5 DT node Rajesh Patil
2021-09-03  4:28 ` [PATCH V7 5/7] arm64: dts: sc7280: Configure uart7 to support bluetooth on sc7280-idp Rajesh Patil
2021-09-03  4:28 ` [PATCH V7 6/7] arm64: dts: sc7280: Add QUPv3 wrapper_1 nodes Rajesh Patil
2021-09-03 17:22   ` Matthias Kaehlcke
2021-09-09  4:44     ` rajpat
2021-09-09 14:07       ` Matthias Kaehlcke
2021-09-03  4:29 ` [PATCH V7 7/7] arm64: dts: sc7280: Add aliases for I2C and SPI Rajesh Patil
2021-09-03 19:01   ` Stephen Boyd

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