From: "tip-bot2 for Thomas Gleixner" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>,
Borislav Petkov <bp@suse.de>,
x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: x86/fpu] x86/fpu/signal: Move header zeroing out of xsave_to_user_sigframe()
Date: Tue, 14 Sep 2021 19:19:30 -0000 [thread overview]
Message-ID: <163164717015.25758.13064322936965435358.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20210908132525.621674721@linutronix.de>
The following commit has been merged into the x86/fpu branch of tip:
Commit-ID: 4164a482a5d92c29eaf53d01755103f6bbce38f2
Gitweb: https://git.kernel.org/tip/4164a482a5d92c29eaf53d01755103f6bbce38f2
Author: Thomas Gleixner <tglx@linutronix.de>
AuthorDate: Wed, 08 Sep 2021 15:29:29 +02:00
Committer: Borislav Petkov <bp@suse.de>
CommitterDate: Tue, 14 Sep 2021 21:10:03 +02:00
x86/fpu/signal: Move header zeroing out of xsave_to_user_sigframe()
There is no reason to have the header zeroing in the pagefault disabled
region. Do it upfront once.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20210908132525.621674721@linutronix.de
---
arch/x86/include/asm/fpu/internal.h | 17 ++++++-----------
arch/x86/kernel/fpu/signal.c | 12 ++++++++++++
2 files changed, 18 insertions(+), 11 deletions(-)
diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h
index 4cfd40d..c856ca4 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -318,9 +318,12 @@ static inline void os_xrstor(struct xregs_state *xstate, u64 mask)
* We don't use modified optimization because xrstor/xrstors might track
* a different application.
*
- * We don't use compacted format xsave area for
- * backward compatibility for old applications which don't understand
- * compacted format of xsave area.
+ * We don't use compacted format xsave area for backward compatibility for
+ * old applications which don't understand the compacted format of the
+ * xsave area.
+ *
+ * The caller has to zero buf::header before calling this because XSAVE*
+ * does not touch the reserved fields in the header.
*/
static inline int xsave_to_user_sigframe(struct xregs_state __user *buf)
{
@@ -334,14 +337,6 @@ static inline int xsave_to_user_sigframe(struct xregs_state __user *buf)
u32 hmask = mask >> 32;
int err;
- /*
- * Clear the xsave header first, so that reserved fields are
- * initialized to zero.
- */
- err = __clear_user(&buf->header, sizeof(buf->header));
- if (unlikely(err))
- return -EFAULT;
-
stac();
XSTATE_OP(XSAVE, buf, lmask, hmask, err);
clac();
diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c
index 9bfffdb..5ca3ce9 100644
--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -189,6 +189,18 @@ int copy_fpstate_to_sigframe(void __user *buf, void __user *buf_fx, int size)
if (!access_ok(buf, size))
return -EACCES;
+
+ if (use_xsave()) {
+ struct xregs_state __user *xbuf = buf_fx;
+
+ /*
+ * Clear the xsave header first, so that reserved fields are
+ * initialized to zero.
+ */
+ ret = __clear_user(&xbuf->header, sizeof(xbuf->header));
+ if (unlikely(ret))
+ return ret;
+ }
retry:
/*
* Load the FPU registers if they are not valid for the current task.
next prev parent reply other threads:[~2021-09-14 19:19 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-08 13:29 [patch V3 00/20] x86/fpu: Clean up exception fixups and error handling in sigframe related code Thomas Gleixner
2021-09-08 13:29 ` [patch V3 01/20] x86/extable: Tidy up redundant handler functions Thomas Gleixner
2021-09-14 19:19 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-09-08 13:29 ` [patch V3 02/20] x86/extable: Get rid of redundant macros Thomas Gleixner
2021-09-14 19:19 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-09-08 13:29 ` [patch V3 03/20] x86/mce: Deduplicate exception handling Thomas Gleixner
2021-09-14 19:19 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-09-08 13:29 ` [patch V3 04/20] x86/mce: Get rid of stray semicolons Thomas Gleixner
2021-09-14 19:19 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-09-08 13:29 ` [patch V3 05/20] x86/extable: Rework the exception table mechanics Thomas Gleixner
2021-09-14 19:19 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-09-08 13:29 ` [patch V3 06/20] x86/extable: Provide EX_TYPE_DEFAULT_MCE_SAFE and EX_TYPE_FAULT_MCE_SAFE Thomas Gleixner
2021-09-14 19:19 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-09-08 13:29 ` [patch V3 07/20] x86/copy_mc: Use EX_TYPE_DEFAULT_MCE_SAFE for exception fixups Thomas Gleixner
2021-09-14 19:19 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-09-08 13:29 ` [patch V3 08/20] x86/fpu: Use EX_TYPE_FAULT_MCE_SAFE " Thomas Gleixner
2021-09-14 19:19 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-09-08 13:29 ` [patch V3 09/20] x86/extable: Remove EX_TYPE_FAULT from MCE safe fixups Thomas Gleixner
2021-09-14 19:19 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-09-08 13:29 ` [patch V3 10/20] x86/fpu/signal: Clarify exception handling in restore_fpregs_from_user() Thomas Gleixner
2021-09-14 19:19 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-09-08 13:29 ` [patch V3 11/20] x86/fpu: Dont use MCE safe fixups for writing FPU state to user space Thomas Gleixner
2021-09-08 13:29 ` [patch V3 12/20] x86/fpu/signal: Move header zeroing out of xsave_to_user_sigframe() Thomas Gleixner
2021-09-14 19:19 ` tip-bot2 for Thomas Gleixner [this message]
2021-09-08 13:29 ` [patch V3 13/20] x86/fpu/signal: Move xstate clearing out of copy_fpregs_to_sigframe() Thomas Gleixner
2021-09-14 19:19 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-09-08 13:29 ` [patch V3 14/20] x86/fpu/signal: Change return type of copy_fpstate_to_sigframe() to boolean Thomas Gleixner
2021-09-14 19:19 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-09-08 13:29 ` [patch V3 15/20] x86/fpu/signal: Change return type of copy_fpregs_to_sigframe() helpers " Thomas Gleixner
2021-09-14 19:19 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-09-21 10:58 ` [patch V3 15/20] " Anders Roxell
2021-09-21 17:35 ` Nick Desaulniers
2021-09-22 18:23 ` Nick Desaulniers
2021-09-21 20:13 ` Thomas Gleixner
2021-09-22 19:42 ` Anders Roxell
2021-09-08 13:29 ` [patch V3 16/20] x86/signal: Change return type of restore_sigcontext() " Thomas Gleixner
2021-09-14 19:19 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-09-08 13:29 ` [patch V3 17/20] x86/fpu/signal: Change return type of fpu__restore_sig() " Thomas Gleixner
2021-09-14 19:19 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-09-08 13:29 ` [patch V3 18/20] x86/fpu/signal: Change return type of __fpu_restore_sig() " Thomas Gleixner
2021-09-14 19:19 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-09-08 13:29 ` [patch V3 19/20] x86/fpu/signal: Change return code of check_xstate_in_sigframe() " Thomas Gleixner
2021-09-14 19:19 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-09-08 13:29 ` [patch V3 20/20] x86/fpu/signal: Change return code of restore_fpregs_from_user() " Thomas Gleixner
2021-09-14 19:19 ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2021-09-08 15:57 ` [patch V3 00/20] x86/fpu: Clean up exception fixups and error handling in sigframe related code Luck, Tony
2021-09-08 17:01 ` Luck, Tony
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