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charset="utf-8" Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the objtool/core branch of tip: Commit-ID: 09c413071e2de71d1f28813c560ae0c06b344520 Gitweb: https://git.kernel.org/tip/09c413071e2de71d1f28813c560ae0c06b344520 Author: Peter Zijlstra AuthorDate: Thu, 24 Jun 2021 11:41:20 +02:00 Committer: Peter Zijlstra CommitterDate: Fri, 17 Sep 2021 13:20:23 +02:00 x86/xen: Make irq_disable() noinstr vmlinux.o: warning: objtool: pv_ops[31]: native_irq_disable vmlinux.o: warning: objtool: pv_ops[31]: __raw_callee_save_xen_irq_disable vmlinux.o: warning: objtool: pv_ops[31]: xen_irq_disable_direct vmlinux.o: warning: objtool: lock_is_held_type()+0x5b: call to pv_ops[31]() leaves .noinstr.text section Signed-off-by: Peter Zijlstra (Intel) Reviewed-by: Juergen Gross Link: https://lore.kernel.org/r/20210624095148.933869441@infradead.org --- arch/x86/kernel/paravirt.c | 7 ++++++- arch/x86/xen/irq.c | 4 ++-- arch/x86/xen/xen-asm.S | 3 +-- 3 files changed, 9 insertions(+), 5 deletions(-) diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index 75f0d24..ebc4536 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c @@ -243,6 +243,11 @@ static noinstr void pv_native_irq_enable(void) { native_irq_enable(); } + +static noinstr void pv_native_irq_disable(void) +{ + native_irq_disable(); +} #endif enum paravirt_lazy_mode paravirt_get_lazy_mode(void) @@ -306,7 +311,7 @@ struct paravirt_patch_template pv_ops = { /* Irq ops. */ .irq.save_fl = __PV_IS_CALLEE_SAVE(native_save_fl), - .irq.irq_disable = __PV_IS_CALLEE_SAVE(native_irq_disable), + .irq.irq_disable = __PV_IS_CALLEE_SAVE(pv_native_irq_disable), .irq.irq_enable = __PV_IS_CALLEE_SAVE(pv_native_irq_enable), .irq.safe_halt = native_safe_halt, .irq.halt = native_halt, diff --git a/arch/x86/xen/irq.c b/arch/x86/xen/irq.c index 7fb4cf2..f52b60d 100644 --- a/arch/x86/xen/irq.c +++ b/arch/x86/xen/irq.c @@ -42,7 +42,7 @@ asmlinkage __visible noinstr unsigned long xen_save_fl(void) } __PV_CALLEE_SAVE_REGS_THUNK(xen_save_fl, ".noinstr.text"); -asmlinkage __visible void xen_irq_disable(void) +asmlinkage __visible noinstr void xen_irq_disable(void) { /* There's a one instruction preempt window here. We need to make sure we're don't switch CPUs between getting the vcpu @@ -51,7 +51,7 @@ asmlinkage __visible void xen_irq_disable(void) this_cpu_read(xen_vcpu)->evtchn_upcall_mask = 1; preempt_enable_no_resched(); } -PV_CALLEE_SAVE_REGS_THUNK(xen_irq_disable); +__PV_CALLEE_SAVE_REGS_THUNK(xen_irq_disable, ".noinstr.text"); asmlinkage __visible noinstr void xen_irq_enable(void) { diff --git a/arch/x86/xen/xen-asm.S b/arch/x86/xen/xen-asm.S index 2225195..220dd96 100644 --- a/arch/x86/xen/xen-asm.S +++ b/arch/x86/xen/xen-asm.S @@ -21,6 +21,7 @@ #include #include +.pushsection .noinstr.text, "ax" /* * Disabling events is simply a matter of making the event mask * non-zero. @@ -30,8 +31,6 @@ SYM_FUNC_START(xen_irq_disable_direct) ret SYM_FUNC_END(xen_irq_disable_direct) -.pushsection .noinstr.text, "ax" - /* * Force an event check by making a hypercall, but preserve regs * before making the call.