From: Rajesh Patil <rajpat@codeaurora.org>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Rob Herring <robh+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, rnayak@codeaurora.org,
saiprakash.ranjan@codeaurora.org, msavaliy@qti.qualcomm.com,
skakit@codeaurora.org, sboyd@kernel.org, mka@chromium.org,
dianders@chromium.org, Rajesh Patil <rajpat@codeaurora.org>
Subject: [PATCH V10 6/8] arm64: dts: sc7280: Configure uart7 to support bluetooth on sc7280-idp
Date: Thu, 23 Sep 2021 17:46:16 +0530 [thread overview]
Message-ID: <1632399378-12229-7-git-send-email-rajpat@codeaurora.org> (raw)
In-Reply-To: <1632399378-12229-1-git-send-email-rajpat@codeaurora.org>
Add bluetooth uart pin configuration for sc7280-idp.
Signed-off-by: Rajesh Patil <rajpat@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
---
Changes in V10:
- No changes
Changes in V9:
- No changes
Change in V8:
- No changes
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 85 ++++++++++++++++++++++++++++++++
1 file changed, 85 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index cf82301..52638e2 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -301,6 +301,16 @@
vdda18-supply = <&vreg_l1c_1p8>;
};
+&uart7 {
+ status = "okay";
+
+ /delete-property/interrupts;
+ interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>,
+ <&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
+};
+
/* PINCTRL - additions to nodes defined in sc7280.dtsi */
&qspi_cs0 {
@@ -326,6 +336,81 @@
bias-pull-up;
};
+&qup_uart7_cts {
+ /*
+ * Configure a pull-down on CTS to match the pull of
+ * the Bluetooth module.
+ */
+ bias-pull-down;
+};
+
+&qup_uart7_rts {
+ /* We'll drive RTS, so no pull */
+ drive-strength = <2>;
+ bias-disable;
+};
+
+&qup_uart7_tx {
+ /* We'll drive TX, so no pull */
+ drive-strength = <2>;
+ bias-disable;
+};
+
+&qup_uart7_rx {
+ /*
+ * Configure a pull-up on RX. This is needed to avoid
+ * garbage data when the TX pin of the Bluetooth module is
+ * in tri-state (module powered off or not driving the
+ * signal yet).
+ */
+ bias-pull-up;
+};
+
+&tlmm {
+ qup_uart7_sleep_cts: qup-uart7-sleep-cts {
+ pins = "gpio28";
+ function = "gpio";
+ /*
+ * Configure a pull-down on CTS to match the pull of
+ * the Bluetooth module.
+ */
+ bias-pull-down;
+ };
+
+ qup_uart7_sleep_rts: qup-uart7-sleep-rts {
+ pins = "gpio29";
+ function = "gpio";
+ /*
+ * Configure pull-down on RTS. As RTS is active low
+ * signal, pull it low to indicate the BT SoC that it
+ * can wakeup the system anytime from suspend state by
+ * pulling RX low (by sending wakeup bytes).
+ */
+ bias-pull-down;
+ };
+
+ qup_uart7_sleep_tx: qup-uart7-sleep-tx {
+ pins = "gpio30";
+ function = "gpio";
+ /*
+ * Configure pull-up on TX when it isn't actively driven
+ * to prevent BT SoC from receiving garbage during sleep.
+ */
+ bias-pull-up;
+ };
+
+ qup_uart7_sleep_rx: qup-uart7-sleep-rx {
+ pins = "gpio31";
+ function = "gpio";
+ /*
+ * Configure a pull-up on RX. This is needed to avoid
+ * garbage data when the TX pin of the Bluetooth module
+ * is floating which may cause spurious wakeups.
+ */
+ bias-pull-up;
+ };
+};
+
&sdc1_on {
clk {
bias-disable;
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2021-09-23 12:17 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-23 12:16 [PATCH V10 0/8] Add QSPI and QUPv3 DT nodes for SC7280 SoC Rajesh Patil
2021-09-23 12:16 ` [PATCH V10 1/8] dt-bindings: spi: Add sc7280 support Rajesh Patil
2021-09-23 22:37 ` Rob Herring
2021-09-23 22:45 ` Doug Anderson
2021-09-24 0:40 ` Rob Herring
2021-09-24 1:00 ` Rob Herring
2021-09-24 22:47 ` Bjorn Andersson
2021-09-27 6:47 ` rajpat
2021-09-23 12:16 ` [PATCH V10 2/8] arm64: dts: sc7280: Add QSPI node Rajesh Patil
2021-09-23 12:16 ` [PATCH V10 3/8] arm64: dts: sc7280: Configure SPI-NOR FLASH for sc7280-idp Rajesh Patil
2021-09-23 12:16 ` [PATCH V10 4/8] arm64: dts: sc7280: Add QUPv3 wrapper_0 nodes Rajesh Patil
2021-09-23 21:25 ` Stephen Boyd
2021-09-23 12:16 ` [PATCH V10 5/8] arm64: dts: sc7280: Update QUPv3 UART5 DT node Rajesh Patil
2021-09-23 12:16 ` Rajesh Patil [this message]
2021-09-23 12:16 ` [PATCH V10 7/8] arm64: dts: sc7280: Add QUPv3 wrapper_1 nodes Rajesh Patil
2021-09-23 12:16 ` [PATCH V10 8/8] arm64: dts: sc7280: Add aliases for I2C and SPI Rajesh Patil
2021-10-19 20:43 ` Arnd Bergmann
2021-10-19 20:59 ` Bjorn Andersson
2021-10-19 21:11 ` Doug Anderson
2021-10-19 21:27 ` Arnd Bergmann
2021-10-19 22:03 ` Doug Anderson
2021-09-23 21:27 ` [PATCH V10 0/8] Add QSPI and QUPv3 DT nodes for SC7280 SoC Stephen Boyd
2021-09-24 22:44 ` Bjorn Andersson
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