From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 63677C433EF for ; Thu, 30 Sep 2021 10:34:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3FF1E61980 for ; Thu, 30 Sep 2021 10:34:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350063AbhI3KgU (ORCPT ); Thu, 30 Sep 2021 06:36:20 -0400 Received: from foss.arm.com ([217.140.110.172]:52052 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350069AbhI3KgN (ORCPT ); Thu, 30 Sep 2021 06:36:13 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D9D31113E; Thu, 30 Sep 2021 03:34:30 -0700 (PDT) Received: from p8cg001049571a15.arm.com (unknown [10.163.73.203]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A2E5D3F793; Thu, 30 Sep 2021 03:34:27 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: suzuki.poulose@arm.com, mark.rutland@arm.com, will@kernel.org, catalin.marinas@arm.com, maz@kernel.org, james.morse@arm.com, steven.price@arm.com, Anshuman Khandual Subject: [RFC V3 04/13] arm64/mm: Add FEAT_LPA2 specific VTCR_EL2.DS field Date: Thu, 30 Sep 2021 16:05:07 +0530 Message-Id: <1632998116-11552-5-git-send-email-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1632998116-11552-1-git-send-email-anshuman.khandual@arm.com> References: <1632998116-11552-1-git-send-email-anshuman.khandual@arm.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org As per ARM ARM (0487G.A) VTCR_EL2.DS fields controls whether 52 bit IPA and output physical address get supported on 4K and 16K page size configuration when FEAT_LPA2 is known to have been implemented. This adds VTCR_DS field definition which would be used when FEAT_LPA2 gets enabled in Stage-2. Signed-off-by: Anshuman Khandual --- arch/arm64/include/asm/kvm_arm.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h index 327120c..e5c4236 100644 --- a/arch/arm64/include/asm/kvm_arm.h +++ b/arch/arm64/include/asm/kvm_arm.h @@ -105,6 +105,7 @@ TCR_EL2_ORGN0_MASK | TCR_EL2_IRGN0_MASK | TCR_EL2_T0SZ_MASK) /* VTCR_EL2 Registers bits */ +#define VTCR_EL2_DS (1UL << 32) #define VTCR_EL2_RES1 (1U << 31) #define VTCR_EL2_HD (1 << 22) #define VTCR_EL2_HA (1 << 21) -- 2.7.4