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From: Richard Zhu <hongxing.zhu@nxp.com>
To: l.stach@pengutronix.de, bhelgaas@google.com,
	lorenzo.pieralisi@arm.com, jingoohan1@gmail.com
Cc: linux-pci@vger.kernel.org, linux-imx@nxp.com,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, kernel@pengutronix.de,
	Richard Zhu <hongxing.zhu@nxp.com>
Subject: [PATCH v3 5/7] PCI: dwc: add a new callback host exit function into host ops
Date: Fri, 22 Oct 2021 15:12:28 +0800	[thread overview]
Message-ID: <1634886750-13861-6-git-send-email-hongxing.zhu@nxp.com> (raw)
In-Reply-To: <1634886750-13861-1-git-send-email-hongxing.zhu@nxp.com>

When link is never came up in the link training after host_init.
The clocks and power supplies usage counter balance should be handled
properly on some DWC platforms (for example, i.MX PCIe).

Add a new host_exit() callback into dw_pcie_host_ops, then it could be
invoked to handle the unbalance issue in the error handling after
host_init() function when link is down.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 drivers/pci/controller/dwc/pcie-designware-host.c | 5 ++++-
 drivers/pci/controller/dwc/pcie-designware.h      | 1 +
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index d1d9b8344ec9..9d450e71b93b 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -404,7 +404,7 @@ int dw_pcie_host_init(struct pcie_port *pp)
 	if (!dw_pcie_link_up(pci) && pci->ops && pci->ops->start_link) {
 		ret = pci->ops->start_link(pci);
 		if (ret)
-			goto err_free_msi;
+			goto err_host_init;
 	}
 
 	/* Ignore errors, the link may come up later */
@@ -416,6 +416,9 @@ int dw_pcie_host_init(struct pcie_port *pp)
 	if (!ret)
 		return 0;
 
+err_host_init:
+	if (pp->ops->host_exit)
+		pp->ops->host_exit(pp);
 err_free_msi:
 	if (pp->has_msi_ctrl)
 		dw_pcie_free_msi(pp);
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 7d6e9b7576be..1153687ea9a6 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -174,6 +174,7 @@ enum dw_pcie_device_mode {
 
 struct dw_pcie_host_ops {
 	int (*host_init)(struct pcie_port *pp);
+	void (*host_exit)(struct pcie_port *pp);
 	int (*msi_host_init)(struct pcie_port *pp);
 };
 
-- 
2.25.1


  parent reply	other threads:[~2021-10-22  7:38 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-22  7:12 [PATCH v3 0/7] PCI: imx6: refine codes and add compliance tests mode support Richard Zhu
2021-10-22  7:12 ` [PATCH v3 1/7] PCI: imx6: Encapsulate the clock enable into one standalone function Richard Zhu
2021-10-22  7:12 ` [PATCH v3 2/7] PCI: imx6: Add the error propagation from host_init Richard Zhu
2021-10-22  7:12 ` [PATCH v3 3/7] PCI: imx6: Fix the regulator dump when link never came up Richard Zhu
2021-10-25 11:13   ` Francesco Dolcini
2021-10-25 11:23     ` Mark Brown
2021-10-26  2:18       ` Richard Zhu
2021-10-26  8:52         ` Francesco Dolcini
2021-10-26  9:06           ` Richard Zhu
2021-10-26  9:11             ` Francesco Dolcini
2021-10-26  9:18               ` Richard Zhu
2021-10-26  9:48                 ` Francesco Dolcini
2021-10-28  6:48                   ` Richard Zhu
2021-10-26 10:58         ` Mark Brown
2021-10-28  6:50           ` Richard Zhu
2021-10-28 11:50             ` Mark Brown
2021-10-29  3:58               ` Richard Zhu
2021-10-29 11:46                 ` Mark Brown
2021-11-01  1:46                   ` Richard Zhu
2021-10-26  1:57     ` Richard Zhu
2021-10-22  7:12 ` [PATCH v3 4/7] PCI: imx6: move the clock disable function to a proper place Richard Zhu
2021-10-22  7:12 ` Richard Zhu [this message]
2021-10-22  7:12 ` [PATCH v3 6/7] PCI: imx6: Fix the reference handling unbalance when link never came up Richard Zhu
2021-10-22  7:12 ` [PATCH v3 7/7] PCI: imx6: Add the compliance tests mode support Richard Zhu

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