* [GIT PULL] perf/urgent for v5.16-rc1
@ 2021-11-14 10:41 Borislav Petkov
2021-11-14 17:52 ` pr-tracker-bot
0 siblings, 1 reply; 4+ messages in thread
From: Borislav Petkov @ 2021-11-14 10:41 UTC (permalink / raw)
To: Linus Torvalds; +Cc: x86-ml, lkml
Hi Linus,
please pull a couple of perf/urgent fixes before v5.16-rc1 releases.
Thx.
---
The following changes since commit debe436e77c72fcee804fb867f275e6d31aa999c:
Merge tag 'ext4_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4 (2021-11-10 17:05:37 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git tags/perf_urgent_for_v5.16_rc1
for you to fetch changes up to 4716023a8f6a0f4a28047f14dd7ebdc319606b84:
perf/core: Avoid put_page() when GUP fails (2021-11-11 13:09:34 +0100)
----------------------------------------------------------------
- Prevent unintentional page sharing by checking whether a page
reference to a PMU samples page has been acquired properly before that
- Make sure the LBR_SELECT MSR is saved/restored too
- Reset the LBR_SELECT MSR when resetting the LBR PMU to clear any
residual data left
----------------------------------------------------------------
Greg Thelen (1):
perf/core: Avoid put_page() when GUP fails
Like Xu (1):
perf/x86/vlbr: Add c->flags to vlbr event constraints
Wanpeng Li (1):
perf/x86/lbr: Reset LBR_SELECT during vlbr reset
arch/x86/events/intel/core.c | 4 +++-
arch/x86/events/intel/lbr.c | 2 ++
kernel/events/core.c | 10 +++++-----
3 files changed, 10 insertions(+), 6 deletions(-)
--
Regards/Gruss,
Boris.
SUSE Software Solutions Germany GmbH, GF: Ivo Totev, HRB 36809, AG Nürnberg
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [GIT PULL] perf/urgent for v5.16-rc1
2021-11-14 10:41 [GIT PULL] perf/urgent for v5.16-rc1 Borislav Petkov
@ 2021-11-14 17:52 ` pr-tracker-bot
0 siblings, 0 replies; 4+ messages in thread
From: pr-tracker-bot @ 2021-11-14 17:52 UTC (permalink / raw)
To: Borislav Petkov; +Cc: Linus Torvalds, x86-ml, lkml
The pull request you sent on Sun, 14 Nov 2021 11:41:10 +0100:
> git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git tags/perf_urgent_for_v5.16_rc1
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/f7018be29253b89175d03284f8f49ac4ffed0472
Thank you!
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* Re: [GIT pull] perf/urgent for v5.16-rc1
2021-11-21 15:09 [GIT pull] " Thomas Gleixner
@ 2021-11-21 19:39 ` pr-tracker-bot
0 siblings, 0 replies; 4+ messages in thread
From: pr-tracker-bot @ 2021-11-21 19:39 UTC (permalink / raw)
To: Thomas Gleixner; +Cc: Linus Torvalds, linux-kernel, x86
The pull request you sent on Sun, 21 Nov 2021 16:09:26 +0100 (CET):
> git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git perf-urgent-2021-11-21
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/af16bdeae8e036942590a2c1f4227fecda477e7a
Thank you!
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* [GIT pull] perf/urgent for v5.16-rc1
@ 2021-11-21 15:09 Thomas Gleixner
2021-11-21 19:39 ` pr-tracker-bot
0 siblings, 1 reply; 4+ messages in thread
From: Thomas Gleixner @ 2021-11-21 15:09 UTC (permalink / raw)
To: Linus Torvalds; +Cc: linux-kernel, x86
Linus,
please pull the latest perf/urgent branch from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git perf-urgent-2021-11-21
up to: f3fd84a3b775: x86/perf: Fix snapshot_branch_stack warning in VM
A set of perf/X86 fixes:
- Remove unneded PEBS disabling when taking LBR snapshots to prevent an
unchecked MSR access error.
- Fix IIO event constraints for Snowridge and Skylake server chips.
Thanks,
tglx
------------------>
Alexander Antonov (3):
perf/x86/intel/uncore: Fix filter_tid mask for CHA events on Skylake Server
perf/x86/intel/uncore: Fix IIO event constraints for Skylake Server
perf/x86/intel/uncore: Fix IIO event constraints for Snowridge
Song Liu (1):
x86/perf: Fix snapshot_branch_stack warning in VM
arch/x86/events/intel/core.c | 2 --
arch/x86/events/intel/uncore_snbep.c | 12 ++++++++++++
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 42cf01ecdd13..ec6444f2c9dc 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -2211,7 +2211,6 @@ intel_pmu_snapshot_branch_stack(struct perf_branch_entry *entries, unsigned int
/* must not have branches... */
local_irq_save(flags);
__intel_pmu_disable_all(false); /* we don't care about BTS */
- __intel_pmu_pebs_disable_all();
__intel_pmu_lbr_disable();
/* ... until here */
return __intel_pmu_snapshot_branch_stack(entries, cnt, flags);
@@ -2225,7 +2224,6 @@ intel_pmu_snapshot_arch_branch_stack(struct perf_branch_entry *entries, unsigned
/* must not have branches... */
local_irq_save(flags);
__intel_pmu_disable_all(false); /* we don't care about BTS */
- __intel_pmu_pebs_disable_all();
__intel_pmu_arch_lbr_disable();
/* ... until here */
return __intel_pmu_snapshot_branch_stack(entries, cnt, flags);
diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index eb2c6cea9d0d..3660f698fb2a 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -3608,6 +3608,9 @@ static int skx_cha_hw_config(struct intel_uncore_box *box, struct perf_event *ev
struct hw_perf_event_extra *reg1 = &event->hw.extra_reg;
struct extra_reg *er;
int idx = 0;
+ /* Any of the CHA events may be filtered by Thread/Core-ID.*/
+ if (event->hw.config & SNBEP_CBO_PMON_CTL_TID_EN)
+ idx = SKX_CHA_MSR_PMON_BOX_FILTER_TID;
for (er = skx_uncore_cha_extra_regs; er->msr; er++) {
if (er->event != (event->hw.config & er->config_mask))
@@ -3675,6 +3678,7 @@ static struct event_constraint skx_uncore_iio_constraints[] = {
UNCORE_EVENT_CONSTRAINT(0xc0, 0xc),
UNCORE_EVENT_CONSTRAINT(0xc5, 0xc),
UNCORE_EVENT_CONSTRAINT(0xd4, 0xc),
+ UNCORE_EVENT_CONSTRAINT(0xd5, 0xc),
EVENT_CONSTRAINT_END
};
@@ -4525,6 +4529,13 @@ static void snr_iio_cleanup_mapping(struct intel_uncore_type *type)
pmu_iio_cleanup_mapping(type, &snr_iio_mapping_group);
}
+static struct event_constraint snr_uncore_iio_constraints[] = {
+ UNCORE_EVENT_CONSTRAINT(0x83, 0x3),
+ UNCORE_EVENT_CONSTRAINT(0xc0, 0xc),
+ UNCORE_EVENT_CONSTRAINT(0xd5, 0xc),
+ EVENT_CONSTRAINT_END
+};
+
static struct intel_uncore_type snr_uncore_iio = {
.name = "iio",
.num_counters = 4,
@@ -4536,6 +4547,7 @@ static struct intel_uncore_type snr_uncore_iio = {
.event_mask_ext = SNR_IIO_PMON_RAW_EVENT_MASK_EXT,
.box_ctl = SNR_IIO_MSR_PMON_BOX_CTL,
.msr_offset = SNR_IIO_MSR_OFFSET,
+ .constraints = snr_uncore_iio_constraints,
.ops = &ivbep_uncore_msr_ops,
.format_group = &snr_uncore_iio_format_group,
.attr_update = snr_iio_attr_update,
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2021-11-14 10:41 [GIT PULL] perf/urgent for v5.16-rc1 Borislav Petkov
2021-11-14 17:52 ` pr-tracker-bot
2021-11-21 15:09 [GIT pull] " Thomas Gleixner
2021-11-21 19:39 ` pr-tracker-bot
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