* [PATCH] arm64/mm: Consolidate TCR_EL1 fields
@ 2022-01-25 14:38 Anshuman Khandual
2022-02-15 23:18 ` Will Deacon
0 siblings, 1 reply; 6+ messages in thread
From: Anshuman Khandual @ 2022-01-25 14:38 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Anshuman Khandual, Catalin Marinas, Will Deacon, linux-kernel
This renames and moves SYS_TCR_EL1_TCMA1 and SYS_TCR_EL1_TCMA0 definitions
into pgtable-hwdef.h thus consolidating all TCR fields in a single header.
This does not cause any functional change.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
This applies on v5.17-rc1
This was earlier posted with FEAT_LPA2 series.
https://lore.kernel.org/all/1632998116-11552-3-git-send-email-anshuman.khandual@arm.com/
arch/arm64/include/asm/pgtable-hwdef.h | 2 ++
arch/arm64/include/asm/sysreg.h | 4 ----
arch/arm64/mm/proc.S | 2 +-
3 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h
index 40085e53f573..66671ff05183 100644
--- a/arch/arm64/include/asm/pgtable-hwdef.h
+++ b/arch/arm64/include/asm/pgtable-hwdef.h
@@ -273,6 +273,8 @@
#define TCR_NFD1 (UL(1) << 54)
#define TCR_E0PD0 (UL(1) << 55)
#define TCR_E0PD1 (UL(1) << 56)
+#define TCR_TCMA0 (UL(1) << 57)
+#define TCR_TCMA1 (UL(1) << 58)
/*
* TTBR.
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 898bee0004ae..34800d264f69 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -1101,10 +1101,6 @@
#define CPACR_EL1_ZEN_EL0EN (BIT(17)) /* enable EL0 access, if EL1EN set */
#define CPACR_EL1_ZEN (CPACR_EL1_ZEN_EL1EN | CPACR_EL1_ZEN_EL0EN)
-/* TCR EL1 Bit Definitions */
-#define SYS_TCR_EL1_TCMA1 (BIT(58))
-#define SYS_TCR_EL1_TCMA0 (BIT(57))
-
/* GCR_EL1 Definitions */
#define SYS_GCR_EL1_RRND (BIT(16))
#define SYS_GCR_EL1_EXCL_MASK 0xffffUL
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
index d35c90d2e47a..50bbed947bec 100644
--- a/arch/arm64/mm/proc.S
+++ b/arch/arm64/mm/proc.S
@@ -46,7 +46,7 @@
#endif
#ifdef CONFIG_KASAN_HW_TAGS
-#define TCR_MTE_FLAGS SYS_TCR_EL1_TCMA1 | TCR_TBI1 | TCR_TBID1
+#define TCR_MTE_FLAGS TCR_TCMA1 | TCR_TBI1 | TCR_TBID1
#else
/*
* The mte_zero_clear_page_tags() implementation uses DC GZVA, which relies on
--
2.20.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] arm64/mm: Consolidate TCR_EL1 fields
2022-01-25 14:38 [PATCH] arm64/mm: Consolidate TCR_EL1 fields Anshuman Khandual
@ 2022-02-15 23:18 ` Will Deacon
0 siblings, 0 replies; 6+ messages in thread
From: Will Deacon @ 2022-02-15 23:18 UTC (permalink / raw)
To: Anshuman Khandual, linux-arm-kernel
Cc: catalin.marinas, kernel-team, Will Deacon, linux-kernel
On Tue, 25 Jan 2022 20:08:33 +0530, Anshuman Khandual wrote:
> This renames and moves SYS_TCR_EL1_TCMA1 and SYS_TCR_EL1_TCMA0 definitions
> into pgtable-hwdef.h thus consolidating all TCR fields in a single header.
> This does not cause any functional change.
>
>
Applied to arm64 (for-next/mm), thanks!
[1/1] arm64/mm: Consolidate TCR_EL1 fields
https://git.kernel.org/arm64/c/e921da6bc7ca
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] arm64/mm: Consolidate TCR_EL1 fields
2022-10-24 17:56 ` Evgenii Stepanov
@ 2022-10-26 10:52 ` Greg Kroah-Hartman
0 siblings, 0 replies; 6+ messages in thread
From: Greg Kroah-Hartman @ 2022-10-26 10:52 UTC (permalink / raw)
To: Evgenii Stepanov
Cc: linux-kernel, stable, Anshuman Khandual, Catalin Marinas,
Will Deacon, linux-arm-kernel
On Mon, Oct 24, 2022 at 10:56:57AM -0700, Evgenii Stepanov wrote:
> On Sat, Oct 22, 2022 at 1:15 AM Greg Kroah-Hartman
> <gregkh@linuxfoundation.org> wrote:
> > What stable kernel branch(es) do you want this applied to?
>
> 5.15, sorry I forgot to mention that. Thank you!
Now queued up.
Note, you passed on a patch yet you did not sign-off on it. Please fix
that up the next time you send patches in.
thanks,
greg k-h
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] arm64/mm: Consolidate TCR_EL1 fields
2022-10-22 7:36 ` Greg Kroah-Hartman
@ 2022-10-24 17:56 ` Evgenii Stepanov
2022-10-26 10:52 ` Greg Kroah-Hartman
0 siblings, 1 reply; 6+ messages in thread
From: Evgenii Stepanov @ 2022-10-24 17:56 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: linux-kernel, stable, Anshuman Khandual, Catalin Marinas,
Will Deacon, linux-arm-kernel
On Sat, Oct 22, 2022 at 1:15 AM Greg Kroah-Hartman
<gregkh@linuxfoundation.org> wrote:
> What stable kernel branch(es) do you want this applied to?
5.15, sorry I forgot to mention that. Thank you!
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] arm64/mm: Consolidate TCR_EL1 fields
2022-10-21 22:28 Evgenii Stepanov
@ 2022-10-22 7:36 ` Greg Kroah-Hartman
2022-10-24 17:56 ` Evgenii Stepanov
0 siblings, 1 reply; 6+ messages in thread
From: Greg Kroah-Hartman @ 2022-10-22 7:36 UTC (permalink / raw)
To: Evgenii Stepanov
Cc: linux-kernel, stable, Anshuman Khandual, Catalin Marinas,
Will Deacon, linux-arm-kernel
On Fri, Oct 21, 2022 at 03:28:11PM -0700, Evgenii Stepanov wrote:
> From: Anshuman Khandual <anshuman.khandual@arm.com>
>
> commit e921da6bc7cac5f0e8458fe5df18ae08eb538f54 upstream.
>
> This renames and moves SYS_TCR_EL1_TCMA1 and SYS_TCR_EL1_TCMA0 definitions
> into pgtable-hwdef.h thus consolidating all TCR fields in a single header.
> This does not cause any functional change.
>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
> Link: https://lore.kernel.org/r/1643121513-21854-1-git-send-email-anshuman.khandual@arm.com
> Signed-off-by: Will Deacon <will@kernel.org>
> ---
> arch/arm64/include/asm/pgtable-hwdef.h | 2 ++
> arch/arm64/include/asm/sysreg.h | 4 ----
> arch/arm64/mm/proc.S | 2 +-
> 3 files changed, 3 insertions(+), 5 deletions(-)
What stable kernel branch(es) do you want this applied to?
thanks,
greg k-h
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] arm64/mm: Consolidate TCR_EL1 fields
@ 2022-10-21 22:28 Evgenii Stepanov
2022-10-22 7:36 ` Greg Kroah-Hartman
0 siblings, 1 reply; 6+ messages in thread
From: Evgenii Stepanov @ 2022-10-21 22:28 UTC (permalink / raw)
To: Greg Kroah-Hartman, linux-kernel, stable
Cc: Anshuman Khandual, Catalin Marinas, Will Deacon, linux-arm-kernel
From: Anshuman Khandual <anshuman.khandual@arm.com>
commit e921da6bc7cac5f0e8458fe5df18ae08eb538f54 upstream.
This renames and moves SYS_TCR_EL1_TCMA1 and SYS_TCR_EL1_TCMA0 definitions
into pgtable-hwdef.h thus consolidating all TCR fields in a single header.
This does not cause any functional change.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/1643121513-21854-1-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/include/asm/pgtable-hwdef.h | 2 ++
arch/arm64/include/asm/sysreg.h | 4 ----
arch/arm64/mm/proc.S | 2 +-
3 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h
index 40085e53f573..66671ff05183 100644
--- a/arch/arm64/include/asm/pgtable-hwdef.h
+++ b/arch/arm64/include/asm/pgtable-hwdef.h
@@ -273,6 +273,8 @@
#define TCR_NFD1 (UL(1) << 54)
#define TCR_E0PD0 (UL(1) << 55)
#define TCR_E0PD1 (UL(1) << 56)
+#define TCR_TCMA0 (UL(1) << 57)
+#define TCR_TCMA1 (UL(1) << 58)
/*
* TTBR.
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 394fc5998a4b..f79f3720e4cb 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -1094,10 +1094,6 @@
#define CPACR_EL1_ZEN_EL0EN (BIT(17)) /* enable EL0 access, if EL1EN set */
#define CPACR_EL1_ZEN (CPACR_EL1_ZEN_EL1EN | CPACR_EL1_ZEN_EL0EN)
-/* TCR EL1 Bit Definitions */
-#define SYS_TCR_EL1_TCMA1 (BIT(58))
-#define SYS_TCR_EL1_TCMA0 (BIT(57))
-
/* GCR_EL1 Definitions */
#define SYS_GCR_EL1_RRND (BIT(16))
#define SYS_GCR_EL1_EXCL_MASK 0xffffUL
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
index d35c90d2e47a..50bbed947bec 100644
--- a/arch/arm64/mm/proc.S
+++ b/arch/arm64/mm/proc.S
@@ -46,7 +46,7 @@
#endif
#ifdef CONFIG_KASAN_HW_TAGS
-#define TCR_MTE_FLAGS SYS_TCR_EL1_TCMA1 | TCR_TBI1 | TCR_TBID1
+#define TCR_MTE_FLAGS TCR_TCMA1 | TCR_TBI1 | TCR_TBID1
#else
/*
* The mte_zero_clear_page_tags() implementation uses DC GZVA, which relies on
--
2.38.0.135.g90850a2211-goog
^ permalink raw reply related [flat|nested] 6+ messages in thread
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2022-01-25 14:38 [PATCH] arm64/mm: Consolidate TCR_EL1 fields Anshuman Khandual
2022-02-15 23:18 ` Will Deacon
2022-10-21 22:28 Evgenii Stepanov
2022-10-22 7:36 ` Greg Kroah-Hartman
2022-10-24 17:56 ` Evgenii Stepanov
2022-10-26 10:52 ` Greg Kroah-Hartman
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