From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A0A5C4332F for ; Thu, 3 Mar 2022 09:40:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232056AbiCCJlL (ORCPT ); Thu, 3 Mar 2022 04:41:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36148 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229662AbiCCJlF (ORCPT ); Thu, 3 Mar 2022 04:41:05 -0500 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 25BC2177774; Thu, 3 Mar 2022 01:40:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1646300420; x=1677836420; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=k18H4jQjqdXwe83FlKD0McInh52fikWbkf9CksAysLs=; b=uQifG5gdB3Ww6ykw6uGQAD6NXiUHI8z4tw/zj0SSAhAKLqXBUGVeQWl6 Vk1G6NHzUMTTv2b/F4oInKF16NUGTsmB1vyrJ+TVLIn5o2/h9lT3X8Ory k8ZH+GkfUMEDaOmT4vFSctiULUJrl9vg4Lj0ywJoOt10ZwRRZ27XGJQCU g=; Received: from ironmsg-lv-alpha.qualcomm.com ([10.47.202.13]) by alexa-out.qualcomm.com with ESMTP; 03 Mar 2022 01:40:20 -0800 X-QCInternal: smtphost Received: from ironmsg01-blr.qualcomm.com ([10.86.208.130]) by ironmsg-lv-alpha.qualcomm.com with ESMTP/TLS/AES256-SHA; 03 Mar 2022 01:40:18 -0800 X-QCInternal: smtphost Received: from vpolimer-linux.qualcomm.com ([10.204.67.235]) by ironmsg01-blr.qualcomm.com with ESMTP; 03 Mar 2022 15:10:07 +0530 Received: by vpolimer-linux.qualcomm.com (Postfix, from userid 463814) id 732153565; Thu, 3 Mar 2022 15:10:06 +0530 (IST) From: Vinod Polimera To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org Cc: Vinod Polimera , linux-kernel@vger.kernel.org, robdclark@gmail.com, dianders@chromium.org, swboyd@chromium.org, quic_kalyant@quicinc.com Subject: [PATCH v4 2/4] arm64/dts/qcom/sc7180: remove assigned-clock-rate property for mdp clk Date: Thu, 3 Mar 2022 15:09:59 +0530 Message-Id: <1646300401-9063-3-git-send-email-quic_vpolimer@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1646300401-9063-1-git-send-email-quic_vpolimer@quicinc.com> References: <1646300401-9063-1-git-send-email-quic_vpolimer@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Kernel clock driver assumes that initial rate is the max rate for that clock and was not allowing it to scale beyond the assigned clock value. Drop the assigned clock rate property and vote on the mdp clock as per calculated value during the usecase. Fixes: a3db7ad1af("arm64: dts: qcom: sc7180: add display dt nodes") Signed-off-by: Vinod Polimera --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index e1c46b8..eaab746 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -2900,9 +2900,6 @@ <&dispcc DISP_CC_MDSS_MDP_CLK>; clock-names = "iface", "ahb", "core"; - assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>; - assigned-clock-rates = <300000000>; - interrupts = ; interrupt-controller; #interrupt-cells = <1>; @@ -2932,12 +2929,10 @@ <&dispcc DISP_CC_MDSS_VSYNC_CLK>; clock-names = "bus", "iface", "rot", "lut", "core", "vsync"; - assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>, - <&dispcc DISP_CC_MDSS_VSYNC_CLK>, + assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>, <&dispcc DISP_CC_MDSS_ROT_CLK>, <&dispcc DISP_CC_MDSS_AHB_CLK>; - assigned-clock-rates = <300000000>, - <19200000>, + assigned-clock-rates = <19200000>, <19200000>, <19200000>; operating-points-v2 = <&mdp_opp_table>; -- 2.7.4