From: "tip-bot2 for Peter Zijlstra" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: "Peter Zijlstra (Intel)" <peterz@infradead.org>,
Josh Poimboeuf <jpoimboe@redhat.com>,
x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: x86/core] x86/ibt: Add IBT feature, MSR and #CP handling
Date: Tue, 15 Mar 2022 10:43:58 -0000 [thread overview]
Message-ID: <164734103846.16921.12424565428024318512.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20220308154318.582331711@infradead.org>
The following commit has been merged into the x86/core branch of tip:
Commit-ID: 991625f3dd2cbc4b787deb0213e2bcf8fa264b21
Gitweb: https://git.kernel.org/tip/991625f3dd2cbc4b787deb0213e2bcf8fa264b21
Author: Peter Zijlstra <peterz@infradead.org>
AuthorDate: Tue, 08 Mar 2022 16:30:35 +01:00
Committer: Peter Zijlstra <peterz@infradead.org>
CommitterDate: Tue, 15 Mar 2022 10:32:39 +01:00
x86/ibt: Add IBT feature, MSR and #CP handling
The bits required to make the hardware go.. Of note is that, provided
the syscall entry points are covered with ENDBR, #CP doesn't need to
be an IST because we'll never hit the syscall gap.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@redhat.com>
Link: https://lore.kernel.org/r/20220308154318.582331711@infradead.org
---
arch/x86/include/asm/cpu.h | 1 +-
arch/x86/include/asm/cpufeatures.h | 1 +-
arch/x86/include/asm/idtentry.h | 5 +-
arch/x86/include/asm/msr-index.h | 20 ++++-
arch/x86/include/asm/traps.h | 2 +-
arch/x86/include/uapi/asm/processor-flags.h | 2 +-
arch/x86/kernel/cpu/common.c | 25 ++++++-
arch/x86/kernel/idt.c | 4 +-
arch/x86/kernel/traps.c | 75 ++++++++++++++++++++-
9 files changed, 133 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index 33d41e3..a60025f 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -7,6 +7,7 @@
#include <linux/topology.h>
#include <linux/nodemask.h>
#include <linux/percpu.h>
+#include <asm/ibt.h>
#ifdef CONFIG_SMP
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 65d1479..c5bda35 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -390,6 +390,7 @@
#define X86_FEATURE_TSXLDTRK (18*32+16) /* TSX Suspend Load Address Tracking */
#define X86_FEATURE_PCONFIG (18*32+18) /* Intel PCONFIG */
#define X86_FEATURE_ARCH_LBR (18*32+19) /* Intel ARCH LBR */
+#define X86_FEATURE_IBT (18*32+20) /* Indirect Branch Tracking */
#define X86_FEATURE_AVX512_FP16 (18*32+23) /* AVX512 FP16 */
#define X86_FEATURE_SPEC_CTRL (18*32+26) /* "" Speculation Control (IBRS + IBPB) */
#define X86_FEATURE_INTEL_STIBP (18*32+27) /* "" Single Thread Indirect Branch Predictors */
diff --git a/arch/x86/include/asm/idtentry.h b/arch/x86/include/asm/idtentry.h
index f84280a..7924f27 100644
--- a/arch/x86/include/asm/idtentry.h
+++ b/arch/x86/include/asm/idtentry.h
@@ -617,6 +617,11 @@ DECLARE_IDTENTRY_DF(X86_TRAP_DF, exc_double_fault);
DECLARE_IDTENTRY_RAW_ERRORCODE(X86_TRAP_DF, xenpv_exc_double_fault);
#endif
+/* #CP */
+#ifdef CONFIG_X86_KERNEL_IBT
+DECLARE_IDTENTRY_ERRORCODE(X86_TRAP_CP, exc_control_protection);
+#endif
+
/* #VC */
#ifdef CONFIG_AMD_MEM_ENCRYPT
DECLARE_IDTENTRY_VC(X86_TRAP_VC, exc_vmm_communication);
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index a4a39c3..65c3599 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -360,11 +360,29 @@
#define MSR_ATOM_CORE_TURBO_RATIOS 0x0000066c
#define MSR_ATOM_CORE_TURBO_VIDS 0x0000066d
-
#define MSR_CORE_PERF_LIMIT_REASONS 0x00000690
#define MSR_GFX_PERF_LIMIT_REASONS 0x000006B0
#define MSR_RING_PERF_LIMIT_REASONS 0x000006B1
+/* Control-flow Enforcement Technology MSRs */
+#define MSR_IA32_U_CET 0x000006a0 /* user mode cet */
+#define MSR_IA32_S_CET 0x000006a2 /* kernel mode cet */
+#define CET_SHSTK_EN BIT_ULL(0)
+#define CET_WRSS_EN BIT_ULL(1)
+#define CET_ENDBR_EN BIT_ULL(2)
+#define CET_LEG_IW_EN BIT_ULL(3)
+#define CET_NO_TRACK_EN BIT_ULL(4)
+#define CET_SUPPRESS_DISABLE BIT_ULL(5)
+#define CET_RESERVED (BIT_ULL(6) | BIT_ULL(7) | BIT_ULL(8) | BIT_ULL(9))
+#define CET_SUPPRESS BIT_ULL(10)
+#define CET_WAIT_ENDBR BIT_ULL(11)
+
+#define MSR_IA32_PL0_SSP 0x000006a4 /* ring-0 shadow stack pointer */
+#define MSR_IA32_PL1_SSP 0x000006a5 /* ring-1 shadow stack pointer */
+#define MSR_IA32_PL2_SSP 0x000006a6 /* ring-2 shadow stack pointer */
+#define MSR_IA32_PL3_SSP 0x000006a7 /* ring-3 shadow stack pointer */
+#define MSR_IA32_INT_SSP_TAB 0x000006a8 /* exception shadow stack table */
+
/* Hardware P state interface */
#define MSR_PPERF 0x0000064e
#define MSR_PERF_LIMIT_REASONS 0x0000064f
diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h
index 6221be7..35317c5 100644
--- a/arch/x86/include/asm/traps.h
+++ b/arch/x86/include/asm/traps.h
@@ -18,6 +18,8 @@ void __init trap_init(void);
asmlinkage __visible noinstr struct pt_regs *vc_switch_off_ist(struct pt_regs *eregs);
#endif
+extern bool ibt_selftest(void);
+
#ifdef CONFIG_X86_F00F_BUG
/* For handling the FOOF bug */
void handle_invalid_op(struct pt_regs *regs);
diff --git a/arch/x86/include/uapi/asm/processor-flags.h b/arch/x86/include/uapi/asm/processor-flags.h
index bcba3c6..c47cc7f 100644
--- a/arch/x86/include/uapi/asm/processor-flags.h
+++ b/arch/x86/include/uapi/asm/processor-flags.h
@@ -130,6 +130,8 @@
#define X86_CR4_SMAP _BITUL(X86_CR4_SMAP_BIT)
#define X86_CR4_PKE_BIT 22 /* enable Protection Keys support */
#define X86_CR4_PKE _BITUL(X86_CR4_PKE_BIT)
+#define X86_CR4_CET_BIT 23 /* enable Control-flow Enforcement Technology */
+#define X86_CR4_CET _BITUL(X86_CR4_CET_BIT)
/*
* x86-64 Task Priority Register, CR8
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 7b8382c..db1f149 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -59,6 +59,7 @@
#include <asm/cpu_device_id.h>
#include <asm/uv/uv.h>
#include <asm/sigframe.h>
+#include <asm/traps.h>
#include "cpu.h"
@@ -361,7 +362,8 @@ out:
/* These bits should not change their value after CPU init is finished. */
static const unsigned long cr4_pinned_mask =
- X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_UMIP | X86_CR4_FSGSBASE;
+ X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_UMIP |
+ X86_CR4_FSGSBASE | X86_CR4_CET;
static DEFINE_STATIC_KEY_FALSE_RO(cr_pinning);
static unsigned long cr4_pinned_bits __ro_after_init;
@@ -515,6 +517,24 @@ static __init int setup_disable_pku(char *arg)
__setup("nopku", setup_disable_pku);
#endif /* CONFIG_X86_64 */
+static __always_inline void setup_cet(struct cpuinfo_x86 *c)
+{
+ u64 msr = CET_ENDBR_EN;
+
+ if (!HAS_KERNEL_IBT ||
+ !cpu_feature_enabled(X86_FEATURE_IBT))
+ return;
+
+ wrmsrl(MSR_IA32_S_CET, msr);
+ cr4_set_bits(X86_CR4_CET);
+
+ if (!ibt_selftest()) {
+ pr_err("IBT selftest: Failed!\n");
+ setup_clear_cpu_cap(X86_FEATURE_IBT);
+ return;
+ }
+}
+
/*
* Some CPU features depend on higher CPUID levels, which may not always
* be available due to CPUID level capping or broken virtualization
@@ -1632,6 +1652,7 @@ static void identify_cpu(struct cpuinfo_x86 *c)
x86_init_rdrand(c);
setup_pku(c);
+ setup_cet(c);
/*
* Clear/Set all flags overridden by options, need do it
@@ -1698,6 +1719,8 @@ void enable_sep_cpu(void)
void __init identify_boot_cpu(void)
{
identify_cpu(&boot_cpu_data);
+ if (HAS_KERNEL_IBT && cpu_feature_enabled(X86_FEATURE_IBT))
+ pr_info("CET detected: Indirect Branch Tracking enabled\n");
#ifdef CONFIG_X86_32
sysenter_setup();
enable_sep_cpu();
diff --git a/arch/x86/kernel/idt.c b/arch/x86/kernel/idt.c
index 7676e34..608eb63 100644
--- a/arch/x86/kernel/idt.c
+++ b/arch/x86/kernel/idt.c
@@ -104,6 +104,10 @@ static const __initconst struct idt_data def_idts[] = {
ISTG(X86_TRAP_MC, asm_exc_machine_check, IST_INDEX_MCE),
#endif
+#ifdef CONFIG_X86_KERNEL_IBT
+ INTG(X86_TRAP_CP, asm_exc_control_protection),
+#endif
+
#ifdef CONFIG_AMD_MEM_ENCRYPT
ISTG(X86_TRAP_VC, asm_exc_vmm_communication, IST_INDEX_VC),
#endif
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 8143693..c073cb5 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -209,6 +209,81 @@ DEFINE_IDTENTRY(exc_overflow)
do_error_trap(regs, 0, "overflow", X86_TRAP_OF, SIGSEGV, 0, NULL);
}
+#ifdef CONFIG_X86_KERNEL_IBT
+
+static __ro_after_init bool ibt_fatal = true;
+
+extern void ibt_selftest_ip(void); /* code label defined in asm below */
+
+enum cp_error_code {
+ CP_EC = (1 << 15) - 1,
+
+ CP_RET = 1,
+ CP_IRET = 2,
+ CP_ENDBR = 3,
+ CP_RSTRORSSP = 4,
+ CP_SETSSBSY = 5,
+
+ CP_ENCL = 1 << 15,
+};
+
+DEFINE_IDTENTRY_ERRORCODE(exc_control_protection)
+{
+ if (!cpu_feature_enabled(X86_FEATURE_IBT)) {
+ pr_err("Unexpected #CP\n");
+ BUG();
+ }
+
+ if (WARN_ON_ONCE(user_mode(regs) || (error_code & CP_EC) != CP_ENDBR))
+ return;
+
+ if (unlikely(regs->ip == (unsigned long)&ibt_selftest_ip)) {
+ regs->ax = 0;
+ return;
+ }
+
+ pr_err("Missing ENDBR: %pS\n", (void *)instruction_pointer(regs));
+ if (!ibt_fatal) {
+ printk(KERN_DEFAULT CUT_HERE);
+ __warn(__FILE__, __LINE__, (void *)regs->ip, TAINT_WARN, regs, NULL);
+ return;
+ }
+ BUG();
+}
+
+/* Must be noinline to ensure uniqueness of ibt_selftest_ip. */
+noinline bool ibt_selftest(void)
+{
+ unsigned long ret;
+
+ asm (" lea ibt_selftest_ip(%%rip), %%rax\n\t"
+ ANNOTATE_RETPOLINE_SAFE
+ " jmp *%%rax\n\t"
+ "ibt_selftest_ip:\n\t"
+ UNWIND_HINT_FUNC
+ ANNOTATE_NOENDBR
+ " nop\n\t"
+
+ : "=a" (ret) : : "memory");
+
+ return !ret;
+}
+
+static int __init ibt_setup(char *str)
+{
+ if (!strcmp(str, "off"))
+ setup_clear_cpu_cap(X86_FEATURE_IBT);
+
+ if (!strcmp(str, "warn"))
+ ibt_fatal = false;
+
+ return 1;
+}
+
+__setup("ibt=", ibt_setup);
+
+#endif /* CONFIG_X86_KERNEL_IBT */
+
#ifdef CONFIG_X86_F00F_BUG
void handle_invalid_op(struct pt_regs *regs)
#else
next prev parent reply other threads:[~2022-03-15 10:45 UTC|newest]
Thread overview: 193+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-08 15:30 [PATCH v4 00/45] x86: Kernel IBT Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 01/45] static_call: Avoid building empty .static_call_sites Peter Zijlstra
2022-03-09 7:55 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-15 10:44 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 02/45] objtool: Add --dry-run Peter Zijlstra
2022-03-09 7:55 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-15 10:44 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 03/45] objtool: Default ignore INT3 for unreachable Peter Zijlstra
2022-03-09 7:55 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-15 10:44 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 04/45] objtool,efi: Update __efi64_thunk annotation Peter Zijlstra
2022-03-09 7:55 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-09 8:35 ` [PATCH v4 04/45] " Miroslav Benes
2022-03-15 10:44 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 05/45] objtool: Have WARN_FUNC fall back to sym+off Peter Zijlstra
2022-03-09 7:55 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-15 10:44 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 06/45] x86/ibt: Base IBT bits Peter Zijlstra
2022-03-09 7:55 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-15 10:44 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 07/45] x86/ibt: Add ANNOTATE_NOENDBR Peter Zijlstra
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2022-03-15 10:44 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 08/45] x86/text-patching: Make text_gen_insn() play nice with ANNOTATE_NOENDBR Peter Zijlstra
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2022-03-15 10:44 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 09/45] x86/ibt,paravirt: Use text_gen_insn() for paravirt_patch() Peter Zijlstra
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2022-03-15 10:44 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 10/45] x86/entry: Cleanup PARAVIRT Peter Zijlstra
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2022-03-15 10:44 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 11/45] x86/entry,xen: Early rewrite of restore_regs_and_return_to_kernel() Peter Zijlstra
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2022-03-08 15:30 ` [PATCH v4 12/45] x86/ibt,xen: Sprinkle the ENDBR Peter Zijlstra
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2022-03-15 10:44 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 13/45] x86/ibt,entry: Sprinkle ENDBR dust Peter Zijlstra
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2022-03-15 10:44 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 14/45] x86/linkage: Add ENDBR to SYM_FUNC_START*() Peter Zijlstra
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2022-03-15 10:44 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 15/45] x86/ibt,paravirt: Sprinkle ENDBR Peter Zijlstra
2022-03-09 7:55 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-15 10:44 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 16/45] x86/ibt,crypto: Add ENDBR for the jump-table entries Peter Zijlstra
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2022-03-15 10:44 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 17/45] x86/ibt,kvm: Add ENDBR to fastops Peter Zijlstra
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2022-03-08 15:30 ` [PATCH v4 18/45] x86/ibt,ftrace: Search for __fentry__ location Peter Zijlstra
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2022-03-15 10:44 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 19/45] x86/livepatch: Validate " Peter Zijlstra
2022-03-09 7:55 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-09 8:58 ` [PATCH v4 19/45] " Miroslav Benes
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2022-03-08 15:30 ` [PATCH v4 20/45] x86/ibt,ftrace: Make function-graph play nice Peter Zijlstra
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2022-03-08 15:30 ` [PATCH v4 21/45] x86/ibt,kprobes: Cure sym+0 equals fentry woes Peter Zijlstra
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2022-03-08 15:30 ` [PATCH v4 22/45] x86/ibt,bpf: Add ENDBR instructions to prologue and trampoline Peter Zijlstra
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2022-03-08 15:30 ` [PATCH v4 23/45] x86/ibt,ftrace: Add ENDBR to samples/ftrace Peter Zijlstra
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2022-03-08 15:30 ` [PATCH v4 24/45] x86/ibt: Add IBT feature, MSR and #CP handling Peter Zijlstra
2022-03-09 7:54 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-09 13:56 ` [PATCH v4 24/45] " Andrew Cooper
2022-03-15 10:43 ` tip-bot2 for Peter Zijlstra [this message]
2022-03-08 15:30 ` [PATCH v4 25/45] x86/ibt,kexec: Disable CET on kexec Peter Zijlstra
2022-03-09 7:54 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-15 10:43 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 26/45] x86/alternative: Simplify int3_selftest_ip Peter Zijlstra
2022-03-09 7:54 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-15 10:43 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 27/45] x86/ibt: Disable IBT around firmware Peter Zijlstra
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2022-03-15 10:43 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 28/45] x86/bugs: Disable Retpoline when IBT Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 29/45] x86/ibt: Annotate text references Peter Zijlstra
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2022-03-15 10:43 ` tip-bot2 for Peter Zijlstra
2022-03-22 4:43 ` [PATCH v4 29/45] " Masami Hiramatsu
2022-03-22 4:45 ` Alexei Starovoitov
2022-03-08 15:30 ` [PATCH v4 30/45] x86/ibt,ftrace: Annotate ftrace code patching Peter Zijlstra
2022-03-09 7:54 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-15 10:43 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 31/45] x86/ibt,sev: Annotations Peter Zijlstra
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2022-03-08 15:30 ` [PATCH v4 32/45] x86/ibt: Dont generate ENDBR in .discard.text Peter Zijlstra
2022-03-09 7:54 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-15 10:43 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 33/45] x86/ibt: Ensure module init/exit points have references Peter Zijlstra
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2022-03-08 15:30 ` [PATCH v4 34/45] objtool: Rename --duplicate to --lto Peter Zijlstra
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2022-03-08 15:30 ` [PATCH v4 35/45] objtool: Ignore extra-symbol code Peter Zijlstra
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2022-03-08 15:30 ` [PATCH v4 36/45] x86: Mark stop_this_cpu() __noreturn Peter Zijlstra
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2022-03-15 10:43 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 37/45] exit: Mark do_group_exit() __noreturn Peter Zijlstra
2022-03-09 7:54 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-15 10:43 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 38/45] objtool: Rework ASM_REACHABLE Peter Zijlstra
2022-03-09 7:54 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-15 10:43 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 39/45] x86: Annotate call_on_stack() Peter Zijlstra
2022-03-09 7:54 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-15 10:43 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 40/45] Kbuild: Allow whole module objtool runs Peter Zijlstra
2022-03-09 7:54 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 41/45] objtool: Read the NOENDBR annotation Peter Zijlstra
2022-03-09 7:54 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-15 10:43 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 42/45] objtool: Add IBT/ENDBR decoding Peter Zijlstra
2022-03-09 7:54 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-15 10:43 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 43/45] objtool: Validate IBT assumptions Peter Zijlstra
2022-03-09 7:54 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-15 10:43 ` tip-bot2 for Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 44/45] objtool: Find unused ENDBR instructions Peter Zijlstra
2022-03-09 7:54 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-15 10:43 ` tip-bot2 for Peter Zijlstra
2022-03-15 15:39 ` David Laight
2022-03-17 22:22 ` Josh Poimboeuf
2022-03-18 10:49 ` Peter Zijlstra
2022-03-08 15:30 ` [PATCH v4 45/45] x86/alternative: Use .ibt_endbr_seal to seal indirect calls Peter Zijlstra
2022-03-09 7:54 ` [tip: x86/core] " tip-bot2 for Peter Zijlstra
2022-03-15 10:43 ` tip-bot2 for Peter Zijlstra
2022-03-08 20:00 ` [PATCH v4 00/45] x86: Kernel IBT Alexei Starovoitov
2022-03-08 22:01 ` Peter Zijlstra
2022-03-08 22:32 ` Peter Zijlstra
2022-03-09 1:02 ` Peter Zijlstra
2022-03-09 19:09 ` Alexei Starovoitov
2022-03-10 9:35 ` Peter Zijlstra
2022-03-10 13:47 ` Peter Zijlstra
2022-03-10 14:37 ` Steven Rostedt
2022-03-11 15:23 ` Peter Zijlstra
2022-03-10 16:29 ` Peter Zijlstra
2022-03-11 10:40 ` Peter Zijlstra
2022-03-11 17:09 ` Alexei Starovoitov
2022-03-12 15:44 ` Peter Zijlstra
2022-03-13 1:33 ` Alexei Starovoitov
2022-03-13 8:52 ` Peter Zijlstra
2022-03-14 14:59 ` Peter Zijlstra
2022-03-15 8:15 ` Peter Zijlstra
2022-03-15 16:28 ` Masahiro Yamada
2022-03-17 19:44 ` Peter Zijlstra
2022-03-18 2:07 ` David Laight
2022-03-17 18:15 ` Masahiro Yamada
2022-03-17 19:52 ` Peter Zijlstra
2022-03-18 15:36 ` [tip: x86/core] kbuild: Fixup the IBT kbuild changes tip-bot2 for Peter Zijlstra
2022-03-18 16:15 ` Masahiro Yamada
2022-03-22 20:24 ` tip-bot2 for Peter Zijlstra
2022-03-15 16:26 ` [PATCH v4 00/45] x86: Kernel IBT Masahiro Yamada
2022-03-17 19:36 ` Peter Zijlstra
2022-03-14 15:33 ` Peter Zijlstra
2022-03-15 10:43 ` [tip: x86/core] x86: Annotate idtentry_df() tip-bot2 for Peter Zijlstra
2022-03-15 10:43 ` [tip: x86/core] x86,objtool: Move the ASM_REACHABLE annotation to objtool.h tip-bot2 for Peter Zijlstra
2022-03-15 10:43 ` [tip: x86/core] x86: Mark __invalid_creds() __noreturn tip-bot2 for Peter Zijlstra
2022-03-14 20:44 ` [PATCH v4 00/45] x86: Kernel IBT Kumar Kartikeya Dwivedi
2022-03-15 9:00 ` Peter Zijlstra
2022-03-15 10:05 ` Kumar Kartikeya Dwivedi
2022-03-15 10:07 ` Peter Zijlstra
2022-03-15 10:39 ` Peter Zijlstra
2022-03-16 9:35 ` Peter Zijlstra
2022-03-16 11:12 ` Kumar Kartikeya Dwivedi
2022-03-15 18:26 ` Alexei Starovoitov
2022-03-17 20:27 ` Peter Zijlstra
2022-03-11 14:40 ` [tip: x86/core] x86,ftrace: Fix modify_ftrace_direct() tip-bot2 for Peter Zijlstra
2022-03-10 0:30 ` [PATCH v4 00/45] x86: Kernel IBT Nick Desaulniers
2022-03-10 9:05 ` Peter Zijlstra
2022-03-10 9:22 ` David Laight
2022-03-10 10:16 ` Peter Zijlstra
2022-03-10 20:49 ` Nick Desaulniers
2022-03-11 14:40 ` [tip: x86/core] x86: Fix {int3,ibt}_selftest() vs LTO tip-bot2 for Peter Zijlstra
2022-03-08 20:06 ` [PATCH v4 00/45] x86: Kernel IBT Josh Poimboeuf
2022-03-09 6:57 ` Josh Poimboeuf
2022-03-09 13:37 ` David Laight
2022-03-10 14:27 ` Peter Zijlstra
2022-03-09 12:51 ` Miroslav Benes
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