From: Kartik <kkartik@nvidia.com>
To: <kkartik@nvidia.com>, <ldewangan@nvidia.com>,
<gregkh@linuxfoundation.org>, <jirislaby@kernel.org>,
<thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
<linux-kernel@vger.kernel.org>, <linux-serial@vger.kernel.org>,
<linux-tegra@vger.kernel.org>
Subject: [PATCH] serial: tegra: Correct error handling sequence
Date: Thu, 24 Mar 2022 14:34:04 +0530 [thread overview]
Message-ID: <1648112644-16950-1-git-send-email-kkartik@nvidia.com> (raw)
From: kartik <kkartik@nvidia.com>
In the current error handling sequence the driver checks for break
error at the end.
By handling the break error first, we can avoid a situation where the
driver keeps processing the errors which can be caused by an unhandled
break error.
Signed-off-by: kartik <kkartik@nvidia.com>
---
drivers/tty/serial/serial-tegra.c | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c
index b6223fa..ba78a02 100644
--- a/drivers/tty/serial/serial-tegra.c
+++ b/drivers/tty/serial/serial-tegra.c
@@ -440,7 +440,19 @@ static char tegra_uart_decode_rx_error(struct tegra_uart_port *tup,
char flag = TTY_NORMAL;
if (unlikely(lsr & TEGRA_UART_LSR_ANY)) {
- if (lsr & UART_LSR_OE) {
+ if (lsr & UART_LSR_BI) {
+ /*
+ * Break error
+ * If FIFO read error without any data, reset Rx FIFO
+ */
+ if (!(lsr & UART_LSR_DR) && (lsr & UART_LSR_FIFOE))
+ tegra_uart_fifo_reset(tup, UART_FCR_CLEAR_RCVR);
+ if (tup->uport.ignore_status_mask & UART_LSR_BI)
+ return TTY_BREAK;
+ flag = TTY_BREAK;
+ tup->uport.icount.brk++;
+ dev_dbg(tup->uport.dev, "Got Break\n");
+ } else if (lsr & UART_LSR_OE) {
/* Overrrun error */
flag = TTY_OVERRUN;
tup->uport.icount.overrun++;
@@ -454,18 +466,6 @@ static char tegra_uart_decode_rx_error(struct tegra_uart_port *tup,
flag = TTY_FRAME;
tup->uport.icount.frame++;
dev_dbg(tup->uport.dev, "Got frame errors\n");
- } else if (lsr & UART_LSR_BI) {
- /*
- * Break error
- * If FIFO read error without any data, reset Rx FIFO
- */
- if (!(lsr & UART_LSR_DR) && (lsr & UART_LSR_FIFOE))
- tegra_uart_fifo_reset(tup, UART_FCR_CLEAR_RCVR);
- if (tup->uport.ignore_status_mask & UART_LSR_BI)
- return TTY_BREAK;
- flag = TTY_BREAK;
- tup->uport.icount.brk++;
- dev_dbg(tup->uport.dev, "Got Break\n");
}
uart_insert_char(&tup->uport, lsr, UART_LSR_OE, 0, flag);
}
--
2.7.4
next reply other threads:[~2022-03-24 9:04 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-24 9:04 Kartik [this message]
2022-04-15 6:41 ` [PATCH] serial: tegra: Correct error handling sequence Greg KH
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