From: Wanpeng Li <kernellwp@gmail.com>
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>
Subject: [PATCH v2 1/2] KVM: LAPIC: Disarm LAPIC timer includes pending timer around TSC deadline switch
Date: Tue, 10 May 2022 19:38:29 -0700 [thread overview]
Message-ID: <1652236710-36524-1-git-send-email-wanpengli@tencent.com> (raw)
From: Wanpeng Li <wanpengli@tencent.com>
The timer is disarmed when switching between TSC deadline and other modes,
however, the pending timer is still in-flight, so let's accurately set
everything to a disarmed state, this patch does it by clearing pending
when canceling the timer.
Fixes: 4427593258 (KVM: x86: thoroughly disarm LAPIC timer around TSC deadline switch)
Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
---
v1 -> v2:
* clear pending in cancel_apic_timer
arch/x86/kvm/lapic.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 66b0eb0bda94..6268880c8eed 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -1548,6 +1548,7 @@ static void cancel_apic_timer(struct kvm_lapic *apic)
if (apic->lapic_timer.hv_timer_in_use)
cancel_hv_timer(apic);
preempt_enable();
+ atomic_set(&apic->lapic_timer.pending, 0);
}
static void apic_update_lvtt(struct kvm_lapic *apic)
--
2.25.1
next reply other threads:[~2022-05-11 2:47 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-11 2:38 Wanpeng Li [this message]
2022-05-11 2:38 ` [PATCH v2 2/2] x86/kvm: handle the failure of __pv_cpu_mask allocation Wanpeng Li
2022-05-11 13:53 ` [PATCH v2 1/2] KVM: LAPIC: Disarm LAPIC timer includes pending timer around TSC deadline switch Paolo Bonzini
2022-05-12 8:23 ` Wanpeng Li
2022-05-19 8:50 ` Wanpeng Li
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