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From: "tip-bot2 for Ravi Bangoria" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Ravi Bangoria <ravi.bangoria@amd.com>,
	"Peter Zijlstra (Intel)" <peterz@infradead.org>,
	x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: perf/core] perf/amd/ibs: Use ->is_visible callback for dynamic attributes
Date: Wed, 11 May 2022 19:47:00 -0000	[thread overview]
Message-ID: <165229842011.4207.15725983634626537750.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20220509044914.1473-3-ravi.bangoria@amd.com>

The following commit has been merged into the perf/core branch of tip:

Commit-ID:     2a7a7e658682bfd7501dc6b4c9d365aa6c79788a
Gitweb:        https://git.kernel.org/tip/2a7a7e658682bfd7501dc6b4c9d365aa6c79788a
Author:        Ravi Bangoria <ravi.bangoria@amd.com>
AuthorDate:    Mon, 09 May 2022 10:19:08 +05:30
Committer:     Peter Zijlstra <peterz@infradead.org>
CommitterDate: Wed, 11 May 2022 16:27:09 +02:00

perf/amd/ibs: Use ->is_visible callback for dynamic attributes

Currently, some attributes are added at build time whereas others
at boot time depending on IBS pmu capabilities. Instead, we can
just add all attribute groups at build time but hide individual
group at boot time using more appropriate ->is_visible() callback.

Also, struct perf_ibs has bunch of fields for pmu attributes which
just pass on the pointer, does not do anything else. Remove them.

Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/20220509044914.1473-3-ravi.bangoria@amd.com
---
 arch/x86/events/amd/ibs.c | 78 ++++++++++++++++++++++++++------------
 1 file changed, 54 insertions(+), 24 deletions(-)

diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
index 2704ec1..ece4f6a 100644
--- a/arch/x86/events/amd/ibs.c
+++ b/arch/x86/events/amd/ibs.c
@@ -94,10 +94,6 @@ struct perf_ibs {
 	unsigned int			fetch_ignore_if_zero_rip : 1;
 	struct cpu_perf_ibs __percpu	*pcpu;
 
-	struct attribute		**format_attrs;
-	struct attribute_group		format_group;
-	const struct attribute_group	*attr_groups[2];
-
 	u64				(*get_count)(u64 config);
 };
 
@@ -528,16 +524,61 @@ static void perf_ibs_del(struct perf_event *event, int flags)
 
 static void perf_ibs_read(struct perf_event *event) { }
 
+/*
+ * We need to initialize with empty group if all attributes in the
+ * group are dynamic.
+ */
+static struct attribute *attrs_empty[] = {
+	NULL,
+};
+
+static struct attribute_group empty_format_group = {
+	.name = "format",
+	.attrs = attrs_empty,
+};
+
+static const struct attribute_group *empty_attr_groups[] = {
+	&empty_format_group,
+	NULL,
+};
+
 PMU_FORMAT_ATTR(rand_en,	"config:57");
 PMU_FORMAT_ATTR(cnt_ctl,	"config:19");
 
-static struct attribute *ibs_fetch_format_attrs[] = {
+static struct attribute *rand_en_attrs[] = {
 	&format_attr_rand_en.attr,
 	NULL,
 };
 
-static struct attribute *ibs_op_format_attrs[] = {
-	NULL,	/* &format_attr_cnt_ctl.attr if IBS_CAPS_OPCNT */
+static struct attribute_group group_rand_en = {
+	.name = "format",
+	.attrs = rand_en_attrs,
+};
+
+static const struct attribute_group *fetch_attr_groups[] = {
+	&group_rand_en,
+	NULL,
+};
+
+static umode_t
+cnt_ctl_is_visible(struct kobject *kobj, struct attribute *attr, int i)
+{
+	return ibs_caps & IBS_CAPS_OPCNT ? attr->mode : 0;
+}
+
+static struct attribute *cnt_ctl_attrs[] = {
+	&format_attr_cnt_ctl.attr,
+	NULL,
+};
+
+static struct attribute_group group_cnt_ctl = {
+	.name = "format",
+	.attrs = cnt_ctl_attrs,
+	.is_visible = cnt_ctl_is_visible,
+};
+
+static const struct attribute_group *op_attr_update[] = {
+	&group_cnt_ctl,
 	NULL,
 };
 
@@ -561,7 +602,6 @@ static struct perf_ibs perf_ibs_fetch = {
 	.max_period		= IBS_FETCH_MAX_CNT << 4,
 	.offset_mask		= { MSR_AMD64_IBSFETCH_REG_MASK },
 	.offset_max		= MSR_AMD64_IBSFETCH_REG_COUNT,
-	.format_attrs		= ibs_fetch_format_attrs,
 
 	.get_count		= get_ibs_fetch_count,
 };
@@ -587,7 +627,6 @@ static struct perf_ibs perf_ibs_op = {
 	.max_period		= IBS_OP_MAX_CNT << 4,
 	.offset_mask		= { MSR_AMD64_IBSOP_REG_MASK },
 	.offset_max		= MSR_AMD64_IBSOP_REG_COUNT,
-	.format_attrs		= ibs_op_format_attrs,
 
 	.get_count		= get_ibs_op_count,
 };
@@ -757,17 +796,6 @@ static __init int perf_ibs_pmu_init(struct perf_ibs *perf_ibs, char *name)
 
 	perf_ibs->pcpu = pcpu;
 
-	/* register attributes */
-	if (perf_ibs->format_attrs[0]) {
-		memset(&perf_ibs->format_group, 0, sizeof(perf_ibs->format_group));
-		perf_ibs->format_group.name	= "format";
-		perf_ibs->format_group.attrs	= perf_ibs->format_attrs;
-
-		memset(&perf_ibs->attr_groups, 0, sizeof(perf_ibs->attr_groups));
-		perf_ibs->attr_groups[0]	= &perf_ibs->format_group;
-		perf_ibs->pmu.attr_groups	= perf_ibs->attr_groups;
-	}
-
 	ret = perf_pmu_register(&perf_ibs->pmu, name, -1);
 	if (ret) {
 		perf_ibs->pcpu = NULL;
@@ -779,7 +807,6 @@ static __init int perf_ibs_pmu_init(struct perf_ibs *perf_ibs, char *name)
 
 static __init int perf_event_ibs_init(void)
 {
-	struct attribute **attr = ibs_op_format_attrs;
 	int ret;
 
 	/*
@@ -792,14 +819,14 @@ static __init int perf_event_ibs_init(void)
 	if (boot_cpu_data.x86 == 0x19 && boot_cpu_data.x86_model < 0x10)
 		perf_ibs_fetch.fetch_ignore_if_zero_rip = 1;
 
+	perf_ibs_fetch.pmu.attr_groups = fetch_attr_groups;
+
 	ret = perf_ibs_pmu_init(&perf_ibs_fetch, "ibs_fetch");
 	if (ret)
 		return ret;
 
-	if (ibs_caps & IBS_CAPS_OPCNT) {
+	if (ibs_caps & IBS_CAPS_OPCNT)
 		perf_ibs_op.config_mask |= IBS_OP_CNT_CTL;
-		*attr++ = &format_attr_cnt_ctl.attr;
-	}
 
 	if (ibs_caps & IBS_CAPS_OPCNTEXT) {
 		perf_ibs_op.max_period  |= IBS_OP_MAX_CNT_EXT_MASK;
@@ -807,6 +834,9 @@ static __init int perf_event_ibs_init(void)
 		perf_ibs_op.cnt_mask    |= IBS_OP_MAX_CNT_EXT_MASK;
 	}
 
+	perf_ibs_op.pmu.attr_groups = empty_attr_groups;
+	perf_ibs_op.pmu.attr_update = op_attr_update;
+
 	ret = perf_ibs_pmu_init(&perf_ibs_op, "ibs_op");
 	if (ret)
 		goto err_op;

  reply	other threads:[~2022-05-11 19:47 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-09  4:49 [PATCH v2 0/8] perf/amd: Zen4 IBS extensions support Ravi Bangoria
2022-05-09  4:49 ` [PATCH v2 1/8] perf/amd/ibs: Cascade pmu init functions' return value Ravi Bangoria
2022-05-11 19:47   ` [tip: perf/core] " tip-bot2 for Ravi Bangoria
2022-05-09  4:49 ` [PATCH v2 2/8] perf/amd/ibs: Use ->is_visible callback for dynamic attributes Ravi Bangoria
2022-05-11 19:47   ` tip-bot2 for Ravi Bangoria [this message]
2022-05-09  4:49 ` [PATCH v2 3/8] perf/amd/ibs: Add support for L3 miss filtering Ravi Bangoria
2022-05-09 12:05   ` Peter Zijlstra
2022-05-09 12:35     ` Ravi Bangoria
2022-05-09 13:07       ` Peter Zijlstra
2022-05-11 19:46   ` [tip: perf/core] " tip-bot2 for Ravi Bangoria
2022-05-09  4:49 ` [PATCH v2 4/8] perf/amd/ibs: Advertise zen4_ibs_extensions as pmu capability attribute Ravi Bangoria
2022-05-11 19:46   ` [tip: perf/core] " tip-bot2 for Ravi Bangoria
2022-05-09  4:49 ` [PATCH v2 5/8] perf record ibs: Warn about sampling period skew Ravi Bangoria
2022-05-16 13:22   ` Arnaldo Carvalho de Melo
2022-05-16 13:27     ` Ravi Bangoria
2022-05-09  4:49 ` [PATCH v2 6/8] perf header: Parse non-cpu pmu capabilities Ravi Bangoria
2022-05-16  4:15   ` Ravi Bangoria
2022-05-16 12:53     ` Arnaldo Carvalho de Melo
2022-05-16 13:28   ` Arnaldo Carvalho de Melo
2022-05-16 13:46     ` Ravi Bangoria
2022-05-09  4:49 ` [PATCH v2 7/8] perf script ibs: Support new IBS bits in raw trace dump Ravi Bangoria
2022-05-16 13:29   ` Arnaldo Carvalho de Melo
2022-05-16 13:47     ` Ravi Bangoria
2022-05-09  4:49 ` [PATCH v2 8/8] perf ibs: Fix comment Ravi Bangoria
2022-05-11 19:46   ` [tip: perf/core] perf/ibs: " tip-bot2 for Ravi Bangoria

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