From: Jianmin Lv <lvjianmin@loongson.cn>
To: Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>
Cc: linux-kernel@vger.kernel.org, Xuefeng Li <lixuefeng@loongson.cn>,
Huacai Chen <chenhuacai@gmail.com>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
Huacai Chen <chenhuacai@loongson.cn>,
Jianmin Lv <lvjianmin@loongson.cn>
Subject: [PATCH RFC 01/10] irqchip: Adjust Kconfig for Loongson
Date: Sun, 15 May 2022 11:37:04 +0800 [thread overview]
Message-ID: <1652585833-22526-2-git-send-email-lvjianmin@loongson.cn> (raw)
In-Reply-To: <1652585833-22526-1-git-send-email-lvjianmin@loongson.cn>
From: Huacai Chen <chenhuacai@loongson.cn>
We are preparing to add new Loongson (based on LoongArch, not compatible
with old MIPS-based Loongson) support. HTVEC will be shared by both old
and new Loongson processors, so we adjust its description. HTPIC is only
used by MIPS-based Loongson, so we add a MIPS dependency. PCH_PIC and
PCH_MSI will have some arch-specific code, so we remove the COMPILE_TEST
dependency to avoid build warnings.
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
---
drivers/irqchip/Kconfig | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 15edb9a..39d6be2 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -556,7 +556,7 @@ config LOONGSON_LIOINTC
config LOONGSON_HTPIC
bool "Loongson3 HyperTransport PIC Controller"
- depends on MACH_LOONGSON64
+ depends on (MACH_LOONGSON64 && MIPS)
default y
select IRQ_DOMAIN
select GENERIC_IRQ_CHIP
@@ -564,16 +564,16 @@ config LOONGSON_HTPIC
Support for the Loongson-3 HyperTransport PIC Controller.
config LOONGSON_HTVEC
- bool "Loongson3 HyperTransport Interrupt Vector Controller"
+ bool "Loongson HyperTransport Interrupt Vector Controller"
depends on MACH_LOONGSON64
default MACH_LOONGSON64
select IRQ_DOMAIN_HIERARCHY
help
- Support for the Loongson3 HyperTransport Interrupt Vector Controller.
+ Support for the Loongson HyperTransport Interrupt Vector Controller.
config LOONGSON_PCH_PIC
bool "Loongson PCH PIC Controller"
- depends on MACH_LOONGSON64 || COMPILE_TEST
+ depends on MACH_LOONGSON64
default MACH_LOONGSON64
select IRQ_DOMAIN_HIERARCHY
select IRQ_FASTEOI_HIERARCHY_HANDLERS
@@ -582,7 +582,7 @@ config LOONGSON_PCH_PIC
config LOONGSON_PCH_MSI
bool "Loongson PCH MSI Controller"
- depends on MACH_LOONGSON64 || COMPILE_TEST
+ depends on MACH_LOONGSON64
depends on PCI
default MACH_LOONGSON64
select IRQ_DOMAIN_HIERARCHY
--
1.8.3.1
next prev parent reply other threads:[~2022-05-15 3:37 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-15 3:37 [PATCH RFC 00/10] irqchip: Add LoongArch-related irqchip drivers Jianmin Lv
2022-05-15 3:37 ` Jianmin Lv [this message]
2022-05-15 3:37 ` [PATCH RFC 02/10] irqchip: Add LoongArch CPU interrupt controller support Jianmin Lv
2022-05-15 3:37 ` [PATCH RFC 03/10] irqchip/loongson-pch-pic: Add ACPI init support Jianmin Lv
2022-05-15 3:37 ` [PATCH RFC 04/10] irqchip/loongson-pch-pic: Add suspend/resume support Jianmin Lv
2022-05-15 3:37 ` [PATCH RFC 05/10] irqchip/loongson-pch-msi: Add ACPI init support Jianmin Lv
2022-05-15 3:37 ` [PATCH RFC 06/10] irqchip/loongson-htvec: " Jianmin Lv
2022-05-16 13:13 ` [PATCH RFC 00/10] irqchip: Add LoongArch-related irqchip drivers Jianmin Lv
2022-05-18 1:52 ` Jianmin Lv
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