From: Jianmin Lv <lvjianmin@loongson.cn>
To: Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>
Cc: linux-kernel@vger.kernel.org, Xuefeng Li <lixuefeng@loongson.cn>,
Huacai Chen <chenhuacai@gmail.com>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
Huacai Chen <chenhuacai@loongson.cn>,
Jianmin Lv <lvjianmin@loongson.cn>
Subject: [PATCH RFC 07/10] irqchip/loongson-htvec: Add suspend/resume support
Date: Sun, 15 May 2022 11:41:59 +0800 [thread overview]
Message-ID: <1652586122-22975-1-git-send-email-lvjianmin@loongson.cn> (raw)
Add suspend/resume support for HTVEC irqchip, which is needed for
suspend/hibernation.
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
---
drivers/irqchip/irq-loongson-htvec.c | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/drivers/irqchip/irq-loongson-htvec.c b/drivers/irqchip/irq-loongson-htvec.c
index 354630b..a3c60e3 100644
--- a/drivers/irqchip/irq-loongson-htvec.c
+++ b/drivers/irqchip/irq-loongson-htvec.c
@@ -16,6 +16,7 @@
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
+#include <linux/syscore_ops.h>
#include "irq-loongarch-pic-common.h"
/* Registers */
@@ -31,6 +32,7 @@ struct htvec {
struct irq_domain *htvec_domain;
raw_spinlock_t htvec_lock;
struct fwnode_handle *domain_handle;
+ u32 saved_vec_en[HTVEC_MAX_PARENT_IRQ];
};
static struct htvec *htvec_priv;
@@ -158,6 +160,29 @@ static void htvec_reset(struct htvec *priv)
}
}
+static int htvec_suspend(void)
+{
+ int i;
+
+ for (i = 0; i < htvec_priv->num_parents; i++)
+ htvec_priv->saved_vec_en[i] = readl(htvec_priv->base + HTVEC_EN_OFF + 4 * i);
+
+ return 0;
+}
+
+static void htvec_resume(void)
+{
+ int i;
+
+ for (i = 0; i < htvec_priv->num_parents; i++)
+ writel(htvec_priv->saved_vec_en[i], htvec_priv->base + HTVEC_EN_OFF + 4 * i);
+}
+
+static struct syscore_ops htvec_syscore_ops = {
+ .suspend = htvec_suspend,
+ .resume = htvec_resume,
+};
+
static int htvec_init(phys_addr_t addr, unsigned long size,
int num_parents, int parent_irq[], struct fwnode_handle *domain_handle)
{
@@ -193,6 +218,8 @@ static int htvec_init(phys_addr_t addr, unsigned long size,
register_syscore_ops(&htvec_syscore_ops);
+ register_syscore_ops(&htvec_syscore_ops);
+
return 0;
iounmap_base:
--
1.8.3.1
next reply other threads:[~2022-05-15 3:42 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-15 3:41 Jianmin Lv [this message]
2022-05-15 3:42 ` [PATCH RFC 08/10] irqchip/loongson-liointc: Add ACPI init support Jianmin Lv
2022-05-15 3:42 ` [PATCH RFC 09/10] irqchip: Add Loongson Extended I/O interrupt controller support Jianmin Lv
2022-05-15 3:42 ` [PATCH RFC 10/10] irqchip: Add Loongson PCH LPC " Jianmin Lv
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