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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id i3-20020a9d53c3000000b0060603221239sm776619oth.9.2022.05.18.06.46.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 May 2022 06:46:12 -0700 (PDT) Received: (nullmailer pid 3186179 invoked by uid 1000); Wed, 18 May 2022 13:46:11 -0000 From: Rob Herring To: AngeloGioacchino Del Regno Cc: marijn.suijten@somainline.org, jason-jh.lin@mediatek.com, konrad.dybcio@somainline.org, linux-kernel@vger.kernel.org, paul.bouchara@somainline.org, krzysztof.kozlowski+dt@linaro.org, phone-devel@vger.kernel.org, y.oudjana@protonmail.com, chun-jie.chen@mediatek.com, sboyd@kernel.org, p.zabel@pengutronix.de, ~postmarketos/upstreaming@lists.sr.ht, matthias.bgg@gmail.com, rex-bc.chen@mediatek.com, mturquette@baylibre.com, kernel@collabora.com, linux-clk@vger.kernel.org, tinghan.shen@mediatek.com, sam.shih@mediatek.com, robh+dt@kernel.org, fparent@baylibre.com, devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, miles.chen@mediatek.com, ck.hu@mediatek.com, ikjn@chromium.org, wenst@chromium.org, linux-arm-kernel@lists.infradead.org, martin.botka@somainline.org, weiyi.lu@mediatek.com, bgolaszewski@baylibre.com In-Reply-To: <20220518111652.223727-5-angelogioacchino.delregno@collabora.com> References: <20220518111652.223727-1-angelogioacchino.delregno@collabora.com> <20220518111652.223727-5-angelogioacchino.delregno@collabora.com> Subject: Re: [PATCH v2 4/7] dt-bindings: clock: mediatek: Add clock driver bindings for MT6795 Date: Wed, 18 May 2022 08:46:11 -0500 Message-Id: <1652881571.539429.3186178.nullmailer@robh.at.kernel.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 18 May 2022 13:16:49 +0200, AngeloGioacchino Del Regno wrote: > Add the bindings for the clock drivers of the MediaTek Helio X10 > MT6795 SoC. > > Signed-off-by: AngeloGioacchino Del Regno > --- > .../bindings/clock/mediatek,mt6795-clock.yaml | 66 +++++++++++++++++ > .../clock/mediatek,mt6795-sys-clock.yaml | 74 +++++++++++++++++++ > 2 files changed, 140 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt6795-clock.yaml > create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: Error: Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.example.dts:35.13-21 syntax error FATAL ERROR: Unable to parse input tree make[1]: *** [scripts/Makefile.lib:364: Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.example.dtb] Error 1 make[1]: *** Waiting for unfinished jobs.... make: *** [Makefile:1401: dt_binding_check] Error 2 doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/ This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.