From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752621AbcLHLyp (ORCPT ); Thu, 8 Dec 2016 06:54:45 -0500 Received: from mga01.intel.com ([192.55.52.88]:19000 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751487AbcLHLyn (ORCPT ); Thu, 8 Dec 2016 06:54:43 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,319,1477983600"; d="scan'208";a="15374641" Subject: Re: [PATCH v4 1/2] mmc: sdhci: export sdhci_execute_tuning() To: Masahiro Yamada , linux-mmc@vger.kernel.org References: <1480903854-22701-1-git-send-email-yamada.masahiro@socionext.com> <1480903854-22701-2-git-send-email-yamada.masahiro@socionext.com> Cc: Ulf Hansson , linux-kernel@vger.kernel.org From: Adrian Hunter Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Message-ID: <1662520f-5605-8991-73b2-f75af5618a52@intel.com> Date: Thu, 8 Dec 2016 13:49:39 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.5.1 MIME-Version: 1.0 In-Reply-To: <1480903854-22701-2-git-send-email-yamada.masahiro@socionext.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/12/16 04:10, Masahiro Yamada wrote: > Some SDHCI-compat controllers support not only SD, but also eMMC, > but they use different commands for tuning: CMD19 for SD, CMD21 for > eMMC. > > Due to the difference of the underlying mechanism, some controllers > (at least, the Cadence IP is the case) provide their own registers > for the eMMC tuning. > > This commit will be useful when we want to override .execute_tuning > callback (for eMMC HS200 tuning), but still let it fall back to > sdhci_execute_tuning() for SD timing. > > Signed-off-by: Masahiro Yamada Adrian Hunter > --- > > I want to use this in the next commit. > The Cadence IP supports eMMC as well as SD. > > I want to re-use the sdhci_execute_tuning() for SD timing. > > On the other hand, Cadence provides its own way for eMMC HS200 tuning; > I need to touch some registers that are specific to Cadence's design. > > > Changes in v4: > - export sdhci_execute_tuning() instead of using > execute_execute_tuning() > > Changes in v3: None > Changes in v2: None > > drivers/mmc/host/sdhci.c | 3 ++- > drivers/mmc/host/sdhci.h | 1 + > 2 files changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c > index 42ef3eb..0c03a89 100644 > --- a/drivers/mmc/host/sdhci.c > +++ b/drivers/mmc/host/sdhci.c > @@ -1948,7 +1948,7 @@ static int sdhci_prepare_hs400_tuning(struct mmc_host *mmc, struct mmc_ios *ios) > return 0; > } > > -static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode) > +int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode) > { > struct sdhci_host *host = mmc_priv(mmc); > u16 ctrl; > @@ -2141,6 +2141,7 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode) > spin_unlock_irqrestore(&host->lock, flags); > return err; > } > +EXPORT_SYMBOL_GPL(sdhci_execute_tuning); > > static int sdhci_select_drive_strength(struct mmc_card *card, > unsigned int max_dtr, int host_drv, > diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h > index 9c35776..786eee9 100644 > --- a/drivers/mmc/host/sdhci.h > +++ b/drivers/mmc/host/sdhci.h > @@ -689,6 +689,7 @@ void sdhci_set_power_noreg(struct sdhci_host *host, unsigned char mode, > void sdhci_set_bus_width(struct sdhci_host *host, int width); > void sdhci_reset(struct sdhci_host *host, u8 mask); > void sdhci_set_uhs_signaling(struct sdhci_host *host, unsigned timing); > +int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode); > > #ifdef CONFIG_PM > extern int sdhci_suspend_host(struct sdhci_host *host); >