From: Richard Zhu <hongxing.zhu@nxp.com>
To: l.stach@pengutronix.de, bhelgaas@google.com, robh+dt@kernel.org,
lorenzo.pieralisi@arm.com, shawnguo@kernel.org, kishon@ti.com,
kw@linux.com, frank.li@nxp.com
Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@pengutronix.de,
linux-imx@nxp.com
Subject: [PATCH v3 13/14] PCI: imx6: Add iMX8MQ PCIe EP support
Date: Fri, 23 Sep 2022 14:06:59 +0800 [thread overview]
Message-ID: <1663913220-9523-14-git-send-email-hongxing.zhu@nxp.com> (raw)
In-Reply-To: <1663913220-9523-1-git-send-email-hongxing.zhu@nxp.com>
Add the iMX8MQ PCIe EP support
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 36 +++++++++++++++++++++++----
1 file changed, 31 insertions(+), 5 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 1044b0726405..931243e36252 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -53,6 +53,7 @@ enum imx6_pcie_variants {
IMX8MM,
IMX8MP,
IMX8MM_EP,
+ IMX8MQ_EP,
};
#define IMX6_PCIE_FLAG_IMX6_PHY BIT(0)
@@ -154,6 +155,7 @@ struct imx6_pcie {
static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie)
{
WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ &&
+ imx6_pcie->drvdata->variant != IMX8MQ_EP &&
imx6_pcie->drvdata->variant != IMX8MM &&
imx6_pcie->drvdata->variant != IMX8MM_EP &&
imx6_pcie->drvdata->variant != IMX8MP);
@@ -169,13 +171,22 @@ static void imx6_pcie_configure_type(struct imx6_pcie *imx6_pcie)
else
mode = PCI_EXP_TYPE_ROOT_PORT;
- if (imx6_pcie->drvdata->variant == IMX8MQ &&
- imx6_pcie->controller_id == 1) {
- mask = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE;
- val = FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE, mode);
- } else {
+ switch (imx6_pcie->drvdata->variant) {
+ case IMX8MQ:
+ case IMX8MQ_EP:
+ if (imx6_pcie->controller_id == 1) {
+ mask = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE;
+ val = FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE,
+ mode);
+ } else {
+ mask = IMX6Q_GPR12_DEVICE_TYPE;
+ val = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, mode);
+ }
+ break;
+ default:
mask = IMX6Q_GPR12_DEVICE_TYPE;
val = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, mode);
+ break;
}
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val);
@@ -318,6 +329,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)
*/
break;
case IMX8MQ:
+ case IMX8MQ_EP:
/*
* TODO: Currently this code assumes external
* oscillator is being used
@@ -570,6 +582,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
case IMX8MM:
case IMX8MM_EP:
case IMX8MQ:
+ case IMX8MQ_EP:
case IMX8MP:
ret = clk_prepare_enable(imx6_pcie->pcie_aux);
if (ret) {
@@ -616,6 +629,7 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie *imx6_pcie)
case IMX8MM:
case IMX8MM_EP:
case IMX8MQ:
+ case IMX8MQ_EP:
case IMX8MP:
clk_disable_unprepare(imx6_pcie->pcie_aux);
break;
@@ -681,6 +695,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
switch (imx6_pcie->drvdata->variant) {
case IMX7D:
case IMX8MQ:
+ case IMX8MQ_EP:
reset_control_assert(imx6_pcie->pciephy_reset);
fallthrough;
case IMX8MM:
@@ -723,6 +738,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
switch (imx6_pcie->drvdata->variant) {
case IMX8MQ:
+ case IMX8MQ_EP:
reset_control_deassert(imx6_pcie->pciephy_reset);
break;
case IMX7D:
@@ -811,6 +827,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev)
break;
case IMX7D:
case IMX8MQ:
+ case IMX8MQ_EP:
case IMX8MM:
case IMX8MM_EP:
case IMX8MP:
@@ -832,6 +849,7 @@ static void imx6_pcie_ltssm_disable(struct device *dev)
break;
case IMX7D:
case IMX8MQ:
+ case IMX8MQ_EP:
case IMX8MM:
case IMX8MM_EP:
case IMX8MP:
@@ -1085,6 +1103,7 @@ static int imx6_add_pcie_ep(struct imx6_pcie *imx6_pcie,
switch (imx6_pcie->drvdata->variant) {
case IMX8MM_EP:
+ case IMX8MQ_EP:
pcie_dbi2_offset = SZ_1M;
break;
default:
@@ -1272,6 +1291,7 @@ static int imx6_pcie_probe(struct platform_device *pdev)
"pcie_inbound_axi clock missing or invalid\n");
break;
case IMX8MQ:
+ case IMX8MQ_EP:
imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux");
if (IS_ERR(imx6_pcie->pcie_aux))
return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_aux),
@@ -1462,6 +1482,11 @@ static const struct imx6_pcie_drvdata drvdata[] = {
.mode = DW_PCIE_EP_TYPE,
.gpr = "fsl,imx8mm-iomuxc-gpr",
},
+ [IMX8MQ_EP] = {
+ .variant = IMX8MQ_EP,
+ .mode = DW_PCIE_EP_TYPE,
+ .gpr = "fsl,imx8mq-iomuxc-gpr",
+ },
};
static const struct of_device_id imx6_pcie_of_match[] = {
@@ -1473,6 +1498,7 @@ static const struct of_device_id imx6_pcie_of_match[] = {
{ .compatible = "fsl,imx8mm-pcie", .data = &drvdata[IMX8MM], },
{ .compatible = "fsl,imx8mp-pcie", .data = &drvdata[IMX8MP], },
{ .compatible = "fsl,imx8mm-pcie-ep", .data = &drvdata[IMX8MM_EP], },
+ { .compatible = "fsl,imx8mq-pcie-ep", .data = &drvdata[IMX8MQ_EP], },
{},
};
--
2.25.1
next prev parent reply other threads:[~2022-09-23 6:26 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-23 6:06 [PATCH v3 0/14] Add iMX PCIe EP mode support Richard Zhu
2022-09-23 6:06 ` [PATCH v3 01/14] dt-bindings: imx6q-pcie: Add iMX8MM PCIe EP mode compatible string Richard Zhu
2022-09-23 6:06 ` [PATCH v3 02/14] dt-bindings: imx6q-pcie: Add iMX8MQ " Richard Zhu
2022-09-23 6:06 ` [PATCH v3 03/14] dt-bindings: imx6q-pcie: Add iMX8MP " Richard Zhu
2022-09-26 22:53 ` Rob Herring
2022-09-23 6:06 ` [PATCH v3 04/14] PCI: dwc: Kconfig: Add iMX PCIe EP mode support Richard Zhu
2022-09-23 14:15 ` Bjorn Helgaas
2022-09-26 5:24 ` Hongxing Zhu
2022-09-23 6:06 ` [PATCH v3 05/14] arm64: dts: Add iMX8MM PCIe EP support Richard Zhu
2022-09-23 14:02 ` Bjorn Helgaas
2022-09-26 5:16 ` Hongxing Zhu
2022-09-23 6:06 ` [PATCH v3 06/14] arm64: dts: Add iMX8MM PCIe EP support on EVK board Richard Zhu
2022-09-23 6:06 ` [PATCH v3 07/14] arm64: dts: Add iMX8MQ PCIe EP support Richard Zhu
2022-09-23 6:06 ` [PATCH v3 08/14] arm64: dts: Add iMX8MQ PCIe EP support on EVK board Richard Zhu
2022-09-23 6:06 ` [PATCH v3 09/14] arm64: dts: Add iMX8MP PCIe EP support Richard Zhu
2022-09-23 6:06 ` [PATCH v3 10/14] arm64: dts: Add iMX8MP PCIe EP support on EVK board Richard Zhu
2022-09-23 6:06 ` [PATCH v3 11/14] misc: pci_endpoint_test: Add iMX8 PCIe EP device support Richard Zhu
2022-09-23 6:06 ` [PATCH v3 12/14] PCI: imx6: Add iMX8MM PCIe EP mode Richard Zhu
2022-09-23 6:06 ` Richard Zhu [this message]
2022-09-23 6:07 ` [PATCH v3 14/14] PCI: imx6: Add iMX8MP PCIe EP support Richard Zhu
2022-09-23 13:53 ` [PATCH v3 0/14] Add iMX PCIe EP mode support Bjorn Helgaas
2022-09-26 5:17 ` Hongxing Zhu
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