From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA2ECC4332F for ; Wed, 30 Nov 2022 04:20:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232900AbiK3EUB (ORCPT ); Tue, 29 Nov 2022 23:20:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56120 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232801AbiK3ET5 (ORCPT ); Tue, 29 Nov 2022 23:19:57 -0500 Received: from wout3-smtp.messagingengine.com (wout3-smtp.messagingengine.com [64.147.123.19]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 848322C652; Tue, 29 Nov 2022 20:19:56 -0800 (PST) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.west.internal (Postfix) with ESMTP id D7146320027A; Tue, 29 Nov 2022 23:19:54 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute1.internal (MEProxy); Tue, 29 Nov 2022 23:19:56 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= cc:cc:content-transfer-encoding:content-type:date:date:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to; s=fm2; t=1669781994; x= 1669868394; bh=geF09RMhVzrmblG0AWI/JlVzOQzpfQlKgZsik6BhT/Q=; b=q AUMqP4zTpNErCbXaqgejwie3I7jfnINQbuBXdm6RBdnJj0cMBxlhJ8peQKJJHFXy dUKPXcEEce76resM5bYw5d9DytKDUTNZRNHwaExYpVhn/wNLaMkMr3gdEaOwRjus J5x5BqILonmpOho1O+MWdO4ZKLczwMV6P85KpK2AHYhW79RZkbQFBCXmZNaPuo6f jB5MQlh2YIWbUGxttakYcCYKjlQ6Z3uR53lB5QFlbHpSsrxG2pzL3uHu6O2bGiCe 4zaU+0eDRpZthF9CMXJXj5hHSDKleeedPkTHzm53HAAHh5cL1jJuidjvSSl3ZMah zwxvEQowwEk8g+dt2eUkA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm1; t=1669781994; x= 1669868394; bh=geF09RMhVzrmblG0AWI/JlVzOQzpfQlKgZsik6BhT/Q=; b=U kL3LG9ZijG0AaGC6IQEQ3koQvXCOqDOngKqlqkOfqSs9KLk/YbFGPxofnr4Oa/Sh XvSIBZUileRUFWkJvJ53OesPMSDnqxOC4BCNr2kz3OhCZ2i/Y8G5wTYie0pw0Z0I 7EbM32FlxJHNL09wx7EAZIIJxrR+4i7xj3XogZ2TPYMMAC4Dg3tdN0p4p9vf48jQ Qx8+YEgkM9Ni8ZrZmbBP8a1Eq0WgjA5YEVweFfKdlyiBXbcWFHwIU7oxu3c5WHfv 8sFltOQv4/ub2ZqYKrFWLedPDA6f0emVefo2tKUiZ1EG8tFtRSNgimcN/dymplB7 mM5GvQZVOsw+imYkx+eIw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvhedrtddvgdeikecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefkffggfgfvvehfhffujggtgfesthejredttdefjeenucfhrhhomhepufgrmhhu vghlucfjohhllhgrnhguuceoshgrmhhuvghlsehshhholhhlrghnugdrohhrgheqnecugg ftrfgrthhtvghrnhepheettdefgeeuudelvdffleejheejueeludduiedvkeffgeetueev vdelvdetfeejnecuffhomhgrihhnpehkvghrnhgvlhdrohhrghenucevlhhushhtvghruf hiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpehsrghmuhgvlhesshhhohhllhgr nhgurdhorhhg X-ME-Proxy: Feedback-ID: i0ad843c9:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Tue, 29 Nov 2022 23:19:53 -0500 (EST) Message-ID: <167c5c23-2863-7882-15ea-e251ed3caf8d@sholland.org> Date: Tue, 29 Nov 2022 22:19:52 -0600 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux ppc64le; rv:102.0) Gecko/20100101 Thunderbird/102.3.3 Content-Language: en-US To: Anup Patel , Rob Herring , Krzysztof Kozlowski , Palmer Dabbelt , Paul Walmsley , Daniel Lezcano , Thomas Gleixner Cc: Andrew Jones , Atish Patra , Conor Dooley , Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org References: <20221129140313.886192-1-apatel@ventanamicro.com> <20221129140313.886192-2-apatel@ventanamicro.com> From: Samuel Holland Subject: Re: [PATCH v4 1/3] RISC-V: time: initialize broadcast hrtimer based clock event device In-Reply-To: <20221129140313.886192-2-apatel@ventanamicro.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/29/22 08:03, Anup Patel wrote: > From: Conor Dooley > > Similarly to commit 022eb8ae8b5e ("ARM: 8938/1: kernel: initialize > broadcast hrtimer based clock event device"), RISC-V needs to initiate > hrtimers before C3STOP can be used. Otherwise, the introduction of C3STOP Specifically it is the hrtimer-based broadcast clockevent that we need to initialize, not hrtimers as a whole. > for the RISC-V arch timer in commit 232ccac1bd9b > ("clocksource/drivers/riscv: Events are stopped during CPU suspend") Maybe add some more details here: ... leaves us without any broadcast timer registered. This prevents the kernel from entering oneshot mode, which ... > breaks timer behaviour, for example clock_nanosleep(). > > A test app that sleeps each cpu for 6, 5, 4, 3 ms respectively, HZ=250 > & C3STOP enabled, the sleep times are rounded up to the next jiffy: > == CPU: 1 == == CPU: 2 == == CPU: 3 == == CPU: 4 == > Mean: 7.974992 Mean: 7.976534 Mean: 7.962591 Mean: 3.952179 > Std Dev: 0.154374 Std Dev: 0.156082 Std Dev: 0.171018 Std Dev: 0.076193 > Hi: 9.472000 Hi: 10.495000 Hi: 8.864000 Hi: 4.736000 > Lo: 6.087000 Lo: 6.380000 Lo: 4.872000 Lo: 3.403000 > Samples: 521 Samples: 521 Samples: 521 Samples: 521 > > Link: https://lore.kernel.org/linux-riscv/YzYTNQRxLr7Q9JR0@spud/ > Fixes: 232ccac1bd9b ("clocksource/drivers/riscv: Events are stopped during CPU suspend") > Suggested-by: Samuel Holland > Signed-off-by: Conor Dooley Either way: Reviewed-by: Samuel Holland > --- > arch/riscv/kernel/time.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/riscv/kernel/time.c b/arch/riscv/kernel/time.c > index 8217b0f67c6c..1cf21db4fcc7 100644 > --- a/arch/riscv/kernel/time.c > +++ b/arch/riscv/kernel/time.c > @@ -5,6 +5,7 @@ > */ > > #include > +#include > #include > #include > #include > @@ -29,6 +30,8 @@ void __init time_init(void) > > of_clk_init(NULL); > timer_probe(); > + > + tick_setup_hrtimer_broadcast(); > } > > void clocksource_arch_init(struct clocksource *cs)