From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: Stephen Boyd <sboyd@kernel.org>, mturquette@baylibre.com
Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
matthias.bgg@gmail.com, edward-jw.yang@mediatek.com,
johnson.wang@mediatek.com, wenst@chromium.org,
miles.chen@mediatek.com, chun-jie.chen@mediatek.com,
rex-bc.chen@mediatek.com, jose.exposito89@gmail.com,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
kernel@collabora.com
Subject: Re: [PATCH v1 0/6] MediaTek Frequency Hopping: MT6795/8173/92/95
Date: Thu, 26 Jan 2023 09:42:00 +0100 [thread overview]
Message-ID: <1684cd8a-5766-0bcb-3301-ce517d39c370@collabora.com> (raw)
In-Reply-To: <5036f36916e12429d6f853049a2e5836.sboyd@kernel.org>
Il 26/01/23 03:07, Stephen Boyd ha scritto:
> Quoting AngeloGioacchino Del Regno (2022-12-22 07:51:41)
>> This series adds support for Frequency Hopping (FHCTL) on more MediaTek
>> SoCs, specifically, MT6795, MT8173, MT8192 and MT8195.
>>
>> In order to support older platforms like MT6795 and MT8173 it was
>> necessary to add a new register layout that is ever-so-slightly
>> different from the one that was previously introduced for MT8186.
>>
>> Since the new layout refers to older SoCs, the one valid for MT8186
>> and newer SoCs was renamed to be a "v2" layout, while the new one
>> for older chips gets the "v1" name.
>>
>> Note: These commits won't change any behavior unless FHCTL gets
>> explicitly enabled and configured in devicetrees.
>
> Can you resend this? It conflicts with your latest cleanup series.
Right. Sorry about forgetting to update this one - will rebase and
resend today.
Thanks!
Angelo
prev parent reply other threads:[~2023-01-26 8:42 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-22 15:51 [PATCH v1 0/6] MediaTek Frequency Hopping: MT6795/8173/92/95 AngeloGioacchino Del Regno
2022-12-22 15:51 ` [PATCH v1 1/6] clk: mediatek: fhctl: Add support for older fhctl register layout AngeloGioacchino Del Regno
2022-12-22 15:51 ` [PATCH v1 2/6] dt-bindings: clock: mediatek,mt8186-fhctl: Support MT6795, MT8173/92/95 AngeloGioacchino Del Regno
2022-12-22 20:32 ` Rob Herring
2022-12-22 15:51 ` [PATCH v1 3/6] clk: mediatek: mt6795: Add support for frequency hopping through FHCTL AngeloGioacchino Del Regno
2022-12-22 15:51 ` [PATCH v1 4/6] clk: mediatek: mt8173: " AngeloGioacchino Del Regno
2022-12-22 15:51 ` [PATCH v1 5/6] clk: mediatek: mt8192: " AngeloGioacchino Del Regno
2022-12-22 15:51 ` [PATCH v1 6/6] clk: mediatek: mt8195: " AngeloGioacchino Del Regno
2022-12-22 15:54 ` [PATCH v1 0/6] MediaTek Frequency Hopping: MT6795/8173/92/95 AngeloGioacchino Del Regno
2023-01-26 2:07 ` Stephen Boyd
2023-01-26 8:42 ` AngeloGioacchino Del Regno [this message]
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