From: Mrinmay Sarkar <quic_msarkar@quicinc.com>
To: agross@kernel.org, andersson@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
konrad.dybcio@linaro.org, mani@kernel.org
Cc: quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com,
quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com,
dmitry.baryshkov@linaro.org, robh@kernel.org,
quic_krichai@quicinc.com, quic_vbadigan@quicinc.com,
quic_parass@quicinc.com,
"Mrinmay Sarkar" <quic_msarkar@quicinc.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Vinod Koul" <vkoul@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
mhi@lists.linux.dev, linux-phy@lists.infradead.org
Subject: [PATCH v2 1/4] dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC
Date: Wed, 11 Oct 2023 16:48:26 +0530 [thread overview]
Message-ID: <1697023109-23671-2-git-send-email-quic_msarkar@quicinc.com> (raw)
In-Reply-To: <1697023109-23671-1-git-send-email-quic_msarkar@quicinc.com>
Add devicetree bindings support for SA8775P SoC.
Define reg and interrupt per platform.
Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
---
.../devicetree/bindings/pci/qcom,pcie-ep.yaml | 131 +++++++++++++++++----
1 file changed, 109 insertions(+), 22 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
index a223ce0..8f219a6e 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
@@ -13,36 +13,28 @@ properties:
compatible:
oneOf:
- enum:
+ - qcom,sa8775p-pcie-ep
- qcom,sdx55-pcie-ep
- qcom,sm8450-pcie-ep
- items:
+ - const: qcom,sa8775p-pcie-ep
- const: qcom,sdx65-pcie-ep
- const: qcom,sdx55-pcie-ep
reg:
- items:
- - description: Qualcomm-specific PARF configuration registers
- - description: DesignWare PCIe registers
- - description: External local bus interface registers
- - description: Address Translation Unit (ATU) registers
- - description: Memory region used to map remote RC address space
- - description: BAR memory region
+ minItems: 6
+ maxItems: 7
reg-names:
- items:
- - const: parf
- - const: dbi
- - const: elbi
- - const: atu
- - const: addr_space
- - const: mmio
+ minItems: 6
+ maxItems: 7
clocks:
- minItems: 7
+ minItems: 5
maxItems: 8
clock-names:
- minItems: 7
+ minItems: 5
maxItems: 8
qcom,perst-regs:
@@ -57,14 +49,12 @@ properties:
- description: Perst separation enable offset
interrupts:
- items:
- - description: PCIe Global interrupt
- - description: PCIe Doorbell interrupt
+ minItems: 2
+ maxItems: 3
interrupt-names:
- items:
- - const: global
- - const: doorbell
+ minItems: 2
+ maxItems: 3
reset-gpios:
description: GPIO used as PERST# input signal
@@ -122,6 +112,51 @@ allOf:
compatible:
contains:
enum:
+ - qcom,sa8775p-pcie-ep
+ then:
+ properties:
+ reg:
+ items:
+ - description: Qualcomm-specific PARF configuration registers
+ - description: DesignWare PCIe registers
+ - description: External local bus interface registers
+ - description: Address Translation Unit (ATU) registers
+ - description: Memory region used to map remote RC address space
+ - description: BAR memory region
+ - description: DMA register space
+ reg-names:
+ items:
+ - const: parf
+ - const: dbi
+ - const: elbi
+ - const: atu
+ - const: addr_space
+ - const: mmio
+ - const: dma
+ else:
+ properties:
+ reg:
+ items:
+ - description: Qualcomm-specific PARF configuration registers
+ - description: DesignWare PCIe registers
+ - description: External local bus interface registers
+ - description: Address Translation Unit (ATU) registers
+ - description: Memory region used to map remote RC address space
+ - description: BAR memory region
+ reg-names:
+ items:
+ - const: parf
+ - const: dbi
+ - const: elbi
+ - const: atu
+ - const: addr_space
+ - const: mmio
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
- qcom,sdx55-pcie-ep
then:
properties:
@@ -173,6 +208,58 @@ allOf:
- const: ddrss_sf_tbu
- const: aggre_noc_axi
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sa8775-pcie-ep
+ then:
+ properties:
+ clocks:
+ items:
+ - description: PCIe Auxiliary clock
+ - description: PCIe CFG AHB clock
+ - description: PCIe Master AXI clock
+ - description: PCIe Slave AXI clock
+ - description: PCIe Slave Q2A AXI clock
+ clock-names:
+ items:
+ - const: aux
+ - const: cfg
+ - const: bus_master
+ - const: bus_slave
+ - const: slave_q2a
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sa8775p-pcie-ep
+ then:
+ properties:
+ interrupts:
+ items:
+ - description: PCIe Global interrupt
+ - description: PCIe Doorbell interrupt
+ - description: DMA interrupt
+ interrupt-names:
+ items:
+ - const: global
+ - const: doorbell
+ - const: dma
+ else:
+ properties:
+ interrupts:
+ items:
+ - description: PCIe Global interrupt
+ - description: PCIe Doorbell interrupt
+ interrupt-names:
+ items:
+ - const: global
+ - const: doorbell
+
unevaluatedProperties: false
examples:
--
2.7.4
next prev parent reply other threads:[~2023-10-11 11:19 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-11 11:18 [PATCH v2 0/4] arm64: qcom: sa8775p: add support for EP PCIe Mrinmay Sarkar
2023-10-11 11:18 ` Mrinmay Sarkar [this message]
2023-10-11 18:30 ` [PATCH v2 1/4] dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC Krzysztof Kozlowski
2023-10-11 11:18 ` [PATCH v2 2/4] phy: qcom-qmp-pcie: add endpoint support for sa8775p Mrinmay Sarkar
2023-10-11 11:36 ` Dmitry Baryshkov
2023-10-11 11:55 ` Mrinmay Sarkar
2023-10-11 12:00 ` Dmitry Baryshkov
2023-10-11 11:18 ` [PATCH v2 3/4] PCI: epf-mhi: Add support for SA8775P Mrinmay Sarkar
2023-10-11 13:42 ` kernel test robot
2023-10-19 12:45 ` Krzysztof Kozlowski
2023-10-11 11:18 ` [PATCH v2 4/4] arm64: dts: qcom: sa8775p: Add ep pcie0 controller node Mrinmay Sarkar
2023-10-16 18:30 ` Bjorn Andersson
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