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([2601:646:c200:1ef2:4d40:e377:cfa4:3246]) by smtp.gmail.com with ESMTPSA id w1sm5603317pgh.9.2019.05.31.11.44.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 31 May 2019 11:44:20 -0700 (PDT) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (1.0) Subject: Re: [RFC PATCH v2 11/12] x86/mm/tlb: Use async and inline messages for flushing From: Andy Lutomirski X-Mailer: iPhone Mail (16E227) In-Reply-To: <20190531105758.GO2623@hirez.programming.kicks-ass.net> Date: Fri, 31 May 2019 11:44:19 -0700 Cc: Nadav Amit , Andy Lutomirski , Borislav Petkov , Dave Hansen , Ingo Molnar , Thomas Gleixner , x86@kernel.org, linux-kernel@vger.kernel.org, Dave Hansen Content-Transfer-Encoding: quoted-printable Message-Id: <16D8E001-98A0-4ABC-AFE8-0F230B869027@amacapital.net> References: <20190531063645.4697-1-namit@vmware.com> <20190531063645.4697-12-namit@vmware.com> <20190531105758.GO2623@hirez.programming.kicks-ass.net> To: Peter Zijlstra Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > On May 31, 2019, at 3:57 AM, Peter Zijlstra wrote: >=20 >> On Thu, May 30, 2019 at 11:36:44PM -0700, Nadav Amit wrote: >> When we flush userspace mappings, we can defer the TLB flushes, as long >> the following conditions are met: >>=20 >> 1. No tables are freed, since otherwise speculative page walks might >> cause machine-checks. >>=20 >> 2. No one would access userspace before flush takes place. Specifically, >> NMI handlers and kprobes would avoid accessing userspace. >>=20 >> Use the new SMP support to execute remote function calls with inlined >> data for the matter. The function remote TLB flushing function would be >> executed asynchronously and the local CPU would continue execution as >> soon as the IPI was delivered, before the function was actually >> executed. Since tlb_flush_info is copied, there is no risk it would >> change before the TLB flush is actually executed. >>=20 >> Change nmi_uaccess_okay() to check whether a remote TLB flush is >> currently in progress on this CPU by checking whether the asynchronously >> called function is the remote TLB flushing function. The current >> implementation disallows access in such cases, but it is also possible >> to flush the entire TLB in such case and allow access. >=20 > ARGGH, brain hurt. I'm not sure I fully understand this one. How is it > different from today, where the NMI can hit in the middle of the TLB > invalidation? >=20 > Also; since we're not waiting on the IPI, what prevents us from freeing > the user pages before the remote CPU is 'done' with them? Currently the > synchronous IPI is like a sync point where we *know* the remote CPU is > completely done accessing the page. >=20 > Where getting an IPI stops speculation, speculation again restarts > inside the interrupt handler, and until we've passed the INVLPG/MOV CR3, > speculation can happen on that TLB entry, even though we've already > freed and re-used the user-page. >=20 > Also, what happens if the TLB invalidation IPI is stuck behind another > smp_function_call IPI that is doing user-access? >=20 > As said,.. brain hurts. Speculation aside, any code doing dirty tracking needs the flush to happen f= or real before it reads the dirty bit. How does this patch guarantee that the flush is really done before someone d= epends on it?=