From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754993AbcL0REf (ORCPT ); Tue, 27 Dec 2016 12:04:35 -0500 Received: from gloria.sntech.de ([95.129.55.99]:33991 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751136AbcL0REe (ORCPT ); Tue, 27 Dec 2016 12:04:34 -0500 From: Heiko Stuebner To: Xing Zheng Cc: linux-rockchip@lists.infradead.org, robh+dt@kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, dianders@chromium.org, wxt@rock-chips.com, shawn.lin@rock-chips.com, briannorris@chromium.org, jay.xu@rock-chips.com, zhangqing@rock-chips.com, david.wu@rock-chips.com, wulf@rock-chips.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dianders@google.com, frank.wang@rock-chips.com Subject: Re: [RESEND PATCH v2] arm64: dts: rockchip: add u2phy clock for ehci and ohci of rk3399 Date: Tue, 27 Dec 2016 18:04:26 +0100 Message-ID: <1731551.Q6cHK6n5ZM@phil> User-Agent: KMail/5.2.3 (Linux/4.8.0-1-amd64; KDE/5.27.0; x86_64; ; ) In-Reply-To: <1482316865-2769-1-git-send-email-zhengxing@rock-chips.com> References: <1482316182-2305-1-git-send-email-zhengxing@rock-chips.com> <1482316865-2769-1-git-send-email-zhengxing@rock-chips.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Mittwoch, 21. Dezember 2016, 18:41:05 CET schrieb Xing Zheng: > From: William wu > > We found that the suspend process was blocked when it run into > ehci/ohci module due to clk-480m of usb2-phy was disabled. > > The root cause is that usb2-phy suspended earlier than ehci/ohci > (usb2-phy will be auto suspended if no devices plug-in). and the > clk-480m provided by it was disabled if no module used. However, > some suspend process related ehci/ohci are base on this clock, > so we should refer it into ehci/ohci driver to prevent this case. > > The u2phy clock flow like this: > === > u2phy ________________ > > | | |-----> UTMI_CLK ---------> | EHCI | > > OSC_24M ---|---> PHY_PLL----|----| > > |________^_______| |-----> 480M_CLK ---|G|---> | > |USBPHY_480M_SRC| ----> USBPHY_480M for SoC > GRF > === > > Signed-off-by: William wu > Signed-off-by: Xing Zheng applied for 4.11 with Doug's Review-tag Thanks Heiko