From: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
To: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
Arnd Bergmann <arnd@arndb.de>,
Peter Zijlstra <peterz@infradead.org>,
"Paul E. McKenney" <paulmck@linux.vnet.ibm.com>,
Boqun Feng <boqun.feng@gmail.com>,
Catalin Marinas <catalin.marinas@arm.com>,
peter maydell <peter.maydell@linaro.org>,
Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH 3/3] rseq/selftests: Add support for arm64
Date: Thu, 28 Jun 2018 16:50:40 -0400 (EDT) [thread overview]
Message-ID: <176714835.9396.1530219040151.JavaMail.zimbra@efficios.com> (raw)
In-Reply-To: <20180628164700.GD10751@arm.com>
----- On Jun 28, 2018, at 12:47 PM, Will Deacon will.deacon@arm.com wrote:
> Hi Mathieu,
>
> On Tue, Jun 26, 2018 at 12:11:52PM -0400, Mathieu Desnoyers wrote:
>> ----- On Jun 26, 2018, at 11:14 AM, Will Deacon will.deacon@arm.com wrote:
>> > On Mon, Jun 25, 2018 at 02:10:10PM -0400, Mathieu Desnoyers wrote:
>> >> I notice you are using the instructions
>> >>
>> >> adrp
>> >> add
>> >> str
>> >>
>> >> to implement RSEQ_ASM_STORE_RSEQ_CS(). Did you compare
>> >> performance-wise with an approach using a literal pool
>> >> near the instruction pointer like I did on arm32 ?
>> >
>> > I didn't, no. Do you have a benchmark to hand so I can give this a go?
>>
>> see tools/testing/selftests/rseq/param_test_benchmark --help
>>
>> It's a stripped-down version of param_test, without all the code for
>> delay loops and testing checks.
>>
>> Example use for counter increment with 4 threads, doing 5G counter
>> increments per thread:
>>
>> time ./param_test_benchmark -T i -t 4 -r 5000000000
>
> Thanks. I ran that on a few arm64 systems I have access to, with three
> configurations of the selftest:
>
> 1. As I posted
> 2. With the abort signature and branch in-lined, so as to avoid the CBNZ
> address limitations in large codebases
> 3. With both the abort handler and the table inlined (i.e. the same thing
> as 32-bit).
>
> There isn't a reliably measurable difference between (1) and (2), but I take
> between 12% and 27% hit between (2) and (3).
Those results puzzle me. Do you have the actual code snippets of each
implementation nearby ?
Thanks,
Mathieu
>
> So I'll post a v2 based on (2).
>
> Will
--
Mathieu Desnoyers
EfficiOS Inc.
http://www.efficios.com
next prev parent reply other threads:[~2018-06-28 20:50 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-25 17:54 [PATCH 0/3] Support rseq on arm64 Will Deacon
2018-06-25 17:54 ` [PATCH 1/3] arm64: rseq: Implement backend rseq calls and select HAVE_RSEQ Will Deacon
2018-06-26 10:31 ` Mark Rutland
2018-06-25 17:54 ` [PATCH 2/3] asm-generic: unistd.h: Wire up sys_rseq Will Deacon
2018-06-25 17:54 ` [PATCH 3/3] rseq/selftests: Add support for arm64 Will Deacon
2018-06-25 18:10 ` Mathieu Desnoyers
2018-06-26 15:14 ` Will Deacon
2018-06-26 16:11 ` Mathieu Desnoyers
2018-06-28 16:47 ` Will Deacon
2018-06-28 20:50 ` Mathieu Desnoyers [this message]
2018-07-02 16:49 ` Will Deacon
2018-07-02 17:47 ` Mathieu Desnoyers
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