From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932504AbcGHJpG (ORCPT ); Fri, 8 Jul 2016 05:45:06 -0400 Received: from mout.kundenserver.de ([212.227.126.131]:58296 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754086AbcGHJgZ (ORCPT ); Fri, 8 Jul 2016 05:36:25 -0400 From: Arnd Bergmann To: Niklas Cassel Cc: bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, Niklas Cassel Subject: Re: [PATCH] bindings: PCI: artpec: correct pci binding example Date: Fri, 08 Jul 2016 11:39:24 +0200 Message-ID: <1838529.X3K6mcn6MA@wuerfel> User-Agent: KMail/5.1.3 (Linux/4.4.0-22-generic; KDE/5.18.0; x86_64; ; ) In-Reply-To: <1467934090-12834-1-git-send-email-niklass@axis.com> References: <1467934090-12834-1-git-send-email-niklass@axis.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:EP9Xt+WbCaXPOoYky8pib1Poxt1Vryp2394ocpaOXS8xvkwxtu/ TDI/BWqQ1G/SXJTcFJF4HHeFXBXaxBmuh948IX/zPMvH43nuDFdJGVLqtYNq2Z9W1J2cumd 3TmdThcdgVYxq6EGM4RIMs17wIM8N63IIJcSZTqqBv5TSZAzS2kVXW7KZHxdUI9xE6tvPxD WiLlAAjHg9XOkCg3XDcKQ== X-UI-Out-Filterresults: notjunk:1;V01:K0:uhiEQvoYOkM=:yDKJcWYX3jSUjWgBHsAdW3 9UREO0yQ+BHcVdG4ummnF517jxMQEBQgfPNyJEb/NdamJK/vGWZ3iBk6tQG155iODwP4oDgxr tfhCXOK9D9xstEn3fGuIGU/TGjBzgR+O+zKuItEfVsa7IFZMwN6Uq0YbZw9sjCfvBL0HENomK 2OZ27EEsDni3ASU1uhFDdK9gr4O+ntFiNN/coCM9RSKPiAuzMkI6u6NwlO3W5E2xio1v86fgA 5L63iBlivGeXhyk2HQI9C3XSujhYrs5mXiXy7NN0c81gHU8dpti/FAtyMG+rBDj/GWzNsIYA+ qjKxBeGOdMsqdbHr/3K0+1E2l4dRT1d0YkKQeFnA//r9MX+M17vwG1gJ68jN1QSbHVB30DNeX 0+GiTyQhH/Ky/Zq2Ze7XqS0jfGpKawSJUGUS4fRZjj/at1TQzcl9+hFBtk0VKr1kcue1GLhsw C4eDLnXWj6js+xBw3WmJe0ylNWtPU/XAuoAr6XuplbCz2ZRbxnqAMfjtJoBtRCiH6hsBKuM39 RKaGU3fsIVtdcHvdnI6JHgyonUX6NFCwPn1XLZm18Xl4/VReTsYaq3ahH9lsgcjZsP8l7oDjn et0pm2Hf8r5JoobmPBrXUUwP60XEd5hV1xW9vc5OIaj4WRrtvSTn81Q1cXIjp9SazyUe1I1Cl I9dyzAc6VSC76ja47KCSWYwCMeVDXmBe/axApgcqy9MtdEYLsdL3hR4xxiJhsdgIVbP+SrHT+ WaEEfihi+WCxuNvJ Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Friday, July 8, 2016 1:28:10 AM CEST Niklas Cassel wrote: > From: Niklas Cassel > > - Increase config size. When using a PCIe switch, > the previous config size only had room for one device. > - Add bus range. Inherited optional property. > - Map downstream I/O to PCI address 0. We can map it to any > address, but let's be consistent with other drivers. > > Signed-off-by: Niklas Cassel > --- > Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt b/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt > index 330a45b..5ecaea1 100644 > --- a/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt > @@ -24,16 +24,17 @@ Example: > compatible = "axis,artpec6-pcie", "snps,dw-pcie"; > reg = <0xf8050000 0x2000 > 0xf8040000 0x1000 > - 0xc0000000 0x1000>; > + 0xc0000000 0x2000>; If this is your config space size > num-lanes = <2>; > + bus-range = <0x00 0xff>; then the bus range looks too large. These two are typically connected. I couldn't immediately see which config space access function is used, but if you have 0x1000 bytes per bus, then the bus range matching a 0x2000 byte config space would be either <0x00 0x01> or <0x00 0x02> depending whether the root bus is part of that range. Arnd