From: Mark Brown <broonie@kernel.org>
To: James Clark <james.clark@arm.com>
Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
kvmarm@lists.linux.dev, maz@kernel.org, suzuki.poulose@arm.com,
acme@kernel.org, oliver.upton@linux.dev,
James Morse <james.morse@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Mike Leach <mike.leach@linaro.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Anshuman Khandual <anshuman.khandual@arm.com>,
Miguel Luis <miguel.luis@oracle.com>,
Joey Gouly <joey.gouly@arm.com>, Ard Biesheuvel <ardb@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Arnd Bergmann <arnd@arndb.de>,
Mark Rutland <mark.rutland@arm.com>,
Kalesh Singh <kaleshsingh@google.com>,
Vincent Donnefort <vdonnefort@google.com>,
Ryan Roberts <ryan.roberts@arm.com>,
Fuad Tabba <tabba@google.com>,
Jing Zhang <jingzhangos@google.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 3/7] arm64/sysreg/tools: Move TRFCR definitions to sysreg
Date: Tue, 20 Feb 2024 16:11:30 +0000 [thread overview]
Message-ID: <18995343-e43e-4e92-a97d-3df74ec6ddb7@sirena.org.uk> (raw)
In-Reply-To: <20240220100924.2761706-4-james.clark@arm.com>
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On Tue, Feb 20, 2024 at 10:09:13AM +0000, James Clark wrote:
> Add separate definitions for ELx and EL2 as TRFCR_EL1 doesn't have CX.
> This also mirrors the previous definition so no code change is required.
This is also converting to automatic generation in the process.
> +SysregFields TRFCR_EL2
> +Res0 63:7
> +UnsignedEnum 6:5 TS
> + 0b0000 USE_TRFCR_EL1_TS
> + 0b0001 VIRTUAL
> + 0b0010 GUEST_PHYSICAL
> + 0b0011 PHYSICAL
> +EndEnum
> +Res0 4
> +Field 3 CX
> +Res0 2
> +Field 1 E2TRE
> +Field 0 E0HTRE
> +EndSysregFields
This has exactly one user and I'd not expect more so why have a separate
SysregFields?
> +# TRFCR_EL1 doesn't have the CX bit so redefine it without CX instead of
> +# using a shared definition between TRFCR_EL2 and TRFCR_EL1
This comment is reflecting the default state?
> +Sysreg TRFCR_EL1 3 0 1 2 1
> +Fields TRFCR_ELx
> +EndSysreg
> +
> +Sysreg TRFCR_EL2 3 4 1 2 1
> +Fields TRFCR_EL2
> +EndSysreg
> +
> +Sysreg TRFCR_EL12 3 5 1 2 1
> +Fields TRFCR_ELx
> +EndSysreg
These are generally sorted by encoding (simiarly to how sysreg.h was
sorted historically).
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next prev parent reply other threads:[~2024-02-20 16:11 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-20 10:09 [PATCH v5 0/7] kvm/coresight: Support exclude guest and exclude host James Clark
2024-02-20 10:09 ` [PATCH v5 1/7] arm64: KVM: Fix renamed function in comment James Clark
2024-02-20 10:09 ` [PATCH v5 2/7] arm64/sysreg/tools: Update tools copy of sysreg.h James Clark
2024-02-20 16:12 ` Mark Brown
2024-02-26 10:30 ` Suzuki K Poulose
2024-02-20 10:09 ` [PATCH v5 3/7] arm64/sysreg/tools: Move TRFCR definitions to sysreg James Clark
2024-02-20 16:11 ` Mark Brown [this message]
2024-02-21 10:10 ` James Clark
2024-02-21 12:56 ` Mark Brown
2024-02-20 10:09 ` [PATCH v5 4/7] arm64: KVM: Add iflag for FEAT_TRF James Clark
2024-02-20 10:09 ` [PATCH v5 5/7] arm64: KVM: Add interface to set guest value for TRFCR register James Clark
2024-02-23 10:03 ` Suzuki K Poulose
2024-02-23 16:39 ` James Clark
2024-02-26 9:52 ` Suzuki K Poulose
2024-02-26 11:36 ` James Clark
2024-02-20 10:09 ` [PATCH v5 6/7] arm64: KVM: Write TRFCR value on guest switch with nVHE James Clark
2024-02-26 10:14 ` Suzuki K Poulose
2024-02-20 10:09 ` [PATCH v5 7/7] coresight: Pass guest TRFCR value to KVM James Clark
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