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From: "Andreas Färber" <afaerber@suse.de>
To: Marc Zyngier <maz@kernel.org>
Cc: linux-realtek-soc@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Aleix Roca Nonell <kernelrocks@gmail.com>,
	James Tai <james.tai@realtek.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>
Subject: Re: [PATCH v4 2/8] irqchip: Add Realtek RTD1295 mux driver
Date: Wed, 20 Nov 2019 14:34:45 +0100	[thread overview]
Message-ID: <18c09fc4-fe7b-7ba0-7cd3-ae0c650ca4a8@suse.de> (raw)
In-Reply-To: <e4d30ff2485c3f9ffd2b934f1f757d19@www.loen.fr>

Am 20.11.19 um 11:20 schrieb Marc Zyngier:
> On 2019-11-19 23:33, Andreas Färber wrote:
>> Am 19.11.19 um 23:29 schrieb Marc Zyngier:
>>> On Tue, 19 Nov 2019 21:56:48 +0100
>>> Andreas Färber <afaerber@suse.de> wrote:
>>>> Am 19.11.19 um 13:01 schrieb Marc Zyngier:
>>>>> On 2019-11-19 02:19, Andreas Färber wrote:
>>>>>> +static void rtd1195_mux_enable_irq(struct irq_data *data)
>>>>>> +{
>>>>>> +    struct rtd1195_irq_mux_data *mux_data =
>>>>>> irq_data_get_irq_chip_data(data);
>>>>>> +    unsigned long flags;
>>>>>> +    u32 mask;
>>>>>> +
>>>>>> +    mask = mux_data->info->isr_to_int_en_mask[data->hwirq];
>>>>>> +    if (!mask)
>>>>>> +        return;
>>>>>
>>>>> How can this happen? You've mapped the interrupt, so it exists.
>>>>> I can't see how you can decide to fail such enable.
>>>>
>>>> The [UMSK_]ISR bits and the SCPU_INT_EN bits are not (all) the same.
>>>>
>>>> My ..._isr_to_scpu_int_en[] arrays have 32 entries for O(1) lookup, but
>>>> are sparsely populated. So there are circumstances such as WDOG_NMI as
>>>> well as reserved bits that we cannot enable.
>>>
>>> But the you should have failed the map. The moment you allow the
>>> mapping to occur, you have accepted the contract that this interrupt is
>>> usable.
>>>
>>>> This check should be
>>>> identical to v3; the equivalent mask check inside the interrupt handler
>>>> was extended with "mask &&" to do the same in this v4.
>>>
>>> Spurious interrupts are a different matter. What I'm objecting to here
>>> is a simple question of logic, whether or not you are allowed to fail
>>> enabling an interrupt that you've otherwise allowed to be populated.
>>
>> Then what are you suggesting instead? I don't see how my array map
>> lookup could fail other than returning a zero value, given its static
>> initialization. Check for a zero mask in rtd1195_mux_irq_domain_map()?
>> Then we wouldn't be able to use the mentioned WDOG_NMI. Add another
>> per-mux info field for which interrupts are valid to map?
> 
> I'm suggesting that you fail the map if you're unable to allow the
> interrupt to be enabled.

The NMI will always be enabled, it just can't be disabled.

I have added a check to suppress a zero hwirq. Suppressing reserved IRQ
bits will take some more effort to distinguish from NMIs. In particular
if we flag this in the ..._isr_to_scpu_int_en array by some magic mask
value like 0xffffffff then all users need to check for two rather than
one value - but if we reduce the users, it shouldn't matter too much.

With contract I assume you're referring to these callbacks having a void
return type, unable to return an error to the caller, and there being no
is_enabled/is_masked callbacks for anyone to discover this.

Unfortunately NMI handling appears to be only used in GICv3 and is not
very intuitive for me: Apparently I can only flag the whole irq_chip as
being NMI but not individual IRQs? Would that mean that this driver
would need to instantiate a second irq_chip for that one IRQ? How would
that work for mapping from DT? Given that this mux relies on a maskable
GICv2 IRQ, it's not a "true" NMI in the Linux sense anyway, other than
the .irq_mask callback not being applicable. While I don't need that NMI
immediately, I would prefer not to merge a driver that by design can't
cope with it later.

I'll try to post a v5 with rsv and nmi blocked in map for further
discussion tonight.

Regards,
Andreas

-- 
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer
HRB 36809 (AG Nürnberg)

  reply	other threads:[~2019-11-20 13:34 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-19  2:19 [PATCH v4 0/8] ARM: Realtek RTD1195/RTD1295/RTD1395 IRQ mux Andreas Färber
2019-11-19  2:19 ` [PATCH v4 1/8] dt-bindings: interrupt-controller: Add Realtek RTD1195/RTD1295 mux Andreas Färber
2019-11-19  2:19 ` [PATCH v4 2/8] irqchip: Add Realtek RTD1295 mux driver Andreas Färber
2019-11-19 12:01   ` Marc Zyngier
2019-11-19 20:56     ` Andreas Färber
2019-11-19 22:29       ` Marc Zyngier
2019-11-19 23:33         ` Andreas Färber
2019-11-20 10:20           ` Marc Zyngier
2019-11-20 13:34             ` Andreas Färber [this message]
2019-11-20 14:32               ` Marc Zyngier
2019-11-19 23:25     ` Andreas Färber
2019-11-20 10:18       ` Marc Zyngier
2019-11-20 12:12         ` Andreas Färber
2019-11-20 12:23           ` Marc Zyngier
2019-11-19  2:19 ` [PATCH v4 3/8] arm64: dts: realtek: rtd129x: Add irq muxes and UART interrupts Andreas Färber
2019-11-19  2:19 ` [PATCH v4 4/8] irqchip: rtd1195-mux: Add RTD1195 definitions Andreas Färber
2019-11-19  2:19 ` [PATCH v4 5/8] ARM: dts: rtd1195: Add irq muxes and UART interrupts Andreas Färber
2019-11-19  2:19 ` [PATCH v4 6/8] dt-bindings: interrupt-controller: rtd1195-mux: Add RTD1395 Andreas Färber
2019-11-19  2:19 ` [PATCH v4 7/8] irqchip: rtd1195-mux: Add RTD1395 definitions Andreas Färber
2019-11-19  2:19 ` [PATCH v4 8/8] arm64: dts: realtek: rtd139x: Add irq muxes and UART interrupts Andreas Färber

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