From: Naveen Naidu <naveennaidu479@gmail.com>
To: bhelgaas@google.com, ruscur@russell.cc, oohall@gmail.com
Cc: Naveen Naidu <naveennaidu479@gmail.com>,
linux-kernel-mentees@lists.linuxfoundation.org,
skhan@linuxfoundation.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Subject: [PATCH v4 8/8] PCI/AER: Include DEVCTL in aer_print_error()
Date: Tue, 5 Oct 2021 22:48:16 +0530 [thread overview]
Message-ID: <18cad894ac3210af806104b3b4fa6a8cf1554ac8.1633453452.git.naveennaidu479@gmail.com> (raw)
In-Reply-To: <cover.1633453452.git.naveennaidu479@gmail.com>
Print the contents of Device Control Register of the device which
detected the error. This might help in faster error diagnosis.
Sample output from dummy error injected by aer-inject:
pcieport 0000:00:03.0: AER: Corrected error received: 0000:00:03.0
pcieport 0000:00:03.0: PCIe Bus Error: severity=Corrected, type=Data Link Layer, (Receiver)
pcieport 0000:00:03.0: device [1b36:000c] error status/mask=00000040/0000e000, devctl=0x000f <-- devctl added to the error log
pcieport 0000:00:03.0: [ 6] BadTLP
Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
---
drivers/pci/pci.h | 2 ++
drivers/pci/pcie/aer.c | 10 ++++++++--
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index eb88d8bfeaf7..48ed7f91113b 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -437,6 +437,8 @@ struct aer_err_info {
u32 status; /* COR/UNCOR Error Status */
u32 mask; /* COR/UNCOR Error Mask */
struct aer_header_log_regs tlp; /* TLP Header */
+
+ u16 devctl;
};
/* Preliminary AER error information processed from Root port */
diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
index d3937f5384e4..fdeef9deb016 100644
--- a/drivers/pci/pcie/aer.c
+++ b/drivers/pci/pcie/aer.c
@@ -729,8 +729,8 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
aer_error_severity_string[info->severity],
aer_error_layer[layer], aer_agent_string[agent]);
- pci_printk(level, dev, " device [%04x:%04x] error status/mask=%08x/%08x\n",
- dev->vendor, dev->device, info->status, info->mask);
+ pci_printk(level, dev, " device [%04x:%04x] error status/mask=%08x/%08x, devctl=%#06x\n",
+ dev->vendor, dev->device, info->status, info->mask, info->devctl);
__aer_print_error(dev, info);
@@ -1083,6 +1083,12 @@ int aer_get_device_error_info(struct pci_dev *dev, struct aer_err_info *info)
if (!aer)
return 0;
+ /*
+ * Cache the value of Device Control Register now, because later the
+ * device might not be available
+ */
+ pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &info->devctl);
+
if (info->severity == AER_CORRECTABLE) {
pci_read_config_dword(dev, aer + PCI_ERR_COR_STATUS,
&info->status);
--
2.25.1
prev parent reply other threads:[~2021-10-05 17:21 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-05 17:18 [PATCH v4 0/8] Fix long standing AER Error Handling Issues Naveen Naidu
2021-10-05 17:18 ` [PATCH v4 1/8] PCI/AER: Remove ID from aer_agent_string[] Naveen Naidu
2021-10-21 1:28 ` Bjorn Helgaas
2021-10-21 16:30 ` Naveen Naidu
2021-10-21 17:03 ` Bjorn Helgaas
2021-10-05 17:18 ` [PATCH v4 2/8] PCI: Cleanup struct aer_err_info Naveen Naidu
2021-10-05 17:18 ` [PATCH v4 3/8] PCI/DPC: Initialize info->id in dpc_process_error() Naveen Naidu
2021-10-21 1:28 ` Bjorn Helgaas
2021-10-21 16:31 ` Naveen Naidu
2021-10-05 17:18 ` [PATCH v4 4/8] PCI/DPC: Use pci_aer_clear_status() " Naveen Naidu
2021-10-21 1:40 ` Bjorn Helgaas
2021-10-21 16:36 ` Naveen Naidu
2021-10-21 17:05 ` Bjorn Helgaas
2021-10-05 17:18 ` [PATCH v4 5/8] PCI/DPC: Converge EDR and DPC Path of clearing AER registers Naveen Naidu
2021-10-21 2:09 ` Bjorn Helgaas
2021-10-21 16:53 ` Naveen Naidu
2021-10-21 17:11 ` Bjorn Helgaas
2021-10-05 17:18 ` [PATCH v4 6/8] PCI/AER: Clear error device AER registers in aer_irq() Naveen Naidu
2021-10-05 17:18 ` [PATCH v4 7/8] PCI/ERR: Remove redundant clearing of AER register in pcie_do_recovery() Naveen Naidu
2021-10-05 17:18 ` Naveen Naidu [this message]
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