From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1031302AbbD2AYv (ORCPT ); Tue, 28 Apr 2015 20:24:51 -0400 Received: from mga01.intel.com ([192.55.52.88]:8639 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1031191AbbD2AYr (ORCPT ); Tue, 28 Apr 2015 20:24:47 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.11,667,1422950400"; d="scan'208";a="486936792" From: "Zheng, Lv" To: Borislav Petkov CC: linux-edac , Jiri Kosina , Borislav Petkov , "Rafael J. Wysocki" , "Len Brown" , "Luck, Tony" , Tomasz Nowicki , "Chen, Gong" , Wolfram Sang , Naoya Horiguchi , "linux-acpi@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: RE: [RFC PATCH 5/5] GHES: Make NMI handler have a single reader Thread-Topic: [RFC PATCH 5/5] GHES: Make NMI handler have a single reader Thread-Index: AQHQaG/ro4UZP9zjdEyK4aA7ppX1rp1imlXQ//+FsoCAATPzQA== Date: Wed, 29 Apr 2015 00:24:40 +0000 Message-ID: <1AE640813FDE7649BE1B193DEA596E880270FAD9@SHSMSX101.ccr.corp.intel.com> References: <1427448178-20689-1-git-send-email-bp@alien8.de> <1427448178-20689-6-git-send-email-bp@alien8.de> <1AE640813FDE7649BE1B193DEA596E880270F835@SHSMSX101.ccr.corp.intel.com> <20150428135913.GD19025@pd.tnic> In-Reply-To: <20150428135913.GD19025@pd.tnic> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by nfs id t3T0Ou1k022943 Hi, > From: Borislav Petkov [mailto:bp@alien8.de] > Sent: Tuesday, April 28, 2015 9:59 PM > Subject: Re: [RFC PATCH 5/5] GHES: Make NMI handler have a single reader > > On Tue, Apr 28, 2015 at 01:38:41PM +0000, Zheng, Lv wrote: > > > - raw_spin_lock(&ghes_nmi_lock); > > > + if (!atomic_add_unless(&ghes_in_nmi, 1, 1)) > > > + return ret; > > > + > > > > if (atomic_cmpxchg(&ghes_in_nmi, 0, 1)) > > return ret; > > Ok, now I understand what you mean. > > We absolutely want to use atomic_add_unless() because we get to save us > the expensive > > LOCK; CMPXCHG > > if the value was already 1. Which is exactly what this patch is trying > to avoid - a thundering herd of cores CMPXCHGing a global variable. IMO, on most architectures, the "cmp" part should work just like what you've done with "if". And on some architectures, if the "xchg" doesn't happen, the "cmp" part even won't cause a pipe line hazard. Thanks and best regards -Lv > > I.e., > > movl ghes_in_nmi(%rip), %ecx # MEM[(const int *)&ghes_in_nmi], c > cmpl $1, %ecx #, c > je .L311 #, <--- exit here if ghes_in_nmi == 1. > leal 1(%rcx), %edx #, D.37163 > movl %ecx, %eax # c, c > #APP > # 177 "./arch/x86/include/asm/atomic.h" 1 > .pushsection .smp_locks,"a" > .balign 4 > .long 671f - . > .popsection > 671: > lock; cmpxchgl %edx,ghes_in_nmi(%rip) # D.37163, MEM[(volatile u32 *)&ghes_in_nmi] > # 0 "" 2 > #NO_APP > > -- > Regards/Gruss, > Boris. > > ECO tip #101: Trim your mails when you reply. > -- {.n++%ݶw{.n+{G{ayʇڙ,jfhz_(階ݢj"mG?&~iOzv^m ?I