From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.5 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2A10C433DB for ; Fri, 22 Jan 2021 21:56:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9D06F23B08 for ; Fri, 22 Jan 2021 21:56:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730308AbhAVV4e (ORCPT ); Fri, 22 Jan 2021 16:56:34 -0500 Received: from mga01.intel.com ([192.55.52.88]:50183 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730000AbhAVVzl (ORCPT ); Fri, 22 Jan 2021 16:55:41 -0500 IronPort-SDR: 9q3S4emmk4xclOw/YXm/yZII8Ovg/ah2F38SDUKp0EqM6nryCd3wUb4PA09QOpFP4aklCGwW0H duX7C1HTlQhA== X-IronPort-AV: E=McAfee;i="6000,8403,9872"; a="198274442" X-IronPort-AV: E=Sophos;i="5.79,367,1602572400"; d="scan'208";a="198274442" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jan 2021 13:54:55 -0800 IronPort-SDR: QgzfLeU+SScNpiuZ2ShHor3Mk1anNcKXZI/IncTCR7ogj4sTRd8kBKfwZPHV0PQyfLDml4sqvL fM8zo+rax78Q== X-IronPort-AV: E=Sophos;i="5.79,367,1602572400"; d="scan'208";a="400976899" Received: from yyu32-mobl1.amr.corp.intel.com (HELO [10.212.79.184]) ([10.212.79.184]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jan 2021 13:54:54 -0800 Subject: Re: [PATCH v17 08/26] x86/mm: Introduce _PAGE_COW To: David Laight , 'Randy Dunlap' , Borislav Petkov Cc: "x86@kernel.org" , "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , "linux-kernel@vger.kernel.org" , "linux-doc@vger.kernel.org" , "linux-mm@kvack.org" , "linux-arch@vger.kernel.org" , "linux-api@vger.kernel.org" , Arnd Bergmann , Andy Lutomirski , Balbir Singh , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H.J. Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , "Ravi V. Shankar" , Vedvyas Shanbhogue , Dave Martin , Weijiang Yang , Pengfei Xu References: <20201229213053.16395-1-yu-cheng.yu@intel.com> <20201229213053.16395-9-yu-cheng.yu@intel.com> <20210121184405.GE32060@zn.tnic> <9344cd90-1818-a716-91d2-2b85df01347b@infradead.org> From: "Yu, Yu-cheng" Message-ID: <1b9cd39a-fe66-d237-b847-2b62ff1477e7@intel.com> Date: Fri, 22 Jan 2021 13:54:53 -0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.6.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 1/21/2021 2:32 PM, David Laight wrote: > From: Randy Dunlap >> Sent: 21 January 2021 22:19 >> >> On 1/21/21 2:16 PM, David Laight wrote: >>> From: Yu, Yu-cheng >>>> >>>> On 1/21/2021 10:44 AM, Borislav Petkov wrote: >>>>> On Tue, Dec 29, 2020 at 01:30:35PM -0800, Yu-cheng Yu wrote: >>>> [...] >>>>>> @@ -343,6 +349,16 @@ static inline pte_t pte_mkold(pte_t pte) >>>>>> >>>>>> static inline pte_t pte_wrprotect(pte_t pte) >>>>>> { >>>>>> + /* >>>>>> + * Blindly clearing _PAGE_RW might accidentally create >>>>>> + * a shadow stack PTE (RW=0, Dirty=1). Move the hardware >>>>>> + * dirty value to the software bit. >>>>>> + */ >>>>>> + if (cpu_feature_enabled(X86_FEATURE_SHSTK)) { >>>>>> + pte.pte |= (pte.pte & _PAGE_DIRTY) >> _PAGE_BIT_DIRTY << _PAGE_BIT_COW; >>>>> >>>>> Why the unreadable shifting when you can simply do: >>>>> >>>>> if (pte.pte & _PAGE_DIRTY) >>>>> pte.pte |= _PAGE_COW; >>>>> >>> >>>>> ? >>>> >>>> It clears _PAGE_DIRTY and sets _PAGE_COW. That is, >>>> >>>> if (pte.pte & _PAGE_DIRTY) { >>>> pte.pte &= ~_PAGE_DIRTY; >>>> pte.pte |= _PAGE_COW; >>>> } >>>> >>>> So, shifting makes resulting code more efficient. >>> >>> Does the compiler manage to do one shift? >>> >>> How can it clear anything? >> >> It could shift it off either end since there are both << and >>. > > It is still: > pte.pte |= xxxxxxx; > >>> There is only an |= against the target. >>> >>> Something horrid with ^= might set and clear. > > It could be 4 instructions: > is_dirty = pte.pte & PAGE_DIRTY; > pte.pte &= ~PAGE_DIRTY; // or pte.pte ^= is_dirty > is_cow = is_dirty << (BIT_COW - BIT_DIRTY); // or equivalent >> > pte.pte |= is_cow; > provided you've a three operand form for one of the first two instructions. > Something like ARM might manage to merge the last two as well. > But the register dependency chain length may matter more than > the number of instructions. > The above is likely to be three long. I see what you are saying. The patch is like... if (cpu_feature_enabled(X86_FEATURE_SHSTK)) { pte.pte |= (pte.pte & _PAGE_DIRTY) >> _PAGE_BIT_DIRTY << _PAGE_BIT_COW; pte = pte_clear_flags(pte, _PAGE_DIRTY); } It is not necessary to do the shifting. I will make it, simply, if (pte.pte & _PAGE_DIRTY) { pte.pte &= ~PAGE_DIRTY; pte.pte |= _PAGE_COW; } Thanks for your comments. -- Yu-cheng