From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71E4CC2D0E4 for ; Mon, 23 Nov 2020 15:08:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1BC9C206F1 for ; Mon, 23 Nov 2020 15:08:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731978AbgKWPIP (ORCPT ); Mon, 23 Nov 2020 10:08:15 -0500 Received: from mga06.intel.com ([134.134.136.31]:26410 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727444AbgKWPIP (ORCPT ); Mon, 23 Nov 2020 10:08:15 -0500 IronPort-SDR: KNfySEUXrYAEO9bl1t7Z1gKXMVVz5OIG9IAtmzFGX2EaCkuxPdGdfDmr2NZymQDW7GvwXb9mis DxUPnTiM+UhA== X-IronPort-AV: E=McAfee;i="6000,8403,9813"; a="233392218" X-IronPort-AV: E=Sophos;i="5.78,363,1599548400"; d="scan'208";a="233392218" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Nov 2020 07:07:42 -0800 IronPort-SDR: cbpRnnDiGC+ADzV6wkpZf+wuU5o4eXn6jQfqQVU1c01mt3iP42dFZH+n7np7TMUlZWGG4q6b6U w2FnspVNoUhg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,363,1599548400"; d="scan'208";a="370063566" Received: from cli6-desk1.ccr.corp.intel.com (HELO [10.239.161.125]) ([10.239.161.125]) by FMSMGA003.fm.intel.com with ESMTP; 23 Nov 2020 07:07:27 -0800 Subject: Re: [PATCH -tip 13/32] sched: Trivial forced-newidle balancer To: Balbir Singh , "Joel Fernandes (Google)" Cc: Nishanth Aravamudan , Julien Desfossez , Peter Zijlstra , Tim Chen , Vineeth Pillai , Aaron Lu , Aubrey Li , tglx@linutronix.de, linux-kernel@vger.kernel.org, mingo@kernel.org, torvalds@linux-foundation.org, fweisbec@gmail.com, keescook@chromium.org, kerrnel@google.com, Phil Auld , Valentin Schneider , Mel Gorman , Pawan Gupta , Paolo Bonzini , vineeth@bitbyteword.org, Chen Yu , Christian Brauner , Agata Gruza , Antonio Gomez Iglesias , graf@amazon.com, konrad.wilk@oracle.com, dfaggioli@suse.com, pjt@google.com, rostedt@goodmis.org, derkling@google.com, benbjiang@tencent.com, Alexandre Chartre , James.Bottomley@hansenpartnership.com, OWeisse@umich.edu, Dhaval Giani , Junaid Shahid , jsbarnes@google.com, chris.hyser@oracle.com, Ben Segall , Josh Don , Hao Luo , Tom Lendacky , "Paul E . McKenney" , Tim Chen References: <20201117232003.3580179-1-joel@joelfernandes.org> <20201117232003.3580179-14-joel@joelfernandes.org> <20201123043836.GG110669@balbir-desktop> From: "Li, Aubrey" Message-ID: <1de89fd3-fb5f-5aaa-8ea6-7a12d3307fa4@linux.intel.com> Date: Mon, 23 Nov 2020 23:07:27 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.9.0 MIME-Version: 1.0 In-Reply-To: <20201123043836.GG110669@balbir-desktop> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2020/11/23 12:38, Balbir Singh wrote: > On Tue, Nov 17, 2020 at 06:19:43PM -0500, Joel Fernandes (Google) wrote: >> From: Peter Zijlstra >> >> When a sibling is forced-idle to match the core-cookie; search for >> matching tasks to fill the core. >> >> rcu_read_unlock() can incur an infrequent deadlock in >> sched_core_balance(). Fix this by using the RCU-sched flavor instead. >> > ... >> + >> + if (p->core_occupation > dst->idle->core_occupation) >> + goto next; >> + > > I am unable to understand this check, a comment or clarification in the > changelog will help. I presume we are looking at either one or two cpus > to define the core_occupation and we expect to match it against the > destination CPU. IIUC, this check prevents a task from keeping jumping among the cores forever. For example, on a SMT2 platform: - core0 runs taskA and taskB, core_occupation is 2 - core1 runs taskC, core_occupation is 1 Without this check, taskB could ping-pong between core0 and core1 by core load balance. Thanks, -Aubrey