linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
* [PATCH V1] dt-bindings: mmc: sdhci-msm: Add CQE reg map
@ 2020-02-11 15:29 Veerabhadrarao Badiganti
  2020-02-11 16:42 ` Doug Anderson
                   ` (3 more replies)
  0 siblings, 4 replies; 11+ messages in thread
From: Veerabhadrarao Badiganti @ 2020-02-11 15:29 UTC (permalink / raw)
  To: ulf.hansson, adrian.hunter
  Cc: asutoshd, stummala, sayalil, cang, rampraka, dianders, linux-mmc,
	linux-kernel, linux-arm-msm, Veerabhadrarao Badiganti,
	Rob Herring, Mark Rutland,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS

CQE feature has been enabled on sdhci-msm. Add CQE reg map
that needs to be supplied for supporting CQE feature.

Change-Id: I788c4bd5b7cbca16bc1030a410cc5550ed7204e1
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
---
 Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
index 7ee639b..eaa0998 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
@@ -27,6 +27,11 @@ Required properties:
 - reg: Base address and length of the register in the following order:
 	- Host controller register map (required)
 	- SD Core register map (required for msm-v4 and below)
+	- CQE register map (Optional, needed only for eMMC and msm-v4.2 above)
+- reg-names: When CQE register map is supplied, below reg-names are required
+	- "hc_mem" for Host controller register map
+	- "core_mem" for SD cpre regoster map
+	- "cqhci_mem" for CQE register map
 - interrupts: Should contain an interrupt-specifiers for the interrupts:
 	- Host controller interrupt (required)
 - pinctrl-names: Should contain only one value - "default".
-- 
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH V1] dt-bindings: mmc: sdhci-msm: Add CQE reg map
  2020-02-11 15:29 [PATCH V1] dt-bindings: mmc: sdhci-msm: Add CQE reg map Veerabhadrarao Badiganti
@ 2020-02-11 16:42 ` Doug Anderson
  2020-02-12 12:00   ` Veerabhadrarao Badiganti
  2020-02-14 11:45 ` [PATCH V2] " Veerabhadrarao Badiganti
                   ` (2 subsequent siblings)
  3 siblings, 1 reply; 11+ messages in thread
From: Doug Anderson @ 2020-02-11 16:42 UTC (permalink / raw)
  To: Veerabhadrarao Badiganti
  Cc: Ulf Hansson, Adrian Hunter, Asutosh Das, Sahitya Tummala,
	Sayali Lokhande, cang, Ram Prakash Gupta, Linux MMC List, LKML,
	linux-arm-msm, Rob Herring, Mark Rutland,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS

Hi,

On Tue, Feb 11, 2020 at 7:29 AM Veerabhadrarao Badiganti
<vbadigan@codeaurora.org> wrote:
>
> CQE feature has been enabled on sdhci-msm. Add CQE reg map
> that needs to be supplied for supporting CQE feature.
>
> Change-Id: I788c4bd5b7cbca16bc1030a410cc5550ed7204e1
> Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
> ---
>  Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> index 7ee639b..eaa0998 100644
> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> @@ -27,6 +27,11 @@ Required properties:
>  - reg: Base address and length of the register in the following order:
>         - Host controller register map (required)
>         - SD Core register map (required for msm-v4 and below)
> +       - CQE register map (Optional, needed only for eMMC and msm-v4.2 above)

I did a quick search and it appears that SD cards implementing 6.0 of
the spec can also use CQE.  Is that correct?  If so, maybe remove the
part about "eMMC"?

Maybe also change "needed" to "useful" to make it clear that this
entry isn't actually required for all msm-v4.2 controllers?


> +- reg-names: When CQE register map is supplied, below reg-names are required
> +       - "hc_mem" for Host controller register map
> +       - "core_mem" for SD cpre regoster map

s/regoster/register


> +       - "cqhci_mem" for CQE register map

I'm at least slightly confused.  You say that reg-names are there only
if CQE register map is supplied.  ...and that requires 4.2 and above.
...but "core_mem" is only there on 4.0 and below.  So there should
never be a "core_mem" entry?

Trying to specify that sanely in free-form text seems like it's gonna
be hard and not worth it.  You should probably transition to yaml
first?


I will also note that Rob isn't a huge fan of "reg-names".  In a
different conversation I think you mentioned you had a reason for
having it.  I guess just be prepared to defend yourself against Rob if
you feel strongly about keeping reg-names.


-Doug

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH V1] dt-bindings: mmc: sdhci-msm: Add CQE reg map
  2020-02-11 16:42 ` Doug Anderson
@ 2020-02-12 12:00   ` Veerabhadrarao Badiganti
  2020-02-12 23:21     ` Doug Anderson
  0 siblings, 1 reply; 11+ messages in thread
From: Veerabhadrarao Badiganti @ 2020-02-12 12:00 UTC (permalink / raw)
  To: Doug Anderson
  Cc: Ulf Hansson, Adrian Hunter, Asutosh Das, Sahitya Tummala,
	Sayali Lokhande, cang, Ram Prakash Gupta, Linux MMC List, LKML,
	linux-arm-msm, Rob Herring, Mark Rutland,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS


On 2/11/2020 10:12 PM, Doug Anderson wrote:
> Hi,
>
> On Tue, Feb 11, 2020 at 7:29 AM Veerabhadrarao Badiganti
> <vbadigan@codeaurora.org> wrote:
>> CQE feature has been enabled on sdhci-msm. Add CQE reg map
>> that needs to be supplied for supporting CQE feature.
>>
>> Change-Id: I788c4bd5b7cbca16bc1030a410cc5550ed7204e1
>> Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
>> ---
>>   Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 5 +++++
>>   1 file changed, 5 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>> index 7ee639b..eaa0998 100644
>> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
>> @@ -27,6 +27,11 @@ Required properties:
>>   - reg: Base address and length of the register in the following order:
>>          - Host controller register map (required)
>>          - SD Core register map (required for msm-v4 and below)
>> +       - CQE register map (Optional, needed only for eMMC and msm-v4.2 above)
> I did a quick search and it appears that SD cards implementing 6.0 of
> the spec can also use CQE.  Is that correct?  If so, maybe remove the
> part about "eMMC"?
On qcom platforms, only SDHC instance meant for eMMC has the CQE support.
So mentioned that its needed only for eMMC.
>
> Maybe also change "needed" to "useful" to make it clear that this
> entry isn't actually required for all msm-v4.2 controllers?
sure.
>
>> +- reg-names: When CQE register map is supplied, below reg-names are required
>> +       - "hc_mem" for Host controller register map
>> +       - "core_mem" for SD cpre regoster map
> s/regoster/register
>
>
>> +       - "cqhci_mem" for CQE register map
> I'm at least slightly confused.  You say that reg-names are there only
> if CQE register map is supplied.  ...and that requires 4.2 and above.
> ...but "core_mem" is only there on 4.0 and below.  So there should
> never be a "core_mem" entry?
core_mem is present till <v5.0
cqhci_mem is present on >=v4.2
Say, for version v4.2 both are present; .... and for v5.0 only cqhci_mem 
is present.

Both hc reg-map and core reg-map are being accessed through index.
So no need to list the reg names 'hc_mem' & 'core_mem' in general.

But coming to cqhci reg-map we can't access it with fixed index, since 
its index varies between 1/2
based on controller version.

So we are accessing it through reg-names. Since reg-names has to be 
associated with corresponding
reg maps, other two reg-names (hc_mem & core_mem) also need to br listed 
when cqhci_mem is listed.

That is the reason, I mentioned it like these are needed only cqe reg 
map is supplied.
If it is creating confusion, i will remove that statement.
> Trying to specify that sanely in free-form text seems like it's gonna
> be hard and not worth it.  You should probably transition to yaml
> first?
>
>
> I will also note that Rob isn't a huge fan of "reg-names".  In a
> different conversation I think you mentioned you had a reason for
> having it.  I guess just be prepared to defend yourself against Rob if
> you feel strongly about keeping reg-names.
Sure. Its the same reason mentioned in above comment.
>
> -Doug

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH V1] dt-bindings: mmc: sdhci-msm: Add CQE reg map
  2020-02-12 12:00   ` Veerabhadrarao Badiganti
@ 2020-02-12 23:21     ` Doug Anderson
  0 siblings, 0 replies; 11+ messages in thread
From: Doug Anderson @ 2020-02-12 23:21 UTC (permalink / raw)
  To: Veerabhadrarao Badiganti
  Cc: Ulf Hansson, Adrian Hunter, Asutosh Das, Sahitya Tummala,
	Sayali Lokhande, cang, Ram Prakash Gupta, Linux MMC List, LKML,
	linux-arm-msm, Rob Herring, Mark Rutland,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS

Hi,

On Wed, Feb 12, 2020 at 4:00 AM Veerabhadrarao Badiganti
<vbadigan@codeaurora.org> wrote:
>
>
> On 2/11/2020 10:12 PM, Doug Anderson wrote:
> > Hi,
> >
> > On Tue, Feb 11, 2020 at 7:29 AM Veerabhadrarao Badiganti
> > <vbadigan@codeaurora.org> wrote:
> >> CQE feature has been enabled on sdhci-msm. Add CQE reg map
> >> that needs to be supplied for supporting CQE feature.
> >>
> >> Change-Id: I788c4bd5b7cbca16bc1030a410cc5550ed7204e1
> >> Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
> >> ---
> >>   Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 5 +++++
> >>   1 file changed, 5 insertions(+)
> >>
> >> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> >> index 7ee639b..eaa0998 100644
> >> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> >> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> >> @@ -27,6 +27,11 @@ Required properties:
> >>   - reg: Base address and length of the register in the following order:
> >>          - Host controller register map (required)
> >>          - SD Core register map (required for msm-v4 and below)
> >> +       - CQE register map (Optional, needed only for eMMC and msm-v4.2 above)
> > I did a quick search and it appears that SD cards implementing 6.0 of
> > the spec can also use CQE.  Is that correct?  If so, maybe remove the
> > part about "eMMC"?
> On qcom platforms, only SDHC instance meant for eMMC has the CQE support.
> So mentioned that its needed only for eMMC.

Ah, got it.  Maybe mention this in the bindings?  Like "Optional, CQE
is only implemented on controllers meant for eMMC and version v4.2 and
above"


> > Maybe also change "needed" to "useful" to make it clear that this
> > entry isn't actually required for all msm-v4.2 controllers?
> sure.
> >
> >> +- reg-names: When CQE register map is supplied, below reg-names are required
> >> +       - "hc_mem" for Host controller register map
> >> +       - "core_mem" for SD cpre regoster map
> > s/regoster/register

Oh, also s/cpre/core


> >> +       - "cqhci_mem" for CQE register map
> > I'm at least slightly confused.  You say that reg-names are there only
> > if CQE register map is supplied.  ...and that requires 4.2 and above.
> > ...but "core_mem" is only there on 4.0 and below.  So there should
> > never be a "core_mem" entry?
> core_mem is present till <v5.0
> cqhci_mem is present on >=v4.2
> Say, for version v4.2 both are present; .... and for v5.0 only cqhci_mem
> is present.
>
> Both hc reg-map and core reg-map are being accessed through index.
> So no need to list the reg names 'hc_mem' & 'core_mem' in general.
>
> But coming to cqhci reg-map we can't access it with fixed index, since
> its index varies between 1/2
> based on controller version.
>
> So we are accessing it through reg-names. Since reg-names has to be
> associated with corresponding
> reg maps, other two reg-names (hc_mem & core_mem) also need to br listed
> when cqhci_mem is listed.
>
> That is the reason, I mentioned it like these are needed only cqe reg
> map is supplied.
> If it is creating confusion, i will remove that statement.

Ah.  I think I got confused!  When I saw "msm-v4 and below" in the
description of "SD Core register map", I assumed that means that
"v4.2" didn't have it.  Maybe would be less confusing to change to:

- SD Core register map (required for controllers earlier than msm-v5)

Then I think what you have can be fine.



> > Trying to specify that sanely in free-form text seems like it's gonna
> > be hard and not worth it.  You should probably transition to yaml
> > first?
> >
> >
> > I will also note that Rob isn't a huge fan of "reg-names".  In a
> > different conversation I think you mentioned you had a reason for
> > having it.  I guess just be prepared to defend yourself against Rob if
> > you feel strongly about keeping reg-names.
> Sure. Its the same reason mentioned in above comment.

OK.  You've convinced me.  It's still up to Rob but it seems like you
have a good justification now that I understand it better..  ;-)

I think you could send out a v2 with the small wording changes and
maybe it would be landable, but you'd want to follow up rather soon
with the yaml conversion.


-Doug

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH V2] dt-bindings: mmc: sdhci-msm: Add CQE reg map
  2020-02-11 15:29 [PATCH V1] dt-bindings: mmc: sdhci-msm: Add CQE reg map Veerabhadrarao Badiganti
  2020-02-11 16:42 ` Doug Anderson
@ 2020-02-14 11:45 ` Veerabhadrarao Badiganti
  2020-02-19 20:08   ` Rob Herring
  2020-02-24 11:44 ` Veerabhadrarao Badiganti
  2020-02-24 11:57 ` [PATCH V3] " Veerabhadrarao Badiganti
  3 siblings, 1 reply; 11+ messages in thread
From: Veerabhadrarao Badiganti @ 2020-02-14 11:45 UTC (permalink / raw)
  To: ulf.hansson, robh+dt
  Cc: asutoshd, stummala, sayalil, cang, rampraka, dianders, linux-mmc,
	linux-kernel, linux-arm-msm, Veerabhadrarao Badiganti,
	Mark Rutland,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS

CQE feature has been enabled on sdhci-msm. Add CQE reg map
that needs to be supplied for supporting CQE feature.

Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
---

Changes since V1:
	- Updated description for more clarity & Fixed typos.
---
 Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
index 7ee639b..ad0ee83 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
@@ -26,7 +26,13 @@ Required properties:
 
 - reg: Base address and length of the register in the following order:
 	- Host controller register map (required)
-	- SD Core register map (required for msm-v4 and below)
+	- SD Core register map (required for controllers earlier than msm-v5)
+	- CQE register map (Optional, CQE support is present on SDHC instance meant
+	                    for eMMC and version v4.2 and above)
+- reg-names: When CQE register map is supplied, below reg-names are required
+	- "hc_mem" for Host controller register map
+	- "core_mem" for SD core register map
+	- "cqhci_mem" for CQE register map
 - interrupts: Should contain an interrupt-specifiers for the interrupts:
 	- Host controller interrupt (required)
 - pinctrl-names: Should contain only one value - "default".
-- 
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH V2] dt-bindings: mmc: sdhci-msm: Add CQE reg map
  2020-02-14 11:45 ` [PATCH V2] " Veerabhadrarao Badiganti
@ 2020-02-19 20:08   ` Rob Herring
  0 siblings, 0 replies; 11+ messages in thread
From: Rob Herring @ 2020-02-19 20:08 UTC (permalink / raw)
  To: Veerabhadrarao Badiganti
  Cc: ulf.hansson, asutoshd, stummala, sayalil, cang, rampraka,
	dianders, linux-mmc, linux-kernel, linux-arm-msm, Mark Rutland,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS

On Fri, Feb 14, 2020 at 05:15:52PM +0530, Veerabhadrarao Badiganti wrote:
> CQE feature has been enabled on sdhci-msm. Add CQE reg map
> that needs to be supplied for supporting CQE feature.
> 
> Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
> ---
> 
> Changes since V1:
> 	- Updated description for more clarity & Fixed typos.
> ---
>  Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> index 7ee639b..ad0ee83 100644
> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> @@ -26,7 +26,13 @@ Required properties:
>  
>  - reg: Base address and length of the register in the following order:
>  	- Host controller register map (required)
> -	- SD Core register map (required for msm-v4 and below)
> +	- SD Core register map (required for controllers earlier than msm-v5)
> +	- CQE register map (Optional, CQE support is present on SDHC instance meant
> +	                    for eMMC and version v4.2 and above)
> +- reg-names: When CQE register map is supplied, below reg-names are required
> +	- "hc_mem" for Host controller register map
> +	- "core_mem" for SD core register map
> +	- "cqhci_mem" for CQE register map

'_mem' is redundant, so drop.

>  - interrupts: Should contain an interrupt-specifiers for the interrupts:
>  	- Host controller interrupt (required)
>  - pinctrl-names: Should contain only one value - "default".
> -- 
> Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
> 

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH V2] dt-bindings: mmc: sdhci-msm: Add CQE reg map
  2020-02-11 15:29 [PATCH V1] dt-bindings: mmc: sdhci-msm: Add CQE reg map Veerabhadrarao Badiganti
  2020-02-11 16:42 ` Doug Anderson
  2020-02-14 11:45 ` [PATCH V2] " Veerabhadrarao Badiganti
@ 2020-02-24 11:44 ` Veerabhadrarao Badiganti
  2020-02-24 11:57 ` [PATCH V3] " Veerabhadrarao Badiganti
  3 siblings, 0 replies; 11+ messages in thread
From: Veerabhadrarao Badiganti @ 2020-02-24 11:44 UTC (permalink / raw)
  To: ulf.hansson, robh+dt
  Cc: devicetree, linux-mmc, linux-kernel, linux-arm-msm,
	Veerabhadrarao Badiganti, Mark Rutland

CQE feature has been enabled on sdhci-msm. Add CQE reg map
and reg names that need to be supplied for supporting CQE feature.

Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
---

Changes since V1:
	- Dropped _mem suffix to reg names.
---
 Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
index 7ee639b..5445931 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
@@ -26,7 +26,13 @@ Required properties:
 
 - reg: Base address and length of the register in the following order:
 	- Host controller register map (required)
-	- SD Core register map (required for msm-v4 and below)
+	- SD Core register map (required for controllers earlier than msm-v5)
+	- CQE register map (Optional, CQE support is present on SDHC instance meant
+	                    for eMMC and version v4.2 and above)
+- reg-names: When CQE register map is supplied, below reg-names are required
+	- "hc" for Host controller register map
+	- "core" for SD core register map
+	- "cqhci" for CQE register map
 - interrupts: Should contain an interrupt-specifiers for the interrupts:
 	- Host controller interrupt (required)
 - pinctrl-names: Should contain only one value - "default".
-- 
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH V3] dt-bindings: mmc: sdhci-msm: Add CQE reg map
  2020-02-11 15:29 [PATCH V1] dt-bindings: mmc: sdhci-msm: Add CQE reg map Veerabhadrarao Badiganti
                   ` (2 preceding siblings ...)
  2020-02-24 11:44 ` Veerabhadrarao Badiganti
@ 2020-02-24 11:57 ` Veerabhadrarao Badiganti
  2020-02-27 20:54   ` Doug Anderson
                     ` (2 more replies)
  3 siblings, 3 replies; 11+ messages in thread
From: Veerabhadrarao Badiganti @ 2020-02-24 11:57 UTC (permalink / raw)
  To: ulf.hansson, robh+dt
  Cc: asutoshd, stummala, sayalil, cang, rampraka, dianders, linux-mmc,
	linux-kernel, linux-arm-msm, Veerabhadrarao Badiganti,
	Mark Rutland,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS

CQE feature has been enabled on sdhci-msm. Add CQE reg map
and reg names that need to be supplied for supporting CQE feature.

Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
---
Changes since V2:
	- Dropped _mem suffix to reg names.

Changes since V1:
	- Updated description for more clarity & Fixed typos.
---
 Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
index 7ee639b..5445931 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
@@ -26,7 +26,13 @@ Required properties:
 
 - reg: Base address and length of the register in the following order:
 	- Host controller register map (required)
-	- SD Core register map (required for msm-v4 and below)
+	- SD Core register map (required for controllers earlier than msm-v5)
+	- CQE register map (Optional, CQE support is present on SDHC instance meant
+	                    for eMMC and version v4.2 and above)
+- reg-names: When CQE register map is supplied, below reg-names are required
+	- "hc" for Host controller register map
+	- "core" for SD core register map
+	- "cqhci" for CQE register map
 - interrupts: Should contain an interrupt-specifiers for the interrupts:
 	- Host controller interrupt (required)
 - pinctrl-names: Should contain only one value - "default".
-- 
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH V3] dt-bindings: mmc: sdhci-msm: Add CQE reg map
  2020-02-24 11:57 ` [PATCH V3] " Veerabhadrarao Badiganti
@ 2020-02-27 20:54   ` Doug Anderson
  2020-02-28 15:10   ` Rob Herring
  2020-03-04 15:34   ` Ulf Hansson
  2 siblings, 0 replies; 11+ messages in thread
From: Doug Anderson @ 2020-02-27 20:54 UTC (permalink / raw)
  To: Veerabhadrarao Badiganti
  Cc: Ulf Hansson, Rob Herring, Asutosh Das, Sahitya Tummala,
	Sayali Lokhande, cang, Ram Prakash Gupta, Linux MMC List, LKML,
	linux-arm-msm, Mark Rutland,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS

Hi,

On Mon, Feb 24, 2020 at 3:58 AM Veerabhadrarao Badiganti
<vbadigan@codeaurora.org> wrote:
>
> CQE feature has been enabled on sdhci-msm. Add CQE reg map
> and reg names that need to be supplied for supporting CQE feature.
>
> Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
> ---
> Changes since V2:
>         - Dropped _mem suffix to reg names.
>
> Changes since V1:
>         - Updated description for more clarity & Fixed typos.
> ---
>  Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)

Reviewed-by: Douglas Anderson <dianders@chromium.org>

I assume you'll have a follow-up fixing the driver since commit
a4080225f51d ("mmc: cqhci: support for command queue enabled host")
refers to "cqhci_mem".


Also something to keep in mind for future patches (no action needed
for this patch): most maintainers frown on making v2 of a patch
"In-Reply-To" v1 of a patch.  I notice that your v3 was in-reply-to v2
and v2 was in-reply-to v1.  You probably don't want to do this.  One
such reference to people not liking it [1] specifically said "they
should not be replies to old versions of that patch; otherwise the
threading looks really weird and confusing."

[1] https://lore.kernel.org/r/CAJWu+oocs3T8orMNt6AmdVgWONzZg0vD=E8EdvzE9rOi_XatUw@mail.gmail.com


-Doug

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH V3] dt-bindings: mmc: sdhci-msm: Add CQE reg map
  2020-02-24 11:57 ` [PATCH V3] " Veerabhadrarao Badiganti
  2020-02-27 20:54   ` Doug Anderson
@ 2020-02-28 15:10   ` Rob Herring
  2020-03-04 15:34   ` Ulf Hansson
  2 siblings, 0 replies; 11+ messages in thread
From: Rob Herring @ 2020-02-28 15:10 UTC (permalink / raw)
  To: Veerabhadrarao Badiganti
  Cc: ulf.hansson, robh+dt, asutoshd, stummala, sayalil, cang,
	rampraka, dianders, linux-mmc, linux-kernel, linux-arm-msm,
	Veerabhadrarao Badiganti, Mark Rutland,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS

On Mon, 24 Feb 2020 17:27:50 +0530, Veerabhadrarao Badiganti wrote:
> CQE feature has been enabled on sdhci-msm. Add CQE reg map
> and reg names that need to be supplied for supporting CQE feature.
> 
> Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
> ---
> Changes since V2:
> 	- Dropped _mem suffix to reg names.
> 
> Changes since V1:
> 	- Updated description for more clarity & Fixed typos.
> ---
>  Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH V3] dt-bindings: mmc: sdhci-msm: Add CQE reg map
  2020-02-24 11:57 ` [PATCH V3] " Veerabhadrarao Badiganti
  2020-02-27 20:54   ` Doug Anderson
  2020-02-28 15:10   ` Rob Herring
@ 2020-03-04 15:34   ` Ulf Hansson
  2 siblings, 0 replies; 11+ messages in thread
From: Ulf Hansson @ 2020-03-04 15:34 UTC (permalink / raw)
  To: Veerabhadrarao Badiganti
  Cc: Rob Herring, Asutosh Das, Sahitya Tummala, Sayali Lokhande, cang,
	Ram Prakash Gupta, Doug Anderson, linux-mmc,
	Linux Kernel Mailing List, linux-arm-msm, Mark Rutland,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS

On Mon, 24 Feb 2020 at 12:58, Veerabhadrarao Badiganti
<vbadigan@codeaurora.org> wrote:
>
> CQE feature has been enabled on sdhci-msm. Add CQE reg map
> and reg names that need to be supplied for supporting CQE feature.
>
> Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>

Applied for next, thanks!

Kind regards
Uffe


> ---
> Changes since V2:
>         - Dropped _mem suffix to reg names.
>
> Changes since V1:
>         - Updated description for more clarity & Fixed typos.
> ---
>  Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> index 7ee639b..5445931 100644
> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> @@ -26,7 +26,13 @@ Required properties:
>
>  - reg: Base address and length of the register in the following order:
>         - Host controller register map (required)
> -       - SD Core register map (required for msm-v4 and below)
> +       - SD Core register map (required for controllers earlier than msm-v5)
> +       - CQE register map (Optional, CQE support is present on SDHC instance meant
> +                           for eMMC and version v4.2 and above)
> +- reg-names: When CQE register map is supplied, below reg-names are required
> +       - "hc" for Host controller register map
> +       - "core" for SD core register map
> +       - "cqhci" for CQE register map
>  - interrupts: Should contain an interrupt-specifiers for the interrupts:
>         - Host controller interrupt (required)
>  - pinctrl-names: Should contain only one value - "default".
> --
> Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project

^ permalink raw reply	[flat|nested] 11+ messages in thread

end of thread, other threads:[~2020-03-04 15:35 UTC | newest]

Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-02-11 15:29 [PATCH V1] dt-bindings: mmc: sdhci-msm: Add CQE reg map Veerabhadrarao Badiganti
2020-02-11 16:42 ` Doug Anderson
2020-02-12 12:00   ` Veerabhadrarao Badiganti
2020-02-12 23:21     ` Doug Anderson
2020-02-14 11:45 ` [PATCH V2] " Veerabhadrarao Badiganti
2020-02-19 20:08   ` Rob Herring
2020-02-24 11:44 ` Veerabhadrarao Badiganti
2020-02-24 11:57 ` [PATCH V3] " Veerabhadrarao Badiganti
2020-02-27 20:54   ` Doug Anderson
2020-02-28 15:10   ` Rob Herring
2020-03-04 15:34   ` Ulf Hansson

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).