From: Jerome Brunet <jbrunet@baylibre.com>
To: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
linux-amlogic@lists.infradead.org
Cc: narmstrong@baylibre.com, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] clk: meson: meson8b: Drop CLK_IS_CRITICAL from fclk_div2
Date: Thu, 25 Jun 2020 08:30:45 +0200 [thread overview]
Message-ID: <1j366jbqsq.fsf@starbuckisacylon.baylibre.com> (raw)
In-Reply-To: <20200620161422.24114-1-martin.blumenstingl@googlemail.com>
On Sat 20 Jun 2020 at 18:14, Martin Blumenstingl <martin.blumenstingl@googlemail.com> wrote:
> Drop CLK_IS_CRITICAL from fclk_div2. This was added because we didn't
> know the relation between this clock and RGMII Ethernet. It turns out
> that fclk_div2 is used as "timing adjustment clock" to generate the RX
> delay on the MAC side - which was enabled by u-boot on Odriod-C1. When
> using the RX delay on the PHY side or not using a RX delay at all then
> this clock can be disabled.
>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Applied. Thx
prev parent reply other threads:[~2020-06-25 6:30 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-20 16:14 [PATCH] clk: meson: meson8b: Drop CLK_IS_CRITICAL from fclk_div2 Martin Blumenstingl
2020-06-22 7:55 ` Neil Armstrong
2020-06-25 6:30 ` Jerome Brunet [this message]
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