From: Jerome Brunet <jbrunet@baylibre.com>
To: "Liang.Yang" <liang.yang@amlogic.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
linux-mtd@lists.infradead.org
Cc: Rob Herring <robh+dt@kernel.org>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Neil Armstrong <narmstrong@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Kevin Hilman <khilman@baylibre.com>,
Jianxin Pan <jianxin.pan@amlogic.com>,
Victor Wan <victor.wan@amlogic.com>,
XianWei Zhao <xianwei.zhao@amlogic.com>,
Kelvin Zhang <kelvin.zhang@amlogic.com>,
BiChao Zheng <bichao.zheng@amlogic.com>,
YongHui Yu <yonghui.yu@amlogic.com>,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH RESEND v2 2/2] dt-bindings: nand: meson: refine Amlogic NAND controller driver
Date: Wed, 02 Mar 2022 09:42:06 +0100 [thread overview]
Message-ID: <1jczj47ne5.fsf@starbuckisacylon.baylibre.com> (raw)
In-Reply-To: <4741f36a-e17a-75c3-124f-447e4426c436@amlogic.com>
On Wed 02 Mar 2022 at 13:19, Liang.Yang <liang.yang@amlogic.com> wrote:
> Hi Jerome,
>
> On 2022/2/28 19:36, Jerome Brunet wrote:
>> [ EXTERNAL EMAIL ]
>>
>> On Thu 17 Feb 2022 at 14:33, Liang Yang <liang.yang@amlogic.com> wrote:
>>
>>> convert txt to yaml and refine the meson NFC clock document.
>>>
>>> Signed-off-by: Liang Yang <liang.yang@amlogic.com>
>>> ---
>>> .../bindings/mtd/amlogic,meson-nand.txt | 60 ----------------
>>> .../bindings/mtd/amlogic,meson-nand.yaml | 70 +++++++++++++++++++
>>> 2 files changed, 70 insertions(+), 60 deletions(-)
>>> delete mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
>>> create mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
>>>
>>> diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
>>> deleted file mode 100644
>>> index 5794ab1147c1..000000000000
>>> --- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
>>> +++ /dev/null
>>> @@ -1,60 +0,0 @@
>>> -Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
>>> -
>>> -This file documents the properties in addition to those available in
>>> -the MTD NAND bindings.
>>> -
>>> -Required properties:
>>> -- compatible : contains one of:
>>> - - "amlogic,meson-gxl-nfc"
>>> - - "amlogic,meson-axg-nfc"
>>> -- clocks :
>>> - A list of phandle + clock-specifier pairs for the clocks listed
>>> - in clock-names.
>>> -
>>> -- clock-names: Should contain the following:
>>> - "core" - NFC module gate clock
>>> - "device" - device clock from eMMC sub clock controller
>>> - "rx" - rx clock phase
>>> - "tx" - tx clock phase
>>> -
>>> -- amlogic,mmc-syscon : Required for NAND clocks, it's shared with SD/eMMC
>>> - controller port C
>>> -
>>> -Optional children nodes:
>>> -Children nodes represent the available nand chips.
>>> -
>>> -Other properties:
>>> -see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindings.
>>> -
>>> -Example demonstrate on AXG SoC:
>>> -
>>> - sd_emmc_c_clkc: mmc@7000 {
>>> - compatible = "amlogic,meson-axg-mmc-clkc", "syscon";
>>> - reg = <0x0 0x7000 0x0 0x800>;
>>> - };
>>> -
>>> - nand-controller@7800 {
>>> - compatible = "amlogic,meson-axg-nfc";
>>> - reg = <0x0 0x7800 0x0 0x100>;
>>> - #address-cells = <1>;
>>> - #size-cells = <0>;
>>> - interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
>>> -
>>> - clocks = <&clkc CLKID_SD_EMMC_C>,
>>> - <&sd_emmc_c_clkc CLKID_MMC_DIV>,
>>> - <&sd_emmc_c_clkc CLKID_MMC_PHASE_RX>,
>>> - <&sd_emmc_c_clkc CLKID_MMC_PHASE_TX>;
>>> - clock-names = "core", "device", "rx", "tx";
>>> - amlogic,mmc-syscon = <&sd_emmc_c_clkc>;
>>> -
>>> - pinctrl-names = "default";
>>> - pinctrl-0 = <&nand_pins>;
>>> -
>>> - nand@0 {
>>> - reg = <0>;
>>> - #address-cells = <1>;
>>> - #size-cells = <1>;
>>> -
>>> - nand-on-flash-bbt;
>>> - };
>>> - };
>>> diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
>>> new file mode 100644
>>> index 000000000000..671f0a8fdc7c
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
>>> @@ -0,0 +1,70 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/clock/amlogic,mmc-clkc.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
>>> +
>>> +maintainers:
>>> + - liang.yang@amlogic.com
>>> +
>>> +properties:
>>> + compatible:
>>> + enum:
>>> + - "amlogic,meson-gxl-nfc"
>>> + - "amlogic,meson-axg-nfc"
>>> +
>>> + reg:
>>> + maxItems: 2
>>> +
>>> + interrupts:
>>> + maxItems: 1
>>> +
>>> + clocks:
>>> + maxItems: 2
>>> +
>>> + clock-names:
>>> + items:
>>> + - const: "core", "device"
>>> +
>>> + "#clock-cells":
>>> + const: 1
>>> +
>>> +required:
>>> + - compatible
>>> + - reg
>>> + - interrupts
>>> + - clocks
>>> + - clock-names
>>> + - "#clock-cells"
>>> +
>>> +additionalProperties: false
>>> +
>>> +examples:
>>> + - |
>>> + nand-controller@7800 {
>>> + compatible = "amlogic,meson-axg-nfc";
>>> + reg = <0x0 0x7800 0x0 0x100>,
>>> + <0x0 0x7000 0x0 0x1>;
>> Please name the register ressources instead of relying on the order
> ok
>> Also, use the actual size of region, not the size you are using in the
>> driver. AFAIK, the size of the 2nd region is not 0x1
> yes, it should be 0x4 here, i will fix it.
> we only need to use a 32bits SDEMMC_CLOCK register.
> thanks.
No, it is not the point.
What register you need in the driver is not relevant.
What is relevant is the actual size of the memory region - so it not 0x1
or 0x4 ... more likely 0x800 from what I see in the AXG dts.
>>
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
>>> +
>>> + clocks = <&clkc CLKID_SD_EMMC_C>,
>>> + <&clkc CLKID_FCLK_DIV2>;
>>> + clock-names = "core", "device";
>>> +
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&nand_pins>;
>>> +
>>> + nand@0 {
>>> + reg = <0>;
>>> + #address-cells = <1>;
>>> + #size-cells = <1>;
>>> +
>>> + nand-on-flash-bbt;
>>> + };
>>> + };
>>> +
>>> +...
>>> \ No newline at end of file
>> .
prev parent reply other threads:[~2022-03-02 8:46 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-17 6:33 [PATCH RESEND v2 0/2] refine the NFC clock framework Liang Yang
2022-02-17 6:33 ` [PATCH RESEND v2 1/2] mtd: rawnand: meson: discard the common MMC sub " Liang Yang
2022-02-17 13:05 ` kernel test robot
2022-02-28 11:28 ` Jerome Brunet
2022-03-11 8:28 ` Liang Yang
2022-02-17 6:33 ` [PATCH RESEND v2 2/2] dt-bindings: nand: meson: refine Amlogic NAND controller driver Liang Yang
2022-02-28 11:36 ` Jerome Brunet
[not found] ` <4741f36a-e17a-75c3-124f-447e4426c436@amlogic.com>
2022-03-02 8:42 ` Jerome Brunet [this message]
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