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From: Jerome Brunet <jbrunet@baylibre.com>
To: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	sboyd@kernel.org
Cc: Neil Armstrong <narmstrong@baylibre.com>,
	mturquette@baylibre.com, khilman@baylibre.com,
	linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH v2 0/3] clk: meson: rounding for fast clocks on 32-bit SoCs
Date: Mon, 07 Jun 2021 09:04:13 +0200	[thread overview]
Message-ID: <1jr1heqhoy.fsf@starbuckisacylon.baylibre.com> (raw)
In-Reply-To: <CAFBinCDn_0TeyLG9b9uB+4-4PdeNXgja11wf2CGcQ99tUNjkyQ@mail.gmail.com>


On Fri 04 Jun 2021 at 19:18, Martin Blumenstingl <martin.blumenstingl@googlemail.com> wrote:

> Hi Jerome, Hi Stephen,
>
> On Mon, May 24, 2021 at 12:37 PM Martin Blumenstingl
> <martin.blumenstingl@googlemail.com> wrote:
>>
>> On the 32-bit Amlogic Meson8/8b/8m2 SoCs we run into a problem with the
>> fast HDMI PLL and it's OD (post-dividers). This clock tree can run at
>> up to approx. 3GHz.
>> This however causes a problem, because these rates require BIT(31) to
>> be usable. Unfortunately this is not the case with clk_ops.round_rate
>> on 32-bit systems. BIT(31) is reserved for the sign (+ or -).
>>
>> clk_ops.determine_rate does not suffer from this limitation. It uses
>> an int to signal any errors and can then take all availble 32 bits for
>> the clock rate.
>>
>> Changes since v1 from [0]:
>> - reworked the first patch so the the existing
>>   divider_{ro_}round_rate_parent implementations are using the new
>>   divider_{ro_}determine_rate implementations to avoid code duplication
>>   (thanks Jerome for the suggestion)
>> - added a patch to switch the default clk_divider_{ro_}ops to use
>>   .determine_rate instead of .round_rate as suggested by Jerome
>>   (thanks)
>> - dropped a patch for the Meson PLL ops as these are independent from
>>   the divider patches and Jerome has applied that one directly (thanks)
>> - added Jerome's Reviewed-by to the meson clk-regmap patch (thanks!)
>> - dropped the RFC prefix
> please let me know what you think about this v2
> I am asking because clk-divider is widely used, so I'd appreciate if
> this gets some time in linux-next (so for example Kernel CI can test
> this and report issues if there are any).
>

Looks good to me
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>

>
> Best regards,
> Martin


  reply	other threads:[~2021-06-07  7:05 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-24 10:37 [PATCH v2 0/3] clk: meson: rounding for fast clocks on 32-bit SoCs Martin Blumenstingl
2021-05-24 10:37 ` [PATCH v2 1/3] clk: divider: Add re-usable determine_rate implementations Martin Blumenstingl
2021-05-24 10:37 ` [PATCH v2 2/3] clk: divider: Switch from .round_rate to .determine_rate by default Martin Blumenstingl
2021-05-24 10:37 ` [PATCH v2 3/3] clk: meson: regmap: switch to determine_rate for the dividers Martin Blumenstingl
2021-06-04 17:18 ` [PATCH v2 0/3] clk: meson: rounding for fast clocks on 32-bit SoCs Martin Blumenstingl
2021-06-07  7:04   ` Jerome Brunet [this message]
2021-06-22 21:04     ` Martin Blumenstingl
2021-06-22 21:17       ` Stephen Boyd

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