From: Chuck Ebbert <76306.1226@compuserve.com>
To: "Philippe Gramoullé" <philippe.gramoulle@mmania.com>
Cc: linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: 2.5.67-mm4 & IRQ balancing
Date: Sat, 19 Apr 2003 08:21:38 -0400 [thread overview]
Message-ID: <200304190825_MC3-1-3519-8F9@compuserve.com> (raw)
Philippe wrote:
> CPU0 CPU1
> 0: 47851610 0 IO-APIC-edge timer
> 1: 51789 0 IO-APIC-edge i8042
> 2: 0 0 XT-PIC cascade
> 3: 171 0 IO-APIC-edge serial
> 8: 772066 0 IO-APIC-edge rtc
> 12: 3 0 IO-APIC-edge i8042, i8042, i8042, i8042
> 15: 58 1 IO-APIC-edge ide1
> 16: 47047 0 IO-APIC-level ohci1394
> 18: 391753 0 IO-APIC-level EMU10K1
> 19: 911863 0 IO-APIC-level uhci-hcd
> 20: 261806 0 IO-APIC-level eth0
> 22: 273648 0 IO-APIC-level aic7xxx
> 23: 0 0 IO-APIC-level uhci-hcd
> NMI: 47853468 47852927
> LOC: 47860500 47860630
> ERR: 0
> MIS: 0
I wonder what is the reason for all the NMIs? And why arent't the local
APIC interrupt counters in sync?
With 2.5.66 I have twice as many interrupts on CPU1 as you. :)
CPU0 CPU1
0: 250666330 0 IO-APIC-edge timer
1: 545 1 IO-APIC-edge i8042
2: 0 0 XT-PIC cascade
12: 124 0 IO-APIC-edge i8042
15: 21 1 IO-APIC-edge ide1
18: 8484 0 IO-APIC-level ide3
19: 4679 0 IO-APIC-level uhci-hcd, eth0
NMI: 0 0
LOC: 250677924 250677924
ERR: 0
MIS: 0
------
Chuck
next reply other threads:[~2003-04-19 12:13 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-04-19 12:21 Chuck Ebbert [this message]
2003-04-19 13:14 ` 2.5.67-mm4 & IRQ balancing Philippe Gramoullé
-- strict thread matches above, loose matches on Subject: below --
2003-04-19 1:03 Nakajima, Jun
2003-04-18 23:58 Philippe Gramoullé
2003-04-19 0:51 ` Andrew Morton
2003-04-19 13:39 ` Philippe Gramoullé
2003-04-19 20:38 ` Andrew Morton
2003-04-22 10:06 ` Philippe Gramoullé
2003-04-22 10:32 ` Arjan van de Ven
2003-04-23 19:41 ` Bill Davidsen
2003-04-23 20:13 ` Zwane Mwaikambo
2003-04-24 21:32 ` Bill Davidsen
2003-04-25 9:03 ` Arjan van de Ven
2003-04-23 20:15 ` Andrew Morton
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