From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S264904AbTHWSI1 (ORCPT ); Sat, 23 Aug 2003 14:08:27 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S266155AbTHWSI1 (ORCPT ); Sat, 23 Aug 2003 14:08:27 -0400 Received: from fed1mtao04.cox.net ([68.6.19.241]:478 "EHLO fed1mtao04.cox.net") by vger.kernel.org with ESMTP id S264904AbTHWSDk (ORCPT ); Sat, 23 Aug 2003 14:03:40 -0400 Date: Sat, 23 Aug 2003 11:03:38 -0700 From: "Barry K. Nathan" To: Zwane Mwaikambo Cc: Mikael Pettersson , linux-kernel@vger.kernel.org, lkml@kcore.org Subject: Re: Pentium-M? Message-ID: <20030823180338.GA3562@ip68-4-255-84.oc.oc.cox.net> References: <200308231236.h7NCaMl0018383@harpo.it.uu.se> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.1i Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Aug 23, 2003 at 09:03:17AM -0400, Zwane Mwaikambo wrote: > That's interesting, intel compiler recommends P4 type optimisations, > also worth noting that the P-M has hardware prefetch. I'm pretty sure the "Tualatin" Pentium III's also have hardware prefetch. So it's not something specific to the P4 or P-M. -Barry K. Nathan