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* [PATCH] 2.6.0-test9-mm2: cpu_sibling_map fix
@ 2003-11-12  1:19 James Cleverdon
  0 siblings, 0 replies; only message in thread
From: James Cleverdon @ 2003-11-12  1:19 UTC (permalink / raw)
  To: linux-kernel, Andrew Morton, Martin J. Bligh; +Cc: John Stultz, Chris McDermott

On summit-based machines the cpu_sibling_map data has been hosed for some 
time.  I found out why in Intel's IA-32 Software Deveveopers' Manual Vol 2 
under CPUID.  Looks like the value that cpuid returns is the one latched at 
reset, and doesn't reflect any changes made by the BIOS later:

	* Local APIC ID (high byte of EBX)--this number is the 8-bit ID that is
	  assigned to the local APIC on the processor during power up. This field
	  was introduced in the Pentium 4 processor.

Also, the code in init_intel was a bit overdesigned.  Until Intel releases a 
chip with a non-power-of-2 sibling count on it, there's no point in all that 
bit bashing.


diff -pru 2.6.0-test9-mm2/arch/i386/kernel/cpu/intel.c 
q9m2/arch/i386/kernel/cpu/intel.c
--- 2.6.0-test9-mm2/arch/i386/kernel/cpu/intel.c	2003-11-11 11:38:01.000000000 
-0800
+++ q9m2/arch/i386/kernel/cpu/intel.c	2003-11-11 16:16:56.000000000 -0800
@@ -276,8 +276,6 @@ static void __init init_intel(struct cpu
 		extern	int phys_proc_id[NR_CPUS];
 		
 		u32 	eax, ebx, ecx, edx;
-		int 	index_lsb, index_msb, tmp;
-		int	initial_apic_id;
 		int 	cpu = smp_processor_id();
 
 		cpuid(1, &eax, &ebx, &ecx, &edx);
@@ -286,8 +284,6 @@ static void __init init_intel(struct cpu
 		if (smp_num_siblings == 1) {
 			printk(KERN_INFO  "CPU: Hyper-Threading is disabled\n");
 		} else if (smp_num_siblings > 1 ) {
-			index_lsb = 0;
-			index_msb = 31;
 			/*
 			 * At this point we only support two siblings per
 			 * processor package.
@@ -298,20 +294,13 @@ static void __init init_intel(struct cpu
 				smp_num_siblings = 1;
 				goto too_many_siblings;
 			}
-			tmp = smp_num_siblings;
-			while ((tmp & 1) == 0) {
-				tmp >>=1 ;
-				index_lsb++;
-			}
-			tmp = smp_num_siblings;
-			while ((tmp & 0x80000000 ) == 0) {
-				tmp <<=1 ;
-				index_msb--;
-			}
-			if (index_lsb != index_msb )
-				index_msb++;
-			initial_apic_id = ebx >> 24 & 0xff;
-			phys_proc_id[cpu] = initial_apic_id >> index_msb;
+			/* cpuid returns the value latched in the HW at reset,
+			 * not the APIC ID register's value.  For any box
+			 * whose BIOS changes APIC IDs, like clustered APIC
+			 * systems, we must use hard_smp_processor_id.
+			 * See Intel's IA-32 SW Dev's Manual Vol2 under CPUID.
+			 */
+			phys_proc_id[cpu] = hard_smp_processor_id() & ~(smp_num_siblings - 1);
 
 			printk(KERN_INFO  "CPU: Physical Processor ID: %d\n",
                                phys_proc_id[cpu]);


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