Re: hash table sizes

From: Jack Steiner <steiner@sgi.com>
To: Anton Blanchard <anton@samba.org>
Cc: Jes Sorensen <jes@trained-monkey.org>,
	Alexander Viro <viro@math.psu.edu>, Andrew Morton <akpm@osdl.org>,
	"William Lee Irwin, III" <wli@holomorphy.com>,
	linux-kernel@vger.kernel.org, jbarnes@sgi.com
Subject: Re: hash table sizes
Date: Tue, 25 Nov 2003 17:11:08 -0600	[thread overview]
Message-ID: <20031125231108.GA5675@sgi.com> (raw)
In-Reply-To: <20031125211611.GE26811@krispykreme>

On Wed, Nov 26, 2003 at 08:16:11AM +1100, Anton Blanchard wrote:
>  
> Hi,
> 
> > Some architectures (IA64, for example) dont have severe limitations on
> > usage of vmalloc space. Would it make sense to use vmalloc on these
> > architectures. Even if the max size of the structures being allocated
> > is limited to an acceptible size, it still concentrates the memory on
> > a single node. 
> 
> The kernel region on many architectures is mapped with large pages, we
> would lose that by going to vmalloc.
> 
> Anton

That was a concern to me too. However, on IA64, all page structs are
in the vmalloc region (it isnt allocated by vmalloc but is in the
same region as vmalloc'ed pages. They are mapped with 16k pages instead of the 64MB 
pages used for memory allocated by kmalloc).

Before switching to 16K pages for the page structs, we made numerous performance
measurements. As far as we could tell, there was no performce degradation
caused by the smaller pages. It seems to me that if page structs are ok 
being mapped by 16k pages, the hash tables would be ok too. 

-- 
Thanks

Jack Steiner (steiner@sgi.com)          651-683-5302
Principal Engineer                      SGI - Silicon Graphics, Inc.