[PATCH 0/5] Boot IRQ quirks and rerouting [repost]

[PATCH 0/5] Boot IRQ quirks and rerouting [repost]

[Stefan Assmann]

These patches are against linux-2.6-tip, auto-x86-next.

The AMD/ATI and Broadcomm patches are not included yet, we're working
on getting things ready for submission.

The patch for the bootirqquirk= parameter will be released later.


When IRQ lines on secondary or higher IO-APICs are masked (as done by
RT and others), many chipsets redirect IRQs on this line to the PIC, and
thereby regularly to the first IO-APIC in the system. This causes
spurious interrupts and can lead to disabled IRQ lines.

Disabling this "boot interrupt" (as it is mostly used to supply all
IRQs to the legacy PIC during boot) is chipset-specific. It is also not
possible for all chips. This patchset disables the boot interrupt on
chipsets where this is possible and where we know how to do it.

Where disabling the boot interrupt is not possible, the patches provide a boot
parameter pci=ioapicreroute to only use the boot interrupt (on the first
IO-APIC) instead of the "original" line on the secondary (tertiary ...)
IO-APIC. The original line remains masked, and IRQs always appear on the boot
interrupt line on the first IO-APIC instead.

A second boot parameter pci=noioapicquirk allows to disable all quirks that
disable boot interrupts.

All patches are co-authored by Stefan Assmann and Olaf Dabrunz. But
according to Documentation/SubmittingPatches, the patch submission format
allows only for one author.

Documentation/kernel-parameters.txt |    7 ++++
arch/x86/pci/common.c               |    9 +++++
drivers/acpi/pci_irq.c              |   56 ++++++++++++++++++++++++++++++++++
drivers/pci/quirks.c                |   59 +++++++++++++++++++++++++++++++++++-
include/asm-x86/io_apic.h           |    8 ++++
include/asm-x86/pci.h               |    4 +-
include/linux/pci.h                 |    7 +++-
include/linux/pci_ids.h             |    6 +++
8 files changed, 151 insertions(+), 5 deletions(-)

[PATCH 1/5] Add PCI IDs for devices that need boot irq quirks

[Stefan Assmann]

From: Olaf Dabrunz <od@suse.de>

Signed-off-by: Stefan Assmann <sassmann@suse.de>
Signed-off-by: Olaf Dabrunz <od@suse.de>
---
 include/linux/pci_ids.h |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 9b940e6..b89616d 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2233,6 +2233,10 @@
 #define PCI_DEVICE_ID_INTEL_PXH_0	0x0329
 #define PCI_DEVICE_ID_INTEL_PXH_1	0x032A
 #define PCI_DEVICE_ID_INTEL_PXHV	0x032C
+#define PCI_DEVICE_ID_INTEL_80332_0	0x0330
+#define PCI_DEVICE_ID_INTEL_80332_1	0x0332
+#define PCI_DEVICE_ID_INTEL_80333_0	0x0370
+#define PCI_DEVICE_ID_INTEL_80333_1	0x0372
 #define PCI_DEVICE_ID_INTEL_82375	0x0482
 #define PCI_DEVICE_ID_INTEL_82424	0x0483
 #define PCI_DEVICE_ID_INTEL_82378	0x0484
@@ -2305,6 +2309,7 @@
 #define PCI_DEVICE_ID_INTEL_ESB_4	0x25a4
 #define PCI_DEVICE_ID_INTEL_ESB_5	0x25a6
 #define PCI_DEVICE_ID_INTEL_ESB_9	0x25ab
+#define PCI_DEVICE_ID_INTEL_ESB_10	0x25ac
 #define PCI_DEVICE_ID_INTEL_82820_HB	0x2500
 #define PCI_DEVICE_ID_INTEL_82820_UP_HB	0x2501
 #define PCI_DEVICE_ID_INTEL_82850_HB	0x2530
-- 
1.5.2.4

[PATCH 2/5] Introduce pci=noioapicquirk kernel cmdline option

[Stefan Assmann]

From: Stefan Assmann <sassmann@suse.de>

Introduce pci=noioapicquirk kernel cmdline option to disable all boot
interrupt quirks

Signed-off-by: Stefan Assmann <sassmann@suse.de>
Signed-off-by: Olaf Dabrunz <od@suse.de>
---
 Documentation/kernel-parameters.txt |    3 +++
 arch/x86/pci/common.c               |    4 ++++
 include/asm-x86/io_apic.h           |    4 ++++
 include/asm-x86/pci.h               |    1 +
 4 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 2000977..4bfd0e6 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -1507,6 +1507,9 @@ and is between 256 and 4096 characters. It is defined in the file
 		nomsi		[MSI] If the PCI_MSI kernel config parameter is
 				enabled, this kernel boot option can be used to
 				disable the use of MSI interrupts system-wide.
+		noioapicquirk	[APIC] Disable all boot interrupt quirks.
+				Safety option to keep boot IRQs enabled. This
+				should never be necessary.
 		biosirq		[X86-32] Use PCI BIOS calls to get the interrupt
 				routing table. These calls are known to be buggy
 				on several machines and they hang the machine
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 6e64aaf..4ddb5cb 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -22,6 +22,7 @@ unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
 
 static int pci_bf_sort;
 int pci_routeirq;
+int noioapicquirk;
 int pcibios_last_bus = -1;
 unsigned long pirq_table_addr;
 struct pci_bus *pci_root_bus;
@@ -495,6 +496,9 @@ char * __devinit  pcibios_setup(char *str)
 	} else if (!strcmp(str, "skip_isa_align")) {
 		pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
 		return NULL;
+	} else if (!strcmp(str, "noioapicquirk")) {
+		noioapicquirk = 1;
+		return NULL;
 	}
 	return str;
 }
diff --git a/include/asm-x86/io_apic.h b/include/asm-x86/io_apic.h
index 8b1f568..92c2916 100644
--- a/include/asm-x86/io_apic.h
+++ b/include/asm-x86/io_apic.h
@@ -157,11 +157,15 @@ extern int sis_apic_bug;
 /* 1 if "noapic" boot option passed */
 extern int skip_ioapic_setup;
 
+/* 1 if "noapic" boot option passed */
+extern int noioapicquirk;
+
 /* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */
 extern int timer_through_8259;
 
 static inline void disable_ioapic_setup(void)
 {
+	noioapicquirk = 1;
 	skip_ioapic_setup = 1;
 }
 
diff --git a/include/asm-x86/pci.h b/include/asm-x86/pci.h
index 2db14cf..30eec93 100644
--- a/include/asm-x86/pci.h
+++ b/include/asm-x86/pci.h
@@ -19,6 +19,7 @@ struct pci_sysdata {
 };
 
 extern int pci_routeirq;
+extern int noioapicquirk;
 
 /* scan a bus after allocating a pci_sysdata for it */
 extern struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops,
-- 
1.5.2.4

[PATCH 3/5] Introduce pci=ioapicreroute kernel cmdline option

[Stefan Assmann]

From: Stefan Assmann <sassmann@suse.de>

Introduce pci=ioapicreroute kernel cmdline option to enable rerouting of boot
interrupts to the primary io-apic.

Signed-off-by: Stefan Assmann <sassmann@suse.de>
Signed-off-by: Olaf Dabrunz <od@suse.de>
---
 Documentation/kernel-parameters.txt |    4 ++++
 arch/x86/pci/common.c               |    5 +++++
 include/asm-x86/io_apic.h           |    4 ++++
 include/asm-x86/pci.h               |    1 +
 4 files changed, 14 insertions(+), 0 deletions(-)

diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 4bfd0e6..01b638b 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -1510,6 +1510,10 @@ and is between 256 and 4096 characters. It is defined in the file
 		noioapicquirk	[APIC] Disable all boot interrupt quirks.
 				Safety option to keep boot IRQs enabled. This
 				should never be necessary.
+		ioapicreroute	[APIC] Enable rerouting of boot IRQs to the
+				primary IO-APIC for bridges that cannot disable
+				boot IRQs. This fixes a source of spurious IRQs
+				when the system masks IRQs.
 		biosirq		[X86-32] Use PCI BIOS calls to get the interrupt
 				routing table. These calls are known to be buggy
 				on several machines and they hang the machine
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 4ddb5cb..00a319c 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -23,6 +23,7 @@ unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
 static int pci_bf_sort;
 int pci_routeirq;
 int noioapicquirk;
+int noioapicreroute = 1;
 int pcibios_last_bus = -1;
 unsigned long pirq_table_addr;
 struct pci_bus *pci_root_bus;
@@ -499,6 +500,10 @@ char * __devinit  pcibios_setup(char *str)
 	} else if (!strcmp(str, "noioapicquirk")) {
 		noioapicquirk = 1;
 		return NULL;
+	} else if (!strcmp(str, "ioapicreroute")) {
+		if (noioapicreroute != -1)
+			noioapicreroute = 0;
+		return NULL;
 	}
 	return str;
 }
diff --git a/include/asm-x86/io_apic.h b/include/asm-x86/io_apic.h
index 92c2916..4ea118a 100644
--- a/include/asm-x86/io_apic.h
+++ b/include/asm-x86/io_apic.h
@@ -160,12 +160,16 @@ extern int skip_ioapic_setup;
 /* 1 if "noapic" boot option passed */
 extern int noioapicquirk;
 
+/* -1 if "noapic" boot option passed */
+extern int noioapicreroute;
+
 /* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */
 extern int timer_through_8259;
 
 static inline void disable_ioapic_setup(void)
 {
 	noioapicquirk = 1;
+	noioapicreroute = -1;
 	skip_ioapic_setup = 1;
 }
 
diff --git a/include/asm-x86/pci.h b/include/asm-x86/pci.h
index 30eec93..52a29f7 100644
--- a/include/asm-x86/pci.h
+++ b/include/asm-x86/pci.h
@@ -20,6 +20,7 @@ struct pci_sysdata {
 
 extern int pci_routeirq;
 extern int noioapicquirk;
+extern int ioapicreroute;
 
 /* scan a bus after allocating a pci_sysdata for it */
 extern struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops,
-- 
1.5.2.4

[PATCH 4/5] Add quirk to disable boot interrupt generation on intel 6300ESB

[Stefan Assmann]

From: Stefan Assmann <sassmann@suse.de>

Add a quirk to disable legacy boot interrupt generation on intel devices
that support disabling it.

This patch benefited from discussions with Alexander Graf, Torsten Duwe,
Ihno Krumreich, Daniel Gollub, Hannes Reinecke. The conclusions we drew
and the patch itself are the authors' responsibility alone.

Signed-off-by: Stefan Assmann <sassmann@suse.de>
Signed-off-by: Olaf Dabrunz <od@suse.de>
---
 drivers/pci/quirks.c |   30 ++++++++++++++++++++++++++++++
 1 files changed, 30 insertions(+), 0 deletions(-)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index dabb563..c392f84 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1363,6 +1363,36 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,	0x2609, quirk_intel_pcie_pm);
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,	0x260a, quirk_intel_pcie_pm);
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,	0x260b, quirk_intel_pcie_pm);
 
+#ifdef CONFIG_X86_IO_APIC
+/*
+ * On some chipsets we can disable the generation of legacy INTx boot
+ * interrupts.
+ */
+
+/*
+ * IO-APIC1 on 6300ESB generates boot interrupts, see intel order no
+ * 300641-004US, section 5.7.3.
+ */
+#define INTEL_6300_IOAPIC_ABAR		0x40
+#define INTEL_6300_DISABLE_BOOT_IRQ	(1<<14)
+
+static void quirk_disable_intel_boot_interrupt(struct pci_dev *dev)
+{
+	u16 pci_config_word;
+
+	if (noioapicquirk)
+		return;
+
+	pci_read_config_word(dev, INTEL_6300_IOAPIC_ABAR, &pci_config_word);
+	pci_config_word |= INTEL_6300_DISABLE_BOOT_IRQ;
+	pci_write_config_word(dev, INTEL_6300_IOAPIC_ABAR, pci_config_word);
+
+	printk(KERN_INFO "disabled boot interrupt on device 0x%04x:0x%04x\n",
+		dev->vendor, dev->device);
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL,   PCI_DEVICE_ID_INTEL_ESB_10, 	quirk_disable_intel_boot_interrupt);
+#endif /* CONFIG_X86_IO_APIC */
+
 /*
  * Toshiba TC86C001 IDE controller reports the standard 8-byte BAR0 size
  * but the PIO transfers won't work if BAR0 falls at the odd 8 bytes.
-- 
1.5.2.4

[PATCH 5/5] reroute PCI interrupt to legacy boot interrupt equivalent

[Stefan Assmann]

From: Stefan Assmann <sassmann@suse.de>

Some chipsets (e.g. intel 6700PXH) generate a legacy INTx when the
IRQ entry in the chipset's IO-APIC is masked (as, e.g. the RT kernel
does during interrupt handling). On chipsets where this INTx generation
cannot be disabled, we reroute the valid interrupts to their legacy
equivalent to get rid of spurious interrupts that might otherwise bring
down (vital) interrupt lines through spurious interrupt detection in
note_interrupt().

This patch benefited from discussions with Alexander Graf, Torsten Duwe,
Ihno Krumreich, Daniel Gollub, Hannes Reinecke. The conclusions we drew
and the patch itself are the authors' responsibility alone.

Signed-off-by: Stefan Assmann <sassmann@suse.de>
Signed-off-by: Olaf Dabrunz <od@suse.de>
---
 drivers/acpi/pci_irq.c |   56 ++++++++++++++++++++++++++++++++++++++++++++++++
 drivers/pci/quirks.c   |   28 ++++++++++++++++++++++++
 include/linux/pci.h    |    6 +++++
 3 files changed, 90 insertions(+), 0 deletions(-)

diff --git a/drivers/acpi/pci_irq.c b/drivers/acpi/pci_irq.c
index e556f30..31cf1dc 100644
--- a/drivers/acpi/pci_irq.c
+++ b/drivers/acpi/pci_irq.c
@@ -384,6 +384,27 @@ acpi_pci_free_irq(struct acpi_prt_entry *entry,
 	return irq;
 }
 
+#ifdef CONFIG_X86_IO_APIC
+extern int noioapicquirk;
+
+static int bridge_has_boot_interrupt_variant(struct pci_bus *bus)
+{
+	struct pci_bus *bus_it;
+
+	for (bus_it = bus ; bus_it ; bus_it = bus_it->parent) {
+		if (!bus_it->self)
+			return 0;
+
+		printk(KERN_INFO "vendor=%04x device=%04x\n", bus_it->self->vendor,
+				bus_it->self->device);
+
+		if (bus_it->self->irq_reroute_variant)
+			return bus_it->self->irq_reroute_variant;
+	}
+	return 0;
+}
+#endif /* CONFIG_X86_IO_APIC */
+
 /*
  * acpi_pci_irq_lookup
  * success: return IRQ >= 0
@@ -413,6 +434,41 @@ acpi_pci_irq_lookup(struct pci_bus *bus,
 	}
 
 	ret = func(entry, triggering, polarity, link);
+
+#ifdef CONFIG_X86_IO_APIC
+	/*
+	 * Some chipsets (e.g. intel 6700PXH) generate a legacy INTx when the
+	 * IRQ entry in the chipset's IO-APIC is masked (as, e.g. the RT kernel
+	 * does during interrupt handling). When this INTx generation cannot be
+	 * disabled, we reroute these interrupts to their legacy equivalent to
+	 * get rid of spurious interrupts.
+	 */
+        if (!noioapicquirk) {
+		switch (bridge_has_boot_interrupt_variant(bus)) {
+		case 0:
+			/* no rerouting necessary */
+			break;
+
+		case INTEL_IRQ_REROUTE_VARIANT:
+			/*
+			 * Remap according to INTx routing table in 6700PXH
+			 * specs, intel order number 302628-002, section
+			 * 2.15.2. Other chipsets (80332, ...) have the same
+			 * mapping and are handled here as well.
+			 */
+			printk(KERN_INFO "pci irq %d -> rerouted to legacy "
+					 "irq %d\n", ret, (ret % 4) + 16);
+			ret = (ret % 4) + 16;
+			break;
+
+		default:
+			printk(KERN_INFO "not rerouting irq %d to legacy irq: "
+					 "unknown mapping\n", ret);
+			break;
+		}
+	}
+#endif /* CONFIG_X86_IO_APIC */
+
 	return ret;
 }
 
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index c392f84..4b5b49e 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1365,6 +1365,34 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,	0x260b, quirk_intel_pcie_pm);
 
 #ifdef CONFIG_X86_IO_APIC
 /*
+ * Boot interrupts on some chipsets cannot be turned off. For these chipsets,
+ * remap the original interrupt in the linux kernel to the boot interrupt, so
+ * that a PCI device's interrupt handler is installed on the boot interrupt
+ * line instead.
+ */
+static void quirk_reroute_to_boot_interrupts_intel(struct pci_dev *dev)
+{
+	int i;
+
+	if (noioapicquirk)
+		return;
+
+	dev->irq_reroute_variant = INTEL_IRQ_REROUTE_VARIANT;
+
+	printk(KERN_INFO "PCI quirk: reroute interrupts for 0x%04x:0x%04x\n",
+			dev->vendor, dev->device);
+	return;
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL,	PCI_DEVICE_ID_INTEL_80333_0,	quirk_reroute_to_boot_interrupts_intel);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL,	PCI_DEVICE_ID_INTEL_80333_1,	quirk_reroute_to_boot_interrupts_intel);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL,	PCI_DEVICE_ID_INTEL_ESB2_0,	quirk_reroute_to_boot_interrupts_intel);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL,	PCI_DEVICE_ID_INTEL_PXH_0,	quirk_reroute_to_boot_interrupts_intel);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL,	PCI_DEVICE_ID_INTEL_PXH_1,	quirk_reroute_to_boot_interrupts_intel);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL,	PCI_DEVICE_ID_INTEL_PXHV,	quirk_reroute_to_boot_interrupts_intel);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL,	PCI_DEVICE_ID_INTEL_80332_0,	quirk_reroute_to_boot_interrupts_intel);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL,	PCI_DEVICE_ID_INTEL_80332_1,	quirk_reroute_to_boot_interrupts_intel);
+
+/*
  * On some chipsets we can disable the generation of legacy INTx boot
  * interrupts.
  */
diff --git a/include/linux/pci.h b/include/linux/pci.h
index d18b1dd..6755cf5 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -117,6 +117,11 @@ enum pci_dev_flags {
 	PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
 };
 
+enum pci_irq_reroute_variant {
+	INTEL_IRQ_REROUTE_VARIANT = 1,
+	MAX_IRQ_REROUTE_VARIANTS = 3
+};
+
 typedef unsigned short __bitwise pci_bus_flags_t;
 enum pci_bus_flags {
 	PCI_BUS_FLAGS_NO_MSI   = (__force pci_bus_flags_t) 1,
@@ -194,6 +199,7 @@ struct pci_dev {
 	unsigned int	no_d1d2:1;   /* only allow d0 or d3 */
 	unsigned int	block_ucfg_access:1;	/* userspace config space access is blocked */
 	unsigned int	broken_parity_status:1;	/* Device generates false positive parity */
+	unsigned int	irq_reroute_variant:2;	/* device needs IRQ rerouting variant */
 	unsigned int 	msi_enabled:1;
 	unsigned int	msix_enabled:1;
 	unsigned int	is_managed:1;
-- 
1.5.2.4

Re: [PATCH 0/5] Boot IRQ quirks and rerouting [repost]

[Ingo Molnar]

* Stefan Assmann <sassmann@suse.de> wrote:

> These patches are against linux-2.6-tip, auto-x86-next.
> 
> The AMD/ATI and Broadcomm patches are not included yet, we're working 
> on getting things ready for submission.
> 
> The patch for the bootirqquirk= parameter will be released later.

applied, thanks Stefan. I have created a new 
tip/x86/pci-ioapic-boot-irq-quirks topic branch for this. Lets see how 
these changes work out in practice.

	Ingo

Re: [PATCH 0/5] Boot IRQ quirks and rerouting [repost]

[Ingo Molnar]

* Ingo Molnar <mingo@elte.hu> wrote:

> * Stefan Assmann <sassmann@suse.de> wrote:
> 
> > These patches are against linux-2.6-tip, auto-x86-next.
> > 
> > The AMD/ATI and Broadcomm patches are not included yet, we're working 
> > on getting things ready for submission.
> > 
> > The patch for the bootirqquirk= parameter will be released later.
> 
> applied, thanks Stefan. I have created a new 
> tip/x86/pci-ioapic-boot-irq-quirks topic branch for this. Lets see how 
> these changes work out in practice.

-tip testing found the following build failure:

init/built-in.o: In function `nosmp':
main.c:(.init.text+0x14): undefined reference to `noioapicquirk'
main.c:(.init.text+0x1e): undefined reference to `noioapicreroute'
init/built-in.o: In function `maxcpus':
main.c:(.init.text+0x133): undefined reference to `noioapicquirk'
main.c:(.init.text+0x13d): undefined reference to `noioapicreroute'
arch/x86/kernel/built-in.o: In function `parse_noapic':
io_apic_32.c:(.init.text+0x7836): undefined reference to `noioapicquirk'
io_apic_32.c:(.init.text+0x7840): undefined reference to `noioapicreroute'

with this config:

  http://redhat.com/~mingo/misc/config-Wed_Jun_18_14_23_24_CEST_2008.bad

fixed via the patch below.

	Ingo

--------->
commit 7c01f5c8fc734cfbbdad3b389b88e1aa12c78e5b
Author: Ingo Molnar <mingo@elte.hu>
Date:   Wed Jun 18 14:47:09 2008 +0200

    x86: boot IRQ quirks and rerouting, fix
    
    fix:
    
    init/built-in.o: In function `nosmp':
    main.c:(.init.text+0x14): undefined reference to `noioapicquirk'
    main.c:(.init.text+0x1e): undefined reference to `noioapicreroute'
    init/built-in.o: In function `maxcpus':
    main.c:(.init.text+0x133): undefined reference to `noioapicquirk'
    main.c:(.init.text+0x13d): undefined reference to `noioapicreroute'
    arch/x86/kernel/built-in.o: In function `parse_noapic':
    io_apic_32.c:(.init.text+0x7836): undefined reference to `noioapicquirk'
    io_apic_32.c:(.init.text+0x7840): undefined reference to `noioapicreroute'
    
    Signed-off-by: Ingo Molnar <mingo@elte.hu>

diff --git a/include/asm-x86/io_apic.h b/include/asm-x86/io_apic.h
index 5f68b1d..3086c26 100644
--- a/include/asm-x86/io_apic.h
+++ b/include/asm-x86/io_apic.h
@@ -157,8 +157,10 @@ extern int timer_through_8259;
 
 static inline void disable_ioapic_setup(void)
 {
+#ifdef CONFIG_PCI
 	noioapicquirk = 1;
 	noioapicreroute = -1;
+#endif
 	skip_ioapic_setup = 1;
 }
 

Re: [PATCH 0/5] Boot IRQ quirks and rerouting [repost]

[Olaf Dabrunz]

On 18-Jun-08, Ingo Molnar wrote:
> 
> * Stefan Assmann <sassmann@suse.de> wrote:
> 
> > These patches are against linux-2.6-tip, auto-x86-next.
> > 
> > The AMD/ATI and Broadcomm patches are not included yet, we're working 
> > on getting things ready for submission.
> > 
> > The patch for the bootirqquirk= parameter will be released later.
> 
> applied, thanks Stefan. I have created a new 

Cool. :)

> tip/x86/pci-ioapic-boot-irq-quirks topic branch for this. Lets see how 
> these changes work out in practice.

Thanks for creating the branch.

-- 
Olaf Dabrunz (od/odabrunz), SUSE Linux Products GmbH, Nürnberg