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Date: Tue, 17 Jan 2012 00:18:12 +0000
From: Matthew Garrett <mjg59@srcf.ucam.org>
To: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>, Jeff Garzik <jeff@garzik.org>,
        Lin Ming <ming.m.lin@intel.com>,
        Andrew Morton <akpm@linux-foundation.org>, linux-ide@vger.kernel.org,
        LKML <linux-kernel@vger.kernel.org>
Subject: Re: [git patches] libata updates for 3.3
Message-ID: <20120117001812.GA9588@srcf.ucam.org>
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On Mon, Jan 16, 2012 at 04:02:31PM -0800, Linus Torvalds wrote:
> On Mon, Jan 16, 2012 at 3:54 PM, Alan Cox <alan@lxorguk.ukuu.org.uk> wrote:
> >> Part of the problem with force-enable is that the MMIO BAR may need a
> >> value, and not have it.  That, and an expectations mismatch between BIOS
> >
> > That's fine - we can happily assign one at boot time.
> 
> Actually, I think the reason that Matthews patch doesn't work for me
> is that on my device, BAR #5 really is a _port_ BAR.
> 
> I didn't play with it much - busy merging and looking at various other
> issues - but I'm starting to wonder whether maybe that 8086:1c01 chip
> doesn't support AHCI at all. Or maybe it does something differently.
> 
> Other reports of this have BAR#5 either clear, or an MMIO BAR.   That
> 
>    Region 5: I/O ports at ffe0 [size=16]
> 
> looks really odd. Matthew's patch uses
> 
>   pci_assign_resource(pdev, 5);
> 
> but if it is a PIO region, that won't help anything..

More recent ICHs may need different setup here. The datasheet should 
have enough to figure it out, but I can take a look once I get back from 
LCA.

-- 
Matthew Garrett | mjg59@srcf.ucam.org