From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754079Ab2AaL5z (ORCPT ); Tue, 31 Jan 2012 06:57:55 -0500 Received: from lxorguk.ukuu.org.uk ([81.2.110.251]:52098 "EHLO lxorguk.ukuu.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753031Ab2AaL5x (ORCPT ); Tue, 31 Jan 2012 06:57:53 -0500 Date: Tue, 31 Jan 2012 11:58:55 +0000 From: Alan Cox To: Linus Torvalds Cc: Hitoshi Mitake , Ingo Molnar , Matthew Wilcox , Roland Dreier , Andrew Morton , James Bottomley , linux-kernel@vger.kernel.org, hpa@linux.intel.com Subject: Re: [PATCH] NVMe: Fix compilation on architecturs without readq/writeq Message-ID: <20120131115855.5861bad7@pyramind.ukuu.org.uk> In-Reply-To: References: <1327021265-22184-1-git-send-email-matthew.r.wilcox@intel.com> <20120121082857.GC32134@elte.hu> <20120121165830.GA9216@elte.hu> X-Mailer: Claws Mail 3.8.0 (GTK+ 2.24.8; x86_64-redhat-linux-gnu) Face: iVBORw0KGgoAAAANSUhEUgAAADAAAAAwBAMAAAClLOS0AAAAFVBMVEWysKsSBQMIAwIZCwj///8wIhxoRDXH9QHCAAABeUlEQVQ4jaXTvW7DIBAAYCQTzz2hdq+rdg494ZmBeE5KYHZjm/d/hJ6NfzBJpp5kRb5PHJwvMPMk2L9As5Y9AmYRBL+HAyJKeOU5aHRhsAAvORQ+UEgAvgddj/lwAXndw2laEDqA4x6KEBhjYRCg9tBFCOuJFxg2OKegbWjbsRTk8PPhKPD7HcRxB7cqhgBRp9Dcqs+B8v4CQvFdqeot3Kov6hBUn0AJitrzY+sgUuiA8i0r7+B3AfqKcN6t8M6HtqQ+AOoELCikgQSbgabKaJW3kn5lBs47JSGDhhLKDUh1UMipwwinMYPTBuIBjEclSaGZUk9hDlTb5sUTYN2SFFQuPe4Gox1X0FZOufjgBiV1Vls7b+GvK3SU4wfmcGo9rPPQzgIabfj4TYQo15k3bTHX9RIw/kniir5YbtJF4jkFG+dsDK1IgE413zAthU/vR2HVMmFUPIHTvF6jWCpFaGw/A3qWgnbxpSm9MSmY5b3pM1gvNc/gQfwBsGwF0VCtxZgAAAAASUVORK5CYII= Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > u64 val; > val = readl(addr); > val |= readl(addr+4) << 32; > > is well-defined and must read the low word first - both at the C level > *and* at the CPU level. Anything else would be a bug in the > architecture "readl()" implementation or the hardware. That doesn't make the access atomic to hardware however as a true 64bit readq/writeq would be ? It seems to me the two are not quite the same semantically