[PATCH v1 0/3] Add support for LP3

[PATCH v1 0/3] Add support for LP3

[Peter De Schrijver]

Introduce support for LP3 (CPU core clockgating) for Tegra20 and Tegra30.

Peter De Schrijver (3):
  ARM: tegra: definitions for flow controller
  ARM: tegra: assembler code for LP3
  ARM: tegra: cpuidle driver for tegra

 arch/arm/mach-tegra/Makefile   |    2 +
 arch/arm/mach-tegra/cpuidle.c  |  107 ++++++++++++++++++++++++++++++++++++++++
 arch/arm/mach-tegra/flowctrl.h |   37 ++++++++++++++
 arch/arm/mach-tegra/sleep.S    |   91 ++++++++++++++++++++++++++++++++++
 4 files changed, 237 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-tegra/cpuidle.c
 create mode 100644 arch/arm/mach-tegra/flowctrl.h
 create mode 100644 arch/arm/mach-tegra/sleep.S

-- 
1.7.7.rc0.72.g4b5ea.dirty

[PATCH v1 1/3] ARM: tegra: definitions for flow controller

[Peter De Schrijver]

Introduce some definitions for the tegra flow contoller. This will be
used by the code which controls entering and leaving LP3.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
---
 arch/arm/mach-tegra/flowctrl.h |   37 +++++++++++++++++++++++++++++++++++++
 1 files changed, 37 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-tegra/flowctrl.h

diff --git a/arch/arm/mach-tegra/flowctrl.h b/arch/arm/mach-tegra/flowctrl.h
new file mode 100644
index 0000000..74c6efb
--- /dev/null
+++ b/arch/arm/mach-tegra/flowctrl.h
@@ -0,0 +1,37 @@
+/*
+ * arch/arm/mach-tegra/flowctrl.h
+ *
+ * functions and macros to control the flowcontroller
+ *
+ * Copyright (c) 2010-2012, NVIDIA Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __MACH_TEGRA_FLOWCTRL_H
+#define __MACH_TEGRA_FLOWCTRL_H
+
+#define FLOW_CTRL_HALT_CPU0_EVENTS	0x0
+#define FLOW_CTRL_WAITEVENT		(2 << 29)
+#define FLOW_CTRL_WAIT_FOR_INTERRUPT	(4 << 29)
+#define FLOW_CTRL_JTAG_RESUME		(1 << 28)
+#define FLOW_CTRL_HALT_CPU_IRQ		(1 << 10)
+#define	FLOW_CTRL_HALT_CPU_FIQ		(1 << 8)
+#define FLOW_CTRL_CPU0_CSR		0x8
+#define	FLOW_CTRL_CSR_INTR_FLAG		(1 << 15)
+#define FLOW_CTRL_CSR_EVENT_FLAG	(1 << 14)
+#define FLOW_CTRL_CSR_ENABLE		(1 << 0)
+#define FLOW_CTRL_HALT_CPU1_EVENTS	0x14
+#define FLOW_CTRL_CPU1_CSR		0x18
+
+#endif
-- 
1.7.7.rc0.72.g4b5ea.dirty

[PATCH v1 2/3] ARM: tegra: assembler code for LP3

[Peter De Schrijver]

Configure the flow controller for clockgating and enter WFI

Based on work by:

Colin Cross <ccross@android.com>
Gary King <gking@nvidia.com>

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
---
 arch/arm/mach-tegra/sleep.S |   91 +++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 91 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-tegra/sleep.S

diff --git a/arch/arm/mach-tegra/sleep.S b/arch/arm/mach-tegra/sleep.S
new file mode 100644
index 0000000..8f9fde1
--- /dev/null
+++ b/arch/arm/mach-tegra/sleep.S
@@ -0,0 +1,91 @@
+/*
+ * arch/arm/mach-tegra/sleep.S
+ *
+ * Copyright (c) 2010-2011, NVIDIA Corporation.
+ * Copyright (c) 2011, Google, Inc.
+ *
+ * Author: Colin Cross <ccross@android.com>
+ *         Gary King <gking@nvidia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ */
+
+#include <linux/linkage.h>
+#include <mach/io.h>
+#include <mach/iomap.h>
+
+#include "flowctrl.h"
+
+#define TEGRA_FLOW_CTRL_VIRT (TEGRA_FLOW_CTRL_BASE - IO_PPSB_PHYS \
+					+ IO_PPSB_VIRT)
+
+/* returns the offset of the flow controller halt register for a cpu */
+.macro cpu_to_halt_reg rd, rcpu
+	cmp	\rcpu, #0
+	subne	\rd, \rcpu, #1
+	movne	\rd, \rd, lsl #3
+	addne	\rd, \rd, #0x14
+	moveq	\rd, #0
+.endm
+
+/* returns the offset of the flow controller csr register for a cpu */
+.macro cpu_to_csr_reg rd, rcpu
+	cmp	\rcpu, #0
+	subne	\rd, \rcpu, #1
+	movne	\rd, \rd, lsl #3
+	addne	\rd, \rd, #0x18
+	moveq	\rd, #8
+.endm
+
+/* returns the ID of the current processor */
+.macro cpu_id, rd
+	mrc	p15, 0, \rd, c0, c0, 5
+	and	\rd, \rd, #0xF
+.endm
+
+/* loads a 32-bit value into a register without a data access */
+.macro mov32, reg, val
+	movw	\reg, #:lower16:\val
+	movt	\reg, #:upper16:\val
+.endm
+
+/*
+ * tegra_cpu_wfi
+ *
+ * puts current CPU in clock-gated wfi using the flow controller
+ *
+ * corrupts r0-r3
+ * must be called with MMU on
+ */
+
+ENTRY(tegra_cpu_wfi)
+	cpu_id	r0
+	cpu_to_halt_reg r1, r0
+	cpu_to_csr_reg r2, r0
+	mov32	r0, TEGRA_FLOW_CTRL_VIRT
+	mov	r3, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG
+	str	r3, [r0, r2]	@ clear event & interrupt status
+	mov	r3, #FLOW_CTRL_WAIT_FOR_INTERRUPT | FLOW_CTRL_JTAG_RESUME
+	str	r3, [r0, r1]	@ put flow controller in wait irq mode
+	dsb
+	wfi
+	mov	r3, #0
+	str	r3, [r0, r1]	@ clear flow controller halt status
+	mov	r3, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG
+	str	r3, [r0, r2]	@ clear event & interrupt status
+	dsb
+	mov	pc, lr
+ENDPROC(tegra_cpu_wfi)
+
-- 
1.7.7.rc0.72.g4b5ea.dirty

[PATCH v1 3/3] ARM: tegra: cpuidle driver for tegra

[Peter De Schrijver]

CPUidle driver for tegra. In this version only LP3 (clockgating) is supported.

Based on work by:

Colin Cross <ccross@android.com>
Gary King <gking@nvidia.com>

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
---
 arch/arm/mach-tegra/Makefile  |    2 +
 arch/arm/mach-tegra/cpuidle.c |  107 +++++++++++++++++++++++++++++++++++++++++
 2 files changed, 109 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-tegra/cpuidle.c

diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index b78bda8..c06c280 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -6,6 +6,8 @@ obj-y                                   += irq.o
 obj-y                                   += clock.o
 obj-y                                   += timer.o
 obj-y					+= fuse.o
+obj-y					+= cpuidle.o
+obj-y					+= sleep.o
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)		+= powergate.o
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)         += tegra2_clocks.o
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)		+= tegra2_emc.o
diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c
new file mode 100644
index 0000000..d83a8c0
--- /dev/null
+++ b/arch/arm/mach-tegra/cpuidle.c
@@ -0,0 +1,107 @@
+/*
+ * arch/arm/mach-tegra/cpuidle.c
+ *
+ * CPU idle driver for Tegra CPUs
+ *
+ * Copyright (c) 2010-2012, NVIDIA Corporation.
+ * Copyright (c) 2011 Google, Inc.
+ * Author: Colin Cross <ccross@android.com>
+ *         Gary King <gking@nvidia.com>
+ *
+ * Rework for 3.3 by Peter De Schrijver <pdeschrijver@nvidia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/cpu.h>
+#include <linux/cpuidle.h>
+#include <linux/hrtimer.h>
+
+#include <mach/iomap.h>
+
+extern void tegra_cpu_wfi(void);
+
+static int tegra_idle_enter_lp3(struct cpuidle_device *dev,
+				struct cpuidle_driver *drv, int index);
+
+struct cpuidle_driver tegra_idle_driver = {
+	.name = "tegra_idle",
+	.owner = THIS_MODULE,
+	.state_count = 1,
+	.states = {
+		[0] = {
+			.enter			= tegra_idle_enter_lp3,
+			.exit_latency		= 10,
+			.target_residency	= 10,
+			.power_usage		= 600,
+			.flags			= CPUIDLE_FLAG_TIME_VALID,
+			.name			= "LP3",
+			.desc			= "CPU flow-controlled",
+		},
+	},
+};
+
+static DEFINE_PER_CPU(struct cpuidle_device, tegra_idle_device);
+
+static int tegra_idle_enter_lp3(struct cpuidle_device *dev,
+	struct cpuidle_driver *drv, int index)
+{
+	ktime_t enter, exit;
+	s64 us;
+
+	local_irq_disable();
+	local_fiq_disable();
+
+	enter = ktime_get();
+
+	tegra_cpu_wfi();
+
+	exit = ktime_sub(ktime_get(), enter);
+	us = ktime_to_us(exit);
+
+	local_fiq_enable();
+	local_irq_enable();
+
+	dev->last_residency = us;
+
+	return index;
+}
+
+static int __init tegra_cpuidle_init(void)
+{
+	int ret;
+	unsigned int cpu;
+	struct cpuidle_device *dev;
+	struct cpuidle_driver *drv = &tegra_idle_driver;
+
+	ret = cpuidle_register_driver(&tegra_idle_driver);
+	if (ret) {
+		pr_err("CPUidle driver registration failed\n");
+		return ret;
+	}
+
+	for_each_possible_cpu(cpu) {
+		dev = &per_cpu(tegra_idle_device, cpu);
+		dev->cpu = cpu;
+
+		dev->state_count = drv->state_count;
+		ret = cpuidle_register_device(dev);
+		if (ret) {
+			pr_err("CPU%u: CPUidle device registration failed\n",
+				cpu);
+			return ret;
+		}
+	}
+	return 0;
+}
+device_initcall(tegra_cpuidle_init);
-- 
1.7.7.rc0.72.g4b5ea.dirty

RE: [PATCH v1 0/3] Add support for LP3

[Stephen Warren]

Peter De Schrijver wrote at Thursday, January 26, 2012 9:22 AM:
> Introduce support for LP3 (CPU core clockgating) for Tegra20 and Tegra30.

The series,

Acked-by: Stephen Warren <swarren@nvidia.com>

(although I'm not very familiar with cpuidle, so a review from e.g.
Colin would be great too)

Tested-by: Stephen Warren <swarren@nvidia.com>

(On Harmony, observed /sys/devices/system/cpu/cpu*/cpuidle/state0/usage
incrementing over time. Tested audio playback as well)

-- 
nvpublic

Re: [PATCH v1 3/3] ARM: tegra: cpuidle driver for tegra

[Mark Brown]

On Thu, Jan 26, 2012 at 06:22:03PM +0200, Peter De Schrijver wrote:
> CPUidle driver for tegra. In this version only LP3 (clockgating) is supported.

Are you aware of the work Rob Lee is doing on providing a common library
for the ARM generic bits of cpuidle?  I really must convert the s3c64xx
work I did on that over some time...

Re: [PATCH v1 0/3] Add support for LP3

[Colin Cross]

On Thu, Jan 26, 2012 at 8:22 AM, Peter De Schrijver
<pdeschrijver@nvidia.com> wrote:
> Introduce support for LP3 (CPU core clockgating) for Tegra20 and Tegra30.
>
> Peter De Schrijver (3):
>  ARM: tegra: definitions for flow controller
>  ARM: tegra: assembler code for LP3
>  ARM: tegra: cpuidle driver for tegra
>
>  arch/arm/mach-tegra/Makefile   |    2 +
>  arch/arm/mach-tegra/cpuidle.c  |  107 ++++++++++++++++++++++++++++++++++++++++
>  arch/arm/mach-tegra/flowctrl.h |   37 ++++++++++++++
>  arch/arm/mach-tegra/sleep.S    |   91 ++++++++++++++++++++++++++++++++++
>  4 files changed, 237 insertions(+), 0 deletions(-)
>  create mode 100644 arch/arm/mach-tegra/cpuidle.c
>  create mode 100644 arch/arm/mach-tegra/flowctrl.h
>  create mode 100644 arch/arm/mach-tegra/sleep.S

For the series,
Acked-by: Colin Cross <ccross@android.com>

Re: [PATCH v1 1/3] ARM: tegra: definitions for flow controller

[Olof Johansson]

Hi,

On Thu, Jan 26, 2012 at 8:22 AM, Peter De Schrijver
<pdeschrijver@nvidia.com> wrote:
> Introduce some definitions for the tegra flow contoller. This will be
> used by the code which controls entering and leaving LP3.
>
> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>

Do you expect to use these defines anywhere else than in the sleep.S
in the near future? If not, please just move them over to that file.

-Olof

RE: [PATCH v1 3/3] ARM: tegra: cpuidle driver for tegra

[Bedia, Vaibhav]

On Thu, Jan 26, 2012 at 21:52:03, Peter De Schrijver wrote:
[...]
> +static int tegra_idle_enter_lp3(struct cpuidle_device *dev,
> +	struct cpuidle_driver *drv, int index)
> +{
> +	ktime_t enter, exit;
> +	s64 us;
> +
> +	local_irq_disable();
> +	local_fiq_disable();
> +
> +	enter = ktime_get();
> +
> +	tegra_cpu_wfi();
> +
> +	exit = ktime_sub(ktime_get(), enter);
> +	us = ktime_to_us(exit);
> +
> +	local_fiq_enable();
> +	local_irq_enable();
> +
> +	dev->last_residency = us;
> +
> +	return index;
> +}

You can probably drop local_irq_disable() and local_irq_enable().

Re: [PATCH v1 3/3] ARM: tegra: cpuidle driver for tegra

[Colin Cross]

On Thu, Jan 26, 2012 at 10:59 PM, Bedia, Vaibhav <vaibhav.bedia@ti.com> wrote:
> On Thu, Jan 26, 2012 at 21:52:03, Peter De Schrijver wrote:
> [...]
>> +static int tegra_idle_enter_lp3(struct cpuidle_device *dev,
>> +     struct cpuidle_driver *drv, int index)
>> +{
>> +     ktime_t enter, exit;
>> +     s64 us;
>> +
>> +     local_irq_disable();
>> +     local_fiq_disable();
>> +
>> +     enter = ktime_get();
>> +
>> +     tegra_cpu_wfi();
>> +
>> +     exit = ktime_sub(ktime_get(), enter);
>> +     us = ktime_to_us(exit);
>> +
>> +     local_fiq_enable();
>> +     local_irq_enable();
>> +
>> +     dev->last_residency = us;
>> +
>> +     return index;
>> +}
>
> You can probably drop local_irq_disable() and local_irq_enable().

local_irq_enable() is required by the cpuidle call semantics.  See
arch/arm/process.c, it has a 				WARN_ON(irqs_disabled()) after the
idle function call.  The local_irq_disable() can and probably should
be dropped, although a comment that the function is called with
interrupts off and is expected to return with interrupts on would be
helpful.

Re: [PATCH v1 1/3] ARM: tegra: definitions for flow controller

[Olof Johansson]

On Thu, Jan 26, 2012 at 6:17 PM, Olof Johansson <olof@lixom.net> wrote:
> Hi,
>
> On Thu, Jan 26, 2012 at 8:22 AM, Peter De Schrijver
> <pdeschrijver@nvidia.com> wrote:
>> Introduce some definitions for the tegra flow contoller. This will be
>> used by the code which controls entering and leaving LP3.
>>
>> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
>
> Do you expect to use these defines anywhere else than in the sleep.S
> in the near future? If not, please just move them over to that file.

I just looked at the Tegra30 secondary cores patch series, it's used there.

Please ignore.

-Olof

RE: [PATCH v1 3/3] ARM: tegra: cpuidle driver for tegra

[Bedia, Vaibhav]

On Fri, Jan 27, 2012 at 12:40:58, Colin Cross wrote:
> local_irq_enable() is required by the cpuidle call semantics.  See
> arch/arm/process.c, it has a 				WARN_ON(irqs_disabled()) after the
> idle function call.  The local_irq_disable() can and probably should
> be dropped, although a comment that the function is called with
> interrupts off and is expected to return with interrupts on would be
> helpful.
> 

Ah... I was too fixated on local_irq_disable() and local_irq_enable() in cpu_idle().
Thanks for clarifying.

RE: [PATCH v1 3/3] ARM: tegra: cpuidle driver for tegra

[Bedia, Vaibhav]

On Fri, Jan 27, 2012 at 00:41:34, Mark Brown wrote:
> On Thu, Jan 26, 2012 at 06:22:03PM +0200, Peter De Schrijver wrote:
> > CPUidle driver for tegra. In this version only LP3 (clockgating) is supported.
> 
> Are you aware of the work Rob Lee is doing on providing a common library
> for the ARM generic bits of cpuidle?  I really must convert the s3c64xx
> work I did on that over some time...

Slightly off-topic..

This is probably a bit early to ask but when it that likely to get merged?
I am working on cpuidle for AM33xx and if Rob's cpuidle consolidation is getting
merged soon I will try to use them in my baseline.

Re: [PATCH v1 3/3] ARM: tegra: cpuidle driver for tegra

[Olof Johansson]

On Thu, Jan 26, 2012 at 06:22:03PM +0200, Peter De Schrijver wrote:
> CPUidle driver for tegra. In this version only LP3 (clockgating) is supported.
> 
> Based on work by:
> 
> Colin Cross <ccross@android.com>
> Gary King <gking@nvidia.com>
> 
> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
> ---
>  arch/arm/mach-tegra/Makefile  |    2 +
>  arch/arm/mach-tegra/cpuidle.c |  107 +++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 109 insertions(+), 0 deletions(-)
>  create mode 100644 arch/arm/mach-tegra/cpuidle.c
> 
> diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
> index b78bda8..c06c280 100644
> --- a/arch/arm/mach-tegra/Makefile
> +++ b/arch/arm/mach-tegra/Makefile
> @@ -6,6 +6,8 @@ obj-y                                   += irq.o
>  obj-y                                   += clock.o
>  obj-y                                   += timer.o
>  obj-y					+= fuse.o
> +obj-y					+= cpuidle.o
> +obj-y					+= sleep.o

Nit: Not much use in building this if CONFIG_CPU_IDLE is off. Feel free to fix
that up in a new patch.


-Olof

Re: [PATCH v1 0/3] Add support for LP3

[Olof Johansson]

On Thu, Jan 26, 2012 at 06:22:00PM +0200, Peter De Schrijver wrote:
> Introduce support for LP3 (CPU core clockgating) for Tegra20 and Tegra30.
> 
> Peter De Schrijver (3):
>   ARM: tegra: definitions for flow controller
>   ARM: tegra: assembler code for LP3
>   ARM: tegra: cpuidle driver for tegra
> 
>  arch/arm/mach-tegra/Makefile   |    2 +
>  arch/arm/mach-tegra/cpuidle.c  |  107 ++++++++++++++++++++++++++++++++++++++++
>  arch/arm/mach-tegra/flowctrl.h |   37 ++++++++++++++
>  arch/arm/mach-tegra/sleep.S    |   91 ++++++++++++++++++++++++++++++++++
>  4 files changed, 237 insertions(+), 0 deletions(-)
>  create mode 100644 arch/arm/mach-tegra/cpuidle.c
>  create mode 100644 arch/arm/mach-tegra/flowctrl.h
>  create mode 100644 arch/arm/mach-tegra/sleep.S

Thanks, applied.