From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933154Ab2BBSmr (ORCPT ); Thu, 2 Feb 2012 13:42:47 -0500 Received: from e39.co.us.ibm.com ([32.97.110.160]:57482 "EHLO e39.co.us.ibm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932815Ab2BBSmq (ORCPT ); Thu, 2 Feb 2012 13:42:46 -0500 Date: Thu, 2 Feb 2012 10:42:09 -0800 From: "Paul E. McKenney" To: Linus Torvalds Cc: Torvald Riegel , Jan Kara , LKML , linux-ia64@vger.kernel.org, dsterba@suse.cz, ptesarik@suse.cz, rguenther@suse.de, gcc@gcc.gnu.org Subject: Re: Memory corruption due to word sharing Message-ID: <20120202184209.GD2518@linux.vnet.ibm.com> Reply-To: paulmck@linux.vnet.ibm.com References: <20120201151918.GC16714@quack.suse.cz> <1328118174.15992.6206.camel@triegel.csb> <1328128874.15992.6430.camel@triegel.csb> <20120201224554.GK2382@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) X-Content-Scanned: Fidelis XPS MAILER x-cbid: 12020218-4242-0000-0000-000000AC710F Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Feb 01, 2012 at 03:11:00PM -0800, Linus Torvalds wrote: > On Wed, Feb 1, 2012 at 2:45 PM, Paul E. McKenney > wrote: > > > > My (perhaps forlorn and naive) hope is that C++11 memory_order_relaxed > > will eventually allow ACCESS_ONCE() to be upgraded so that (for example) > > access-once increments can generate a single increment-memory instruction > > on x86. > > I don't think that is a semantic issue. > > gcc could do it *today* with volatile accesses. It doesn't, because > volatiles are scary and basically disables a lot of optimizations. Why > would memory ordering be substantially different just because it has a > different name? I too would much prefer that gcc volatile worked more sanely. But several people, including me, pushed on that and consistently got back "the standard doesn't say we have to do that". So I got together with the standards people and now there is something (memory_order_relaxed atomics) that is specified to work the way we want it to. Of course, it will likely be quite some time before it appears in usable form in gcc, but probably quite a bit less time than we have been pushing on the gcc folks about volatile. > > New architectures might eventually might define things like atomic_inc() > > in terms of C++11 atomics, but let's start with the straightforward stuff > > as and if it makes sense. > > SMP-atomic or percpu atomic? Or both? Only SMP-atomic. > We need both variants in the kernel. If the compiler generates one of > them for us, that doesn't really much help. I must admit that the non-x86 per-CPU atomics are, ummm, "interesting". Thanx, Paul