* [PATCH 00/18] at91 first cleanup series for 3.4
@ 2012-02-17 17:49 Nicolas Ferre
2012-02-17 17:49 ` [PATCH 01/18] ARM: at91: factorise duplicated at91sam9 idle Nicolas Ferre
0 siblings, 1 reply; 43+ messages in thread
From: Nicolas Ferre @ 2012-02-17 17:49 UTC (permalink / raw)
To: plagnioj, linux-arm-kernel; +Cc: linux-kernel
This series removes the at91_sys_read/write() functions that where
used for all System Controller devices. The static offsets that were
used prevented us from compiling several AT91 SoC support in a single
zImage.
The other cleanup is the move of some early console initialization.
All this goes on top of current material that is already in arm-soc
git tree (merge of all at91/* branches).
Jean-Christophe PLAGNIOL-VILLARD (18):
ARM: at91: factorise duplicated at91sam9 idle
ARM: at91/at91x40: remove use of at91_sys_read/write
ARM: at91: make matrix register base soc independent
ARM: at91: make ST (System Timer) soc independent
ARM: at91/pm_slowclock: rename register to named define
ARM: at91/pm_slowclock: function slow_clock() accepts parameters
ARM: at91: move at91rm9200 sdramc defines to at91rm9200_sdramc.h
ARM: at91: make sdram/ddr register base soc independent
ARM: at91/pm_slowclock: add runtime detection of memory contoller
ARM: at91/PMC: make register base soc independent
ARM: at91/rtc-at91sam9: each SoC can select the RTT device to use
ARM: at91:rtc/rtc-at91sam9: ioremap register bank
ARM: at91/rtc-at91sam9: pass the GPBR to use via ressources
ARM: at91: finally drop at91_sys_read/write
ARM: at91: merge SRAM Memory banks thanks to mirroring
Atmel: move console default platform_device to serial driver
ARM: at91/board-dt: drop default console
ARM: at91/board-dt: move at91_initialize() to init_irq()
arch/arm/mach-at91/at91rm9200.c | 7 +-
arch/arm/mach-at91/at91rm9200_devices.c | 14 +-
arch/arm/mach-at91/at91rm9200_time.c | 37 ++-
arch/arm/mach-at91/at91sam9260.c | 23 +-
arch/arm/mach-at91/at91sam9260_devices.c | 31 ++-
arch/arm/mach-at91/at91sam9261.c | 10 +-
arch/arm/mach-at91/at91sam9261_devices.c | 24 ++-
arch/arm/mach-at91/at91sam9263.c | 11 +-
arch/arm/mach-at91/at91sam9263_devices.c | 49 +++-
arch/arm/mach-at91/at91sam9_alt_reset.S | 12 +-
arch/arm/mach-at91/at91sam9g45.c | 11 +-
arch/arm/mach-at91/at91sam9g45_devices.c | 24 ++-
arch/arm/mach-at91/at91sam9g45_reset.S | 12 +-
arch/arm/mach-at91/at91sam9rl.c | 10 +-
arch/arm/mach-at91/at91sam9rl_devices.c | 24 ++-
arch/arm/mach-at91/at91sam9x5.c | 5 +-
arch/arm/mach-at91/at91x40.c | 2 +-
arch/arm/mach-at91/at91x40_time.c | 28 ++-
arch/arm/mach-at91/board-cpu9krea.c | 5 +-
arch/arm/mach-at91/board-cpuat91.c | 1 +
arch/arm/mach-at91/board-dt.c | 16 +-
arch/arm/mach-at91/board-eco920.c | 5 +-
arch/arm/mach-at91/board-kb9202.c | 1 +
arch/arm/mach-at91/board-picotux200.c | 1 +
arch/arm/mach-at91/board-rm9200dk.c | 1 +
arch/arm/mach-at91/board-rm9200ek.c | 1 +
arch/arm/mach-at91/board-yl-9200.c | 3 +-
arch/arm/mach-at91/clock.c | 81 ++++---
arch/arm/mach-at91/generic.h | 10 +
arch/arm/mach-at91/include/mach/at91_matrix.h | 23 ++
arch/arm/mach-at91/include/mach/at91_pmc.h | 56 +++--
arch/arm/mach-at91/include/mach/at91_ramc.h | 32 +++
arch/arm/mach-at91/include/mach/at91_st.h | 32 ++-
arch/arm/mach-at91/include/mach/at91rm9200.h | 10 +-
arch/arm/mach-at91/include/mach/at91rm9200_mc.h | 58 +----
.../arm/mach-at91/include/mach/at91rm9200_sdramc.h | 63 +++++
arch/arm/mach-at91/include/mach/at91sam9260.h | 14 +-
.../mach-at91/include/mach/at91sam9260_matrix.h | 36 ++--
arch/arm/mach-at91/include/mach/at91sam9261.h | 10 +-
.../mach-at91/include/mach/at91sam9261_matrix.h | 18 +-
arch/arm/mach-at91/include/mach/at91sam9263.h | 12 +-
.../mach-at91/include/mach/at91sam9263_matrix.h | 74 +++---
arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h | 6 -
arch/arm/mach-at91/include/mach/at91sam9_sdramc.h | 6 -
arch/arm/mach-at91/include/mach/at91sam9g45.h | 12 +-
.../mach-at91/include/mach/at91sam9g45_matrix.h | 84 +++---
arch/arm/mach-at91/include/mach/at91sam9rl.h | 7 +-
.../arm/mach-at91/include/mach/at91sam9rl_matrix.h | 42 ++--
arch/arm/mach-at91/include/mach/at91sam9x5.h | 5 +-
arch/arm/mach-at91/include/mach/at91x40.h | 18 +-
arch/arm/mach-at91/include/mach/hardware.h | 3 +-
arch/arm/mach-at91/include/mach/io.h | 18 --
arch/arm/mach-at91/pm.c | 35 ++-
arch/arm/mach-at91/pm.h | 11 +-
arch/arm/mach-at91/pm_slowclock.S | 271 ++++++++++----------
arch/arm/mach-at91/setup.c | 9 +
arch/avr32/mach-at32ap/at32ap700x.c | 2 -
drivers/pcmcia/at91_cf.c | 5 +-
drivers/rtc/rtc-at91sam9.c | 103 ++++-----
drivers/tty/serial/atmel_serial.c | 2 +
drivers/usb/gadget/at91_udc.c | 9 +-
drivers/usb/gadget/atmel_usba_udc.c | 6 +-
drivers/watchdog/at91rm9200_wdt.c | 8 +-
63 files changed, 877 insertions(+), 682 deletions(-)
create mode 100644 arch/arm/mach-at91/include/mach/at91_matrix.h
create mode 100644 arch/arm/mach-at91/include/mach/at91_ramc.h
create mode 100644 arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h
Best regards,
^ permalink raw reply [flat|nested] 43+ messages in thread
* [PATCH 01/18] ARM: at91: factorise duplicated at91sam9 idle
2012-02-17 17:49 [PATCH 00/18] at91 first cleanup series for 3.4 Nicolas Ferre
@ 2012-02-17 17:49 ` Nicolas Ferre
2012-02-17 17:49 ` [PATCH 02/18] ARM: at91/at91x40: remove use of at91_sys_read/write Nicolas Ferre
` (16 more replies)
0 siblings, 17 replies; 43+ messages in thread
From: Nicolas Ferre @ 2012-02-17 17:49 UTC (permalink / raw)
To: plagnioj, linux-arm-kernel; +Cc: linux-kernel
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Remove duplicated at91sam9xxxx_idle() functions introduced
by commit c9dfafb "ARM: mach-at91: move special idle code out of line".
Replace by a generic at91sam9_idle() function in setup.c common
location.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
arch/arm/mach-at91/at91sam9260.c | 8 +-------
arch/arm/mach-at91/at91sam9261.c | 8 +-------
arch/arm/mach-at91/at91sam9263.c | 8 +-------
arch/arm/mach-at91/at91sam9g45.c | 8 +-------
arch/arm/mach-at91/at91sam9rl.c | 8 +-------
arch/arm/mach-at91/clock.c | 8 ++++++++
arch/arm/mach-at91/generic.h | 3 +++
7 files changed, 16 insertions(+), 35 deletions(-)
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 9ac8c6f..e965332 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -329,15 +329,9 @@ static void __init at91sam9260_ioremap_registers(void)
at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
}
-static void at91sam9260_idle(void)
-{
- at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
- cpu_do_idle();
-}
-
static void __init at91sam9260_initialize(void)
{
- arm_pm_idle = at91sam9260_idle;
+ arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9_alt_restart;
at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
| (1 << AT91SAM9260_ID_IRQ2);
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index ab76868..d7f51d6 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -287,15 +287,9 @@ static void __init at91sam9261_ioremap_registers(void)
at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
}
-static void at91sam9261_idle(void)
-{
- at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
- cpu_do_idle();
-}
-
static void __init at91sam9261_initialize(void)
{
- arm_pm_idle = at91sam9261_idle;
+ arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9_alt_restart;
at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
| (1 << AT91SAM9261_ID_IRQ2);
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 247ab63..8bdba2a 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -308,15 +308,9 @@ static void __init at91sam9263_ioremap_registers(void)
at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
}
-static void at91sam9263_idle(void)
-{
- at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
- cpu_do_idle();
-}
-
static void __init at91sam9263_initialize(void)
{
- arm_pm_idle = at91sam9263_idle;
+ arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9_alt_restart;
at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 5b12192..5d2ff90 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -317,12 +317,6 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
}
};
-static void at91sam9g45_idle(void)
-{
- at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
- cpu_do_idle();
-}
-
/* --------------------------------------------------------------------
* AT91SAM9G45 processor initialization
* -------------------------------------------------------------------- */
@@ -343,7 +337,7 @@ static void __init at91sam9g45_ioremap_registers(void)
static void __init at91sam9g45_initialize(void)
{
- arm_pm_idle = at91sam9g45_idle;
+ arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9g45_restart;
at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index fd60e22..e86c50b 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -292,15 +292,9 @@ static void __init at91sam9rl_ioremap_registers(void)
at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
}
-static void at91sam9rl_idle(void)
-{
- at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
- cpu_do_idle();
-}
-
static void __init at91sam9rl_initialize(void)
{
- arm_pm_idle = at91sam9rl_idle;
+ arm_pm_idle = at91sam9_idle;
arm_pm_restart = at91sam9_alt_restart;
at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index a5291e0..d1b4e07 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -28,6 +28,8 @@
#include <mach/at91_pmc.h>
#include <mach/cpu.h>
+#include <asm/proc-fns.h>
+
#include "clock.h"
#include "generic.h"
@@ -818,3 +820,9 @@ static int __init at91_clock_reset(void)
return 0;
}
late_initcall(at91_clock_reset);
+
+void at91sam9_idle(void)
+{
+ at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
+ cpu_do_idle();
+}
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 7e8280e..4e322f34 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -56,6 +56,9 @@ struct device;
extern void at91_irq_suspend(void);
extern void at91_irq_resume(void);
+/* idle */
+extern void at91sam9_idle(void);
+
/* reset */
extern void at91_ioremap_rstc(u32 base_addr);
extern void at91sam9_alt_restart(char, const char *);
--
1.7.9
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [PATCH 02/18] ARM: at91/at91x40: remove use of at91_sys_read/write
2012-02-17 17:49 ` [PATCH 01/18] ARM: at91: factorise duplicated at91sam9 idle Nicolas Ferre
@ 2012-02-17 17:49 ` Nicolas Ferre
2012-02-17 17:49 ` [PATCH 03/18] ARM: at91: make matrix register base soc independent Nicolas Ferre
` (15 subsequent siblings)
16 siblings, 0 replies; 43+ messages in thread
From: Nicolas Ferre @ 2012-02-17 17:49 UTC (permalink / raw)
To: plagnioj, linux-arm-kernel; +Cc: linux-kernel
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
arch/arm/mach-at91/at91x40.c | 2 +-
arch/arm/mach-at91/at91x40_time.c | 28 +++++++++++++++++-----------
arch/arm/mach-at91/include/mach/at91x40.h | 18 +++++++++---------
3 files changed, 27 insertions(+), 21 deletions(-)
diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c
index 0154b7f..5400a1d 100644
--- a/arch/arm/mach-at91/at91x40.c
+++ b/arch/arm/mach-at91/at91x40.c
@@ -44,7 +44,7 @@ static void at91x40_idle(void)
* Disable the processor clock. The processor will be automatically
* re-enabled by an interrupt or by a reset.
*/
- at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU);
+ __raw_writel(AT91_PS_CR_CPU, AT91_PS_CR);
cpu_do_idle();
}
diff --git a/arch/arm/mach-at91/at91x40_time.c b/arch/arm/mach-at91/at91x40_time.c
index dfff289..6ca680a 100644
--- a/arch/arm/mach-at91/at91x40_time.c
+++ b/arch/arm/mach-at91/at91x40_time.c
@@ -28,6 +28,12 @@
#include <asm/mach/time.h>
#include <mach/at91_tc.h>
+#define at91_tc_read(field) \
+ __raw_readl(AT91_TC + field)
+
+#define at91_tc_write(field, value) \
+ __raw_writel(value, AT91_TC + field);
+
/*
* 3 counter/timer units present.
*/
@@ -37,12 +43,12 @@
static unsigned long at91x40_gettimeoffset(void)
{
- return (at91_sys_read(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_CV) * 1000000 / (AT91X40_MASTER_CLOCK / 128));
+ return (at91_tc_read(AT91_TC_CLK1BASE + AT91_TC_CV) * 1000000 / (AT91X40_MASTER_CLOCK / 128));
}
static irqreturn_t at91x40_timer_interrupt(int irq, void *dev_id)
{
- at91_sys_read(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_SR);
+ at91_tc_read(AT91_TC_CLK1BASE + AT91_TC_SR);
timer_tick();
return IRQ_HANDLED;
}
@@ -57,20 +63,20 @@ void __init at91x40_timer_init(void)
{
unsigned int v;
- at91_sys_write(AT91_TC + AT91_TC_BCR, 0);
- v = at91_sys_read(AT91_TC + AT91_TC_BMR);
+ at91_tc_write(AT91_TC_BCR, 0);
+ v = at91_tc_read(AT91_TC_BMR);
v = (v & ~AT91_TC_TC1XC1S) | AT91_TC_TC1XC1S_NONE;
- at91_sys_write(AT91_TC + AT91_TC_BMR, v);
+ at91_tc_write(AT91_TC_BMR, v);
- at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_CCR, AT91_TC_CLKDIS);
- at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_CMR, (AT91_TC_TIMER_CLOCK4 | AT91_TC_CPCTRG));
- at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_IDR, 0xffffffff);
- at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_RC, (AT91X40_MASTER_CLOCK / 128) / HZ - 1);
- at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_IER, (1<<4));
+ at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CCR, AT91_TC_CLKDIS);
+ at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CMR, (AT91_TC_TIMER_CLOCK4 | AT91_TC_CPCTRG));
+ at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_IDR, 0xffffffff);
+ at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_RC, (AT91X40_MASTER_CLOCK / 128) / HZ - 1);
+ at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_IER, (1<<4));
setup_irq(AT91X40_ID_TC1, &at91x40_timer_irq);
- at91_sys_write(AT91_TC + AT91_TC_CLK1BASE + AT91_TC_CCR, (AT91_TC_SWTRG | AT91_TC_CLKEN));
+ at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CCR, (AT91_TC_SWTRG | AT91_TC_CLKEN));
}
struct sys_timer at91x40_timer = {
diff --git a/arch/arm/mach-at91/include/mach/at91x40.h b/arch/arm/mach-at91/include/mach/at91x40.h
index a57829f..9068021 100644
--- a/arch/arm/mach-at91/include/mach/at91x40.h
+++ b/arch/arm/mach-at91/include/mach/at91x40.h
@@ -28,18 +28,18 @@
#define AT91X40_ID_IRQ2 18 /* External IRQ 2 */
/*
- * System Peripherals (offset from AT91_BASE_SYS)
+ * System Peripherals
*/
#define AT91_BASE_SYS 0xffc00000
-#define AT91_EBI (0xffe00000 - AT91_BASE_SYS) /* External Bus Interface */
-#define AT91_SF (0xfff00000 - AT91_BASE_SYS) /* Special Function */
-#define AT91_USART1 (0xfffcc000 - AT91_BASE_SYS) /* USART 1 */
-#define AT91_USART0 (0xfffd0000 - AT91_BASE_SYS) /* USART 0 */
-#define AT91_TC (0xfffe0000 - AT91_BASE_SYS) /* Timer Counter */
-#define AT91_PIOA (0xffff0000 - AT91_BASE_SYS) /* PIO Controller A */
-#define AT91_PS (0xffff4000 - AT91_BASE_SYS) /* Power Save */
-#define AT91_WD (0xffff8000 - AT91_BASE_SYS) /* Watchdog Timer */
+#define AT91_EBI 0xffe00000 /* External Bus Interface */
+#define AT91_SF 0xfff00000 /* Special Function */
+#define AT91_USART1 0xfffcc000 /* USART 1 */
+#define AT91_USART0 0xfffd0000 /* USART 0 */
+#define AT91_TC 0xfffe0000 /* Timer Counter */
+#define AT91_PIOA 0xffff0000 /* PIO Controller A */
+#define AT91_PS 0xffff4000 /* Power Save */
+#define AT91_WD 0xffff8000 /* Watchdog Timer */
/*
* The AT91x40 series doesn't have a debug unit like the other AT91 parts.
--
1.7.9
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [PATCH 03/18] ARM: at91: make matrix register base soc independent
2012-02-17 17:49 ` [PATCH 01/18] ARM: at91: factorise duplicated at91sam9 idle Nicolas Ferre
2012-02-17 17:49 ` [PATCH 02/18] ARM: at91/at91x40: remove use of at91_sys_read/write Nicolas Ferre
@ 2012-02-17 17:49 ` Nicolas Ferre
2012-02-17 17:49 ` [PATCH 04/18] ARM: at91: make ST (System Timer) " Nicolas Ferre
` (14 subsequent siblings)
16 siblings, 0 replies; 43+ messages in thread
From: Nicolas Ferre @ 2012-02-17 17:49 UTC (permalink / raw)
To: plagnioj, linux-arm-kernel; +Cc: linux-kernel, linux-usb, Greg Kroah-Hartman
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: linux-usb@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
arch/arm/mach-at91/at91sam9260.c | 1 +
arch/arm/mach-at91/at91sam9260_devices.c | 9 +-
arch/arm/mach-at91/at91sam9261.c | 1 +
arch/arm/mach-at91/at91sam9261_devices.c | 5 +-
arch/arm/mach-at91/at91sam9263.c | 1 +
arch/arm/mach-at91/at91sam9263_devices.c | 9 +-
arch/arm/mach-at91/at91sam9g45.c | 1 +
arch/arm/mach-at91/at91sam9g45_devices.c | 5 +-
arch/arm/mach-at91/at91sam9rl.c | 1 +
arch/arm/mach-at91/at91sam9rl_devices.c | 5 +-
arch/arm/mach-at91/board-cpu9krea.c | 5 +-
arch/arm/mach-at91/generic.h | 3 +
arch/arm/mach-at91/include/mach/at91_matrix.h | 23 ++++++
arch/arm/mach-at91/include/mach/at91rm9200.h | 2 -
arch/arm/mach-at91/include/mach/at91sam9260.h | 2 +-
.../mach-at91/include/mach/at91sam9260_matrix.h | 36 ++++----
arch/arm/mach-at91/include/mach/at91sam9261.h | 2 +-
.../mach-at91/include/mach/at91sam9261_matrix.h | 18 ++--
arch/arm/mach-at91/include/mach/at91sam9263.h | 2 +-
.../mach-at91/include/mach/at91sam9263_matrix.h | 74 +++++++++---------
arch/arm/mach-at91/include/mach/at91sam9g45.h | 2 +-
.../mach-at91/include/mach/at91sam9g45_matrix.h | 84 ++++++++++----------
arch/arm/mach-at91/include/mach/at91sam9rl.h | 2 +-
.../arm/mach-at91/include/mach/at91sam9rl_matrix.h | 42 +++++-----
arch/arm/mach-at91/setup.c | 9 ++
drivers/usb/gadget/at91_udc.c | 9 +-
26 files changed, 199 insertions(+), 154 deletions(-)
create mode 100644 arch/arm/mach-at91/include/mach/at91_matrix.h
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index e965332..5c15d14 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -327,6 +327,7 @@ static void __init at91sam9260_ioremap_registers(void)
at91_ioremap_rstc(AT91SAM9260_BASE_RSTC);
at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT);
at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
+ at91_ioremap_matrix(AT91SAM9260_BASE_MATRIX);
}
static void __init at91sam9260_initialize(void)
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 642ccb6..b93a337 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -21,6 +21,7 @@
#include <mach/cpu.h>
#include <mach/at91sam9260.h>
#include <mach/at91sam9260_matrix.h>
+#include <mach/at91_matrix.h>
#include <mach/at91sam9_smc.h>
#include "generic.h"
@@ -422,8 +423,8 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
if (!data)
return;
- csa = at91_sys_read(AT91_MATRIX_EBICSA);
- at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+ csa = at91_matrix_read(AT91_MATRIX_EBICSA);
+ at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
/* enable pin */
if (gpio_is_valid(data->enable_pin))
@@ -1265,7 +1266,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
if (!data)
return;
- csa = at91_sys_read(AT91_MATRIX_EBICSA);
+ csa = at91_matrix_read(AT91_MATRIX_EBICSA);
switch (data->chipselect) {
case 4:
@@ -1288,7 +1289,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
return;
}
- at91_sys_write(AT91_MATRIX_EBICSA, csa);
+ at91_matrix_write(AT91_MATRIX_EBICSA, csa);
if (gpio_is_valid(data->rst_pin)) {
at91_set_multi_drive(data->rst_pin, 0);
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index d7f51d6..50971e6 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -285,6 +285,7 @@ static void __init at91sam9261_ioremap_registers(void)
at91_ioremap_rstc(AT91SAM9261_BASE_RSTC);
at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT);
at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
+ at91_ioremap_matrix(AT91SAM9261_BASE_MATRIX);
}
static void __init at91sam9261_initialize(void)
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index fc59cbd..52c1f1a 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -24,6 +24,7 @@
#include <mach/board.h>
#include <mach/at91sam9261.h>
#include <mach/at91sam9261_matrix.h>
+#include <mach/at91_matrix.h>
#include <mach/at91sam9_smc.h>
#include "generic.h"
@@ -236,8 +237,8 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
if (!data)
return;
- csa = at91_sys_read(AT91_MATRIX_EBICSA);
- at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+ csa = at91_matrix_read(AT91_MATRIX_EBICSA);
+ at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
/* enable pin */
if (gpio_is_valid(data->enable_pin))
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 8bdba2a..5fd6fe8 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -306,6 +306,7 @@ static void __init at91sam9263_ioremap_registers(void)
at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT);
at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0);
at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
+ at91_ioremap_matrix(AT91SAM9263_BASE_MATRIX);
}
static void __init at91sam9263_initialize(void)
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 49aa6a9..545826b 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -23,6 +23,7 @@
#include <mach/board.h>
#include <mach/at91sam9263.h>
#include <mach/at91sam9263_matrix.h>
+#include <mach/at91_matrix.h>
#include <mach/at91sam9_smc.h>
#include "generic.h"
@@ -409,7 +410,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
* we assume SMC timings are configured by board code,
* except True IDE where timings are controlled by driver
*/
- ebi0_csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
+ ebi0_csa = at91_matrix_read(AT91_MATRIX_EBI0CSA);
switch (data->chipselect) {
case 4:
at91_set_A_periph(AT91_PIN_PD6, 0); /* EBI0_NCS4/CFCS0 */
@@ -428,7 +429,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
data->chipselect);
return;
}
- at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
+ at91_matrix_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
if (gpio_is_valid(data->det_pin)) {
at91_set_gpio_input(data->det_pin, 1);
@@ -496,8 +497,8 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
if (!data)
return;
- csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
- at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
+ csa = at91_matrix_read(AT91_MATRIX_EBI0CSA);
+ at91_matrix_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
/* enable pin */
if (gpio_is_valid(data->enable_pin))
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 5d2ff90..3726160 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -333,6 +333,7 @@ static void __init at91sam9g45_ioremap_registers(void)
at91_ioremap_rstc(AT91SAM9G45_BASE_RSTC);
at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT);
at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC);
+ at91_ioremap_matrix(AT91SAM9G45_BASE_MATRIX);
}
static void __init at91sam9g45_initialize(void)
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index bd4e68c..8c036ff 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -25,6 +25,7 @@
#include <mach/board.h>
#include <mach/at91sam9g45.h>
#include <mach/at91sam9g45_matrix.h>
+#include <mach/at91_matrix.h>
#include <mach/at91sam9_smc.h>
#include <mach/at_hdmac.h>
#include <mach/atmel-mci.h>
@@ -557,8 +558,8 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
if (!data)
return;
- csa = at91_sys_read(AT91_MATRIX_EBICSA);
- at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
+ csa = at91_matrix_read(AT91_MATRIX_EBICSA);
+ at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
/* enable pin */
if (gpio_is_valid(data->enable_pin))
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index e86c50b..d95ff97 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -290,6 +290,7 @@ static void __init at91sam9rl_ioremap_registers(void)
at91_ioremap_rstc(AT91SAM9RL_BASE_RSTC);
at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT);
at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
+ at91_ioremap_matrix(AT91SAM9RL_BASE_MATRIX);
}
static void __init at91sam9rl_initialize(void)
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 9be71c1..936cf20 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -20,6 +20,7 @@
#include <mach/board.h>
#include <mach/at91sam9rl.h>
#include <mach/at91sam9rl_matrix.h>
+#include <mach/at91_matrix.h>
#include <mach/at91sam9_smc.h>
#include <mach/at_hdmac.h>
@@ -265,8 +266,8 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
if (!data)
return;
- csa = at91_sys_read(AT91_MATRIX_EBICSA);
- at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+ csa = at91_matrix_read(AT91_MATRIX_EBICSA);
+ at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
/* enable pin */
if (gpio_is_valid(data->enable_pin))
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c
index 9ab3d1e..989e1c5 100644
--- a/arch/arm/mach-at91/board-cpu9krea.c
+++ b/arch/arm/mach-at91/board-cpu9krea.c
@@ -43,6 +43,7 @@
#include <mach/board.h>
#include <mach/at91sam9_smc.h>
#include <mach/at91sam9260_matrix.h>
+#include <mach/at91_matrix.h>
#include "sam9_smc.h"
#include "generic.h"
@@ -238,8 +239,8 @@ static __init void cpu9krea_add_device_nor(void)
{
unsigned long csa;
- csa = at91_sys_read(AT91_MATRIX_EBICSA);
- at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V);
+ csa = at91_matrix_read(AT91_MATRIX_EBICSA);
+ at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V);
/* configure chip-select 0 (NOR) */
sam9_smc_configure(0, 0, &cpu9krea_nor_smc_config);
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 4e322f34..dc74ec0 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -67,6 +67,9 @@ extern void at91sam9g45_restart(char, const char *);
/* shutdown */
extern void at91_ioremap_shdwc(u32 base_addr);
+/* Matrix */
+extern void at91_ioremap_matrix(u32 base_addr);
+
/* GPIO */
#define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */
#define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */
diff --git a/arch/arm/mach-at91/include/mach/at91_matrix.h b/arch/arm/mach-at91/include/mach/at91_matrix.h
new file mode 100644
index 0000000..02fae9d
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/at91_matrix.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Under GPLv2
+ */
+
+#ifndef __MACH_AT91_MATRIX_H__
+#define __MACH_AT91_MATRIX_H__
+
+#ifndef __ASSEMBLY__
+extern void __iomem *at91_matrix_base;
+
+#define at91_matrix_read(field) \
+ __raw_readl(at91_matrix_base + field)
+
+#define at91_matrix_write(field, value) \
+ __raw_writel(value, at91_matrix_base + field);
+
+#else
+.extern at91_matrix_base
+#endif
+
+#endif /* __MACH_AT91_MATRIX_H__ */
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h
index bacb511..fbde306 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200.h
@@ -95,8 +95,6 @@
#define AT91_USART2 AT91RM9200_BASE_US2
#define AT91_USART3 AT91RM9200_BASE_US3
-#define AT91_MATRIX 0 /* not supported */
-
/*
* Internal Memory.
*/
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index fa5ca27..2bde649 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -81,12 +81,12 @@
* System Peripherals (offset from AT91_BASE_SYS)
*/
#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
-#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
#define AT91SAM9260_BASE_ECC 0xffffe800
#define AT91SAM9260_BASE_SMC 0xffffec00
+#define AT91SAM9260_BASE_MATRIX 0xffffee00
#define AT91SAM9260_BASE_DBGU AT91_BASE_DBGU0
#define AT91SAM9260_BASE_PIOA 0xfffff400
#define AT91SAM9260_BASE_PIOB 0xfffff600
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
index 020f02e..f459df4 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
@@ -15,12 +15,12 @@
#ifndef AT91SAM9260_MATRIX_H
#define AT91SAM9260_MATRIX_H
-#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */
+#define AT91_MATRIX_MCFG0 0x00 /* Master Configuration Register 0 */
+#define AT91_MATRIX_MCFG1 0x04 /* Master Configuration Register 1 */
+#define AT91_MATRIX_MCFG2 0x08 /* Master Configuration Register 2 */
+#define AT91_MATRIX_MCFG3 0x0C /* Master Configuration Register 3 */
+#define AT91_MATRIX_MCFG4 0x10 /* Master Configuration Register 4 */
+#define AT91_MATRIX_MCFG5 0x14 /* Master Configuration Register 5 */
#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */
#define AT91_MATRIX_ULBT_INFINITE (0 << 0)
#define AT91_MATRIX_ULBT_SINGLE (1 << 0)
@@ -28,11 +28,11 @@
#define AT91_MATRIX_ULBT_EIGHT (3 << 0)
#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0)
-#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */
+#define AT91_MATRIX_SCFG0 0x40 /* Slave Configuration Register 0 */
+#define AT91_MATRIX_SCFG1 0x44 /* Slave Configuration Register 1 */
+#define AT91_MATRIX_SCFG2 0x48 /* Slave Configuration Register 2 */
+#define AT91_MATRIX_SCFG3 0x4C /* Slave Configuration Register 3 */
+#define AT91_MATRIX_SCFG4 0x50 /* Slave Configuration Register 4 */
#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */
#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
@@ -43,11 +43,11 @@
#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24)
#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
-#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */
+#define AT91_MATRIX_PRAS0 0x80 /* Priority Register A for Slave 0 */
+#define AT91_MATRIX_PRAS1 0x88 /* Priority Register A for Slave 1 */
+#define AT91_MATRIX_PRAS2 0x90 /* Priority Register A for Slave 2 */
+#define AT91_MATRIX_PRAS3 0x98 /* Priority Register A for Slave 3 */
+#define AT91_MATRIX_PRAS4 0xA0 /* Priority Register A for Slave 4 */
#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */
#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */
#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */
@@ -55,11 +55,11 @@
#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */
#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */
-#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */
+#define AT91_MATRIX_MRCR 0x100 /* Master Remap Control Register */
#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
-#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x11C) /* EBI Chip Select Assignment Register */
+#define AT91_MATRIX_EBICSA 0x11C /* EBI Chip Select Assignment Register */
#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */
#define AT91_MATRIX_CS1A_SMC (0 << 1)
#define AT91_MATRIX_CS1A_SDRAMC (1 << 1)
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
index 7cde2d3..6dcff27 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -66,11 +66,11 @@
* System Peripherals (offset from AT91_BASE_SYS)
*/
#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
-#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
#define AT91SAM9261_BASE_SMC 0xffffec00
+#define AT91SAM9261_BASE_MATRIX 0xffffee00
#define AT91SAM9261_BASE_DBGU AT91_BASE_DBGU0
#define AT91SAM9261_BASE_PIOA 0xfffff400
#define AT91SAM9261_BASE_PIOB 0xfffff600
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
index 69c6501..a50cdf8 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
@@ -15,15 +15,15 @@
#ifndef AT91SAM9261_MATRIX_H
#define AT91SAM9261_MATRIX_H
-#define AT91_MATRIX_MCFG (AT91_MATRIX + 0x00) /* Master Configuration Register */
+#define AT91_MATRIX_MCFG 0x00 /* Master Configuration Register */
#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
-#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x04) /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x08) /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x0C) /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x10) /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x14) /* Slave Configuration Register 4 */
+#define AT91_MATRIX_SCFG0 0x04 /* Slave Configuration Register 0 */
+#define AT91_MATRIX_SCFG1 0x08 /* Slave Configuration Register 1 */
+#define AT91_MATRIX_SCFG2 0x0C /* Slave Configuration Register 2 */
+#define AT91_MATRIX_SCFG3 0x10 /* Slave Configuration Register 3 */
+#define AT91_MATRIX_SCFG4 0x14 /* Slave Configuration Register 4 */
#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */
#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
@@ -31,7 +31,7 @@
#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */
-#define AT91_MATRIX_TCR (AT91_MATRIX + 0x24) /* TCM Configuration Register */
+#define AT91_MATRIX_TCR 0x24 /* TCM Configuration Register */
#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */
#define AT91_MATRIX_ITCM_0 (0 << 0)
#define AT91_MATRIX_ITCM_16 (5 << 0)
@@ -43,7 +43,7 @@
#define AT91_MATRIX_DTCM_32 (6 << 4)
#define AT91_MATRIX_DTCM_64 (7 << 4)
-#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x30) /* EBI Chip Select Assignment Register */
+#define AT91_MATRIX_EBICSA 0x30 /* EBI Chip Select Assignment Register */
#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */
#define AT91_MATRIX_CS1A_SMC (0 << 1)
#define AT91_MATRIX_CS1A_SDRAMC (1 << 1)
@@ -58,7 +58,7 @@
#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5)
#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
-#define AT91_MATRIX_USBPUCR (AT91_MATRIX + 0x34) /* USB Pad Pull-Up Control Register */
+#define AT91_MATRIX_USBPUCR 0x34 /* USB Pad Pull-Up Control Register */
#define AT91_MATRIX_USBPUCR_PUON (1 << 30) /* USB Device PAD Pull-up Enable */
#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
index 5949abd..fe73bfa 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -76,7 +76,6 @@
*/
#define AT91_SDRAMC0 (0xffffe200 - AT91_BASE_SYS)
#define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS)
-#define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS)
#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
@@ -84,6 +83,7 @@
#define AT91SAM9263_BASE_SMC0 0xffffe400
#define AT91SAM9263_BASE_ECC1 0xffffe600
#define AT91SAM9263_BASE_SMC1 0xffffea00
+#define AT91SAM9263_BASE_MATRIX 0xffffec00
#define AT91SAM9263_BASE_DBGU AT91_BASE_DBGU1
#define AT91SAM9263_BASE_PIOA 0xfffff200
#define AT91SAM9263_BASE_PIOB 0xfffff400
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h
index 9b3efd3..ebb5fdb 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h
@@ -15,15 +15,15 @@
#ifndef AT91SAM9263_MATRIX_H
#define AT91SAM9263_MATRIX_H
-#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */
-#define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */
-#define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */
-#define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */
+#define AT91_MATRIX_MCFG0 0x00 /* Master Configuration Register 0 */
+#define AT91_MATRIX_MCFG1 0x04 /* Master Configuration Register 1 */
+#define AT91_MATRIX_MCFG2 0x08 /* Master Configuration Register 2 */
+#define AT91_MATRIX_MCFG3 0x0C /* Master Configuration Register 3 */
+#define AT91_MATRIX_MCFG4 0x10 /* Master Configuration Register 4 */
+#define AT91_MATRIX_MCFG5 0x14 /* Master Configuration Register 5 */
+#define AT91_MATRIX_MCFG6 0x18 /* Master Configuration Register 6 */
+#define AT91_MATRIX_MCFG7 0x1C /* Master Configuration Register 7 */
+#define AT91_MATRIX_MCFG8 0x20 /* Master Configuration Register 8 */
#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */
#define AT91_MATRIX_ULBT_INFINITE (0 << 0)
#define AT91_MATRIX_ULBT_SINGLE (1 << 0)
@@ -31,14 +31,14 @@
#define AT91_MATRIX_ULBT_EIGHT (3 << 0)
#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0)
-#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */
-#define AT91_MATRIX_SCFG6 (AT91_MATRIX + 0x58) /* Slave Configuration Register 6 */
-#define AT91_MATRIX_SCFG7 (AT91_MATRIX + 0x5C) /* Slave Configuration Register 7 */
+#define AT91_MATRIX_SCFG0 0x40 /* Slave Configuration Register 0 */
+#define AT91_MATRIX_SCFG1 0x44 /* Slave Configuration Register 1 */
+#define AT91_MATRIX_SCFG2 0x48 /* Slave Configuration Register 2 */
+#define AT91_MATRIX_SCFG3 0x4C /* Slave Configuration Register 3 */
+#define AT91_MATRIX_SCFG4 0x50 /* Slave Configuration Register 4 */
+#define AT91_MATRIX_SCFG5 0x54 /* Slave Configuration Register 5 */
+#define AT91_MATRIX_SCFG6 0x58 /* Slave Configuration Register 6 */
+#define AT91_MATRIX_SCFG7 0x5C /* Slave Configuration Register 7 */
#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */
#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
@@ -49,22 +49,22 @@
#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24)
#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
-#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRBS0 (AT91_MATRIX + 0x84) /* Priority Register B for Slave 0 */
-#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRBS1 (AT91_MATRIX + 0x8C) /* Priority Register B for Slave 1 */
-#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRBS2 (AT91_MATRIX + 0x94) /* Priority Register B for Slave 2 */
-#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRBS3 (AT91_MATRIX + 0x9C) /* Priority Register B for Slave 3 */
-#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */
-#define AT91_MATRIX_PRBS4 (AT91_MATRIX + 0xA4) /* Priority Register B for Slave 4 */
-#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */
-#define AT91_MATRIX_PRBS5 (AT91_MATRIX + 0xAC) /* Priority Register B for Slave 5 */
-#define AT91_MATRIX_PRAS6 (AT91_MATRIX + 0xB0) /* Priority Register A for Slave 6 */
-#define AT91_MATRIX_PRBS6 (AT91_MATRIX + 0xB4) /* Priority Register B for Slave 6 */
-#define AT91_MATRIX_PRAS7 (AT91_MATRIX + 0xB8) /* Priority Register A for Slave 7 */
-#define AT91_MATRIX_PRBS7 (AT91_MATRIX + 0xBC) /* Priority Register B for Slave 7 */
+#define AT91_MATRIX_PRAS0 0x80 /* Priority Register A for Slave 0 */
+#define AT91_MATRIX_PRBS0 0x84 /* Priority Register B for Slave 0 */
+#define AT91_MATRIX_PRAS1 0x88 /* Priority Register A for Slave 1 */
+#define AT91_MATRIX_PRBS1 0x8C /* Priority Register B for Slave 1 */
+#define AT91_MATRIX_PRAS2 0x90 /* Priority Register A for Slave 2 */
+#define AT91_MATRIX_PRBS2 0x94 /* Priority Register B for Slave 2 */
+#define AT91_MATRIX_PRAS3 0x98 /* Priority Register A for Slave 3 */
+#define AT91_MATRIX_PRBS3 0x9C /* Priority Register B for Slave 3 */
+#define AT91_MATRIX_PRAS4 0xA0 /* Priority Register A for Slave 4 */
+#define AT91_MATRIX_PRBS4 0xA4 /* Priority Register B for Slave 4 */
+#define AT91_MATRIX_PRAS5 0xA8 /* Priority Register A for Slave 5 */
+#define AT91_MATRIX_PRBS5 0xAC /* Priority Register B for Slave 5 */
+#define AT91_MATRIX_PRAS6 0xB0 /* Priority Register A for Slave 6 */
+#define AT91_MATRIX_PRBS6 0xB4 /* Priority Register B for Slave 6 */
+#define AT91_MATRIX_PRAS7 0xB8 /* Priority Register A for Slave 7 */
+#define AT91_MATRIX_PRBS7 0xBC /* Priority Register B for Slave 7 */
#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */
#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */
#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */
@@ -75,7 +75,7 @@
#define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */
#define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */
-#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */
+#define AT91_MATRIX_MRCR 0x100 /* Master Remap Control Register */
#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
#define AT91_MATRIX_RCB2 (1 << 2)
@@ -86,7 +86,7 @@
#define AT91_MATRIX_RCB7 (1 << 7)
#define AT91_MATRIX_RCB8 (1 << 8)
-#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x114) /* TCM Configuration Register */
+#define AT91_MATRIX_TCMR 0x114 /* TCM Configuration Register */
#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */
#define AT91_MATRIX_ITCM_0 (0 << 0)
#define AT91_MATRIX_ITCM_16 (5 << 0)
@@ -96,7 +96,7 @@
#define AT91_MATRIX_DTCM_16 (5 << 4)
#define AT91_MATRIX_DTCM_32 (6 << 4)
-#define AT91_MATRIX_EBI0CSA (AT91_MATRIX + 0x120) /* EBI0 Chip Select Assignment Register */
+#define AT91_MATRIX_EBI0CSA 0x120 /* EBI0 Chip Select Assignment Register */
#define AT91_MATRIX_EBI0_CS1A (1 << 1) /* Chip Select 1 Assignment */
#define AT91_MATRIX_EBI0_CS1A_SMC (0 << 1)
#define AT91_MATRIX_EBI0_CS1A_SDRAMC (1 << 1)
@@ -114,7 +114,7 @@
#define AT91_MATRIX_EBI0_VDDIOMSEL_1_8V (0 << 16)
#define AT91_MATRIX_EBI0_VDDIOMSEL_3_3V (1 << 16)
-#define AT91_MATRIX_EBI1CSA (AT91_MATRIX + 0x124) /* EBI1 Chip Select Assignment Register */
+#define AT91_MATRIX_EBI1CSA 0x124 /* EBI1 Chip Select Assignment Register */
#define AT91_MATRIX_EBI1_CS1A (1 << 1) /* Chip Select 1 Assignment */
#define AT91_MATRIX_EBI1_CS1A_SMC (0 << 1)
#define AT91_MATRIX_EBI1_CS1A_SDRAMC (1 << 1)
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index dd9c95e..c8fe455 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -88,13 +88,13 @@
*/
#define AT91_DDRSDRC1 (0xffffe400 - AT91_BASE_SYS)
#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS)
-#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS)
#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
#define AT91SAM9G45_BASE_ECC 0xffffe200
#define AT91SAM9G45_BASE_DMA 0xffffec00
#define AT91SAM9G45_BASE_SMC 0xffffe800
+#define AT91SAM9G45_BASE_MATRIX 0xffffea00
#define AT91SAM9G45_BASE_DBGU AT91_BASE_DBGU1
#define AT91SAM9G45_BASE_PIOA 0xfffff200
#define AT91SAM9G45_BASE_PIOB 0xfffff400
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h
index c972d60..b76e2ed 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h
@@ -15,18 +15,18 @@
#ifndef AT91SAM9G45_MATRIX_H
#define AT91SAM9G45_MATRIX_H
-#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */
-#define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */
-#define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */
-#define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */
-#define AT91_MATRIX_MCFG9 (AT91_MATRIX + 0x24) /* Master Configuration Register 9 */
-#define AT91_MATRIX_MCFG10 (AT91_MATRIX + 0x28) /* Master Configuration Register 10 */
-#define AT91_MATRIX_MCFG11 (AT91_MATRIX + 0x2C) /* Master Configuration Register 11 */
+#define AT91_MATRIX_MCFG0 0x00 /* Master Configuration Register 0 */
+#define AT91_MATRIX_MCFG1 0x04 /* Master Configuration Register 1 */
+#define AT91_MATRIX_MCFG2 0x08 /* Master Configuration Register 2 */
+#define AT91_MATRIX_MCFG3 0x0C /* Master Configuration Register 3 */
+#define AT91_MATRIX_MCFG4 0x10 /* Master Configuration Register 4 */
+#define AT91_MATRIX_MCFG5 0x14 /* Master Configuration Register 5 */
+#define AT91_MATRIX_MCFG6 0x18 /* Master Configuration Register 6 */
+#define AT91_MATRIX_MCFG7 0x1C /* Master Configuration Register 7 */
+#define AT91_MATRIX_MCFG8 0x20 /* Master Configuration Register 8 */
+#define AT91_MATRIX_MCFG9 0x24 /* Master Configuration Register 9 */
+#define AT91_MATRIX_MCFG10 0x28 /* Master Configuration Register 10 */
+#define AT91_MATRIX_MCFG11 0x2C /* Master Configuration Register 11 */
#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */
#define AT91_MATRIX_ULBT_INFINITE (0 << 0)
#define AT91_MATRIX_ULBT_SINGLE (1 << 0)
@@ -37,14 +37,14 @@
#define AT91_MATRIX_ULBT_SIXTYFOUR (6 << 0)
#define AT91_MATRIX_ULBT_128 (7 << 0)
-#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */
-#define AT91_MATRIX_SCFG6 (AT91_MATRIX + 0x58) /* Slave Configuration Register 6 */
-#define AT91_MATRIX_SCFG7 (AT91_MATRIX + 0x5C) /* Slave Configuration Register 7 */
+#define AT91_MATRIX_SCFG0 0x40 /* Slave Configuration Register 0 */
+#define AT91_MATRIX_SCFG1 0x44 /* Slave Configuration Register 1 */
+#define AT91_MATRIX_SCFG2 0x48 /* Slave Configuration Register 2 */
+#define AT91_MATRIX_SCFG3 0x4C /* Slave Configuration Register 3 */
+#define AT91_MATRIX_SCFG4 0x50 /* Slave Configuration Register 4 */
+#define AT91_MATRIX_SCFG5 0x54 /* Slave Configuration Register 5 */
+#define AT91_MATRIX_SCFG6 0x58 /* Slave Configuration Register 6 */
+#define AT91_MATRIX_SCFG7 0x5C /* Slave Configuration Register 7 */
#define AT91_MATRIX_SLOT_CYCLE (0x1ff << 0) /* Maximum Number of Allowed Cycles for a Burst */
#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
@@ -52,22 +52,22 @@
#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */
-#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRBS0 (AT91_MATRIX + 0x84) /* Priority Register B for Slave 0 */
-#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRBS1 (AT91_MATRIX + 0x8C) /* Priority Register B for Slave 1 */
-#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRBS2 (AT91_MATRIX + 0x94) /* Priority Register B for Slave 2 */
-#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRBS3 (AT91_MATRIX + 0x9C) /* Priority Register B for Slave 3 */
-#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */
-#define AT91_MATRIX_PRBS4 (AT91_MATRIX + 0xA4) /* Priority Register B for Slave 4 */
-#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */
-#define AT91_MATRIX_PRBS5 (AT91_MATRIX + 0xAC) /* Priority Register B for Slave 5 */
-#define AT91_MATRIX_PRAS6 (AT91_MATRIX + 0xB0) /* Priority Register A for Slave 6 */
-#define AT91_MATRIX_PRBS6 (AT91_MATRIX + 0xB4) /* Priority Register B for Slave 6 */
-#define AT91_MATRIX_PRAS7 (AT91_MATRIX + 0xB8) /* Priority Register A for Slave 7 */
-#define AT91_MATRIX_PRBS7 (AT91_MATRIX + 0xBC) /* Priority Register B for Slave 7 */
+#define AT91_MATRIX_PRAS0 0x80 /* Priority Register A for Slave 0 */
+#define AT91_MATRIX_PRBS0 0x84 /* Priority Register B for Slave 0 */
+#define AT91_MATRIX_PRAS1 0x88 /* Priority Register A for Slave 1 */
+#define AT91_MATRIX_PRBS1 0x8C /* Priority Register B for Slave 1 */
+#define AT91_MATRIX_PRAS2 0x90 /* Priority Register A for Slave 2 */
+#define AT91_MATRIX_PRBS2 0x94 /* Priority Register B for Slave 2 */
+#define AT91_MATRIX_PRAS3 0x98 /* Priority Register A for Slave 3 */
+#define AT91_MATRIX_PRBS3 0x9C /* Priority Register B for Slave 3 */
+#define AT91_MATRIX_PRAS4 0xA0 /* Priority Register A for Slave 4 */
+#define AT91_MATRIX_PRBS4 0xA4 /* Priority Register B for Slave 4 */
+#define AT91_MATRIX_PRAS5 0xA8 /* Priority Register A for Slave 5 */
+#define AT91_MATRIX_PRBS5 0xAC /* Priority Register B for Slave 5 */
+#define AT91_MATRIX_PRAS6 0xB0 /* Priority Register A for Slave 6 */
+#define AT91_MATRIX_PRBS6 0xB4 /* Priority Register B for Slave 6 */
+#define AT91_MATRIX_PRAS7 0xB8 /* Priority Register A for Slave 7 */
+#define AT91_MATRIX_PRBS7 0xBC /* Priority Register B for Slave 7 */
#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */
#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */
#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */
@@ -81,7 +81,7 @@
#define AT91_MATRIX_M10PR (3 << 8) /* Master 10 Priority (in Register B) */
#define AT91_MATRIX_M11PR (3 << 12) /* Master 11 Priority (in Register B) */
-#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */
+#define AT91_MATRIX_MRCR 0x100 /* Master Remap Control Register */
#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
#define AT91_MATRIX_RCB2 (1 << 2)
@@ -95,7 +95,7 @@
#define AT91_MATRIX_RCB10 (1 << 10)
#define AT91_MATRIX_RCB11 (1 << 11)
-#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x110) /* TCM Configuration Register */
+#define AT91_MATRIX_TCMR 0x110 /* TCM Configuration Register */
#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */
#define AT91_MATRIX_ITCM_0 (0 << 0)
#define AT91_MATRIX_ITCM_32 (6 << 0)
@@ -107,12 +107,12 @@
#define AT91_MATRIX_TCM_NO_WS (0x0 << 11)
#define AT91_MATRIX_TCM_ONE_WS (0x1 << 11)
-#define AT91_MATRIX_VIDEO (AT91_MATRIX + 0x118) /* Video Mode Configuration Register */
+#define AT91_MATRIX_VIDEO 0x118 /* Video Mode Configuration Register */
#define AT91C_VDEC_SEL (0x1 << 0) /* Video Mode Selection */
#define AT91C_VDEC_SEL_OFF (0 << 0)
#define AT91C_VDEC_SEL_ON (1 << 0)
-#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x128) /* EBI Chip Select Assignment Register */
+#define AT91_MATRIX_EBICSA 0x128 /* EBI Chip Select Assignment Register */
#define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */
#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1)
#define AT91_MATRIX_EBI_CS1A_SDRAMC (1 << 1)
@@ -138,13 +138,13 @@
#define AT91_MATRIX_EBI_DDR_IOSR_REDUCED (0 << 18)
#define AT91_MATRIX_EBI_DDR_IOSR_NORMAL (1 << 18)
-#define AT91_MATRIX_WPMR (AT91_MATRIX + 0x1E4) /* Write Protect Mode Register */
+#define AT91_MATRIX_WPMR 0x1E4 /* Write Protect Mode Register */
#define AT91_MATRIX_WPMR_WPEN (1 << 0) /* Write Protect ENable */
#define AT91_MATRIX_WPMR_WP_WPDIS (0 << 0)
#define AT91_MATRIX_WPMR_WP_WPEN (1 << 0)
#define AT91_MATRIX_WPMR_WPKEY (0xFFFFFF << 8) /* Write Protect KEY */
-#define AT91_MATRIX_WPSR (AT91_MATRIX + 0x1E8) /* Write Protect Status Register */
+#define AT91_MATRIX_WPSR 0x1E8 /* Write Protect Status Register */
#define AT91_MATRIX_WPSR_WPVS (1 << 0) /* Write Protect Violation Status */
#define AT91_MATRIX_WPSR_NO_WPV (0 << 0)
#define AT91_MATRIX_WPSR_WPV (1 << 0)
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index d7bead7..51edc25 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -70,7 +70,6 @@
* System Peripherals (offset from AT91_BASE_SYS)
*/
#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
-#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS)
#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
@@ -78,6 +77,7 @@
#define AT91SAM9RL_BASE_DMA 0xffffe600
#define AT91SAM9RL_BASE_ECC 0xffffe800
#define AT91SAM9RL_BASE_SMC 0xffffec00
+#define AT91SAM9RL_BASE_MATRIX 0xffffee00
#define AT91SAM9RL_BASE_DBGU AT91_BASE_DBGU0
#define AT91SAM9RL_BASE_PIOA 0xfffff400
#define AT91SAM9RL_BASE_PIOB 0xfffff600
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h
index 5f91490..6d160ad 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h
@@ -14,12 +14,12 @@
#ifndef AT91SAM9RL_MATRIX_H
#define AT91SAM9RL_MATRIX_H
-#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */
+#define AT91_MATRIX_MCFG0 0x00 /* Master Configuration Register 0 */
+#define AT91_MATRIX_MCFG1 0x04 /* Master Configuration Register 1 */
+#define AT91_MATRIX_MCFG2 0x08 /* Master Configuration Register 2 */
+#define AT91_MATRIX_MCFG3 0x0C /* Master Configuration Register 3 */
+#define AT91_MATRIX_MCFG4 0x10 /* Master Configuration Register 4 */
+#define AT91_MATRIX_MCFG5 0x14 /* Master Configuration Register 5 */
#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */
#define AT91_MATRIX_ULBT_INFINITE (0 << 0)
#define AT91_MATRIX_ULBT_SINGLE (1 << 0)
@@ -27,12 +27,12 @@
#define AT91_MATRIX_ULBT_EIGHT (3 << 0)
#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0)
-#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */
+#define AT91_MATRIX_SCFG0 0x40 /* Slave Configuration Register 0 */
+#define AT91_MATRIX_SCFG1 0x44 /* Slave Configuration Register 1 */
+#define AT91_MATRIX_SCFG2 0x48 /* Slave Configuration Register 2 */
+#define AT91_MATRIX_SCFG3 0x4C /* Slave Configuration Register 3 */
+#define AT91_MATRIX_SCFG4 0x50 /* Slave Configuration Register 4 */
+#define AT91_MATRIX_SCFG5 0x54 /* Slave Configuration Register 5 */
#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */
#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
@@ -43,12 +43,12 @@
#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24)
#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
-#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */
-#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */
+#define AT91_MATRIX_PRAS0 0x80 /* Priority Register A for Slave 0 */
+#define AT91_MATRIX_PRAS1 0x88 /* Priority Register A for Slave 1 */
+#define AT91_MATRIX_PRAS2 0x90 /* Priority Register A for Slave 2 */
+#define AT91_MATRIX_PRAS3 0x98 /* Priority Register A for Slave 3 */
+#define AT91_MATRIX_PRAS4 0xA0 /* Priority Register A for Slave 4 */
+#define AT91_MATRIX_PRAS5 0xA8 /* Priority Register A for Slave 5 */
#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */
#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */
#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */
@@ -56,7 +56,7 @@
#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */
#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */
-#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */
+#define AT91_MATRIX_MRCR 0x100 /* Master Remap Control Register */
#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
#define AT91_MATRIX_RCB2 (1 << 2)
@@ -64,7 +64,7 @@
#define AT91_MATRIX_RCB4 (1 << 4)
#define AT91_MATRIX_RCB5 (1 << 5)
-#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x114) /* TCM Configuration Register */
+#define AT91_MATRIX_TCMR 0x114 /* TCM Configuration Register */
#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */
#define AT91_MATRIX_ITCM_0 (0 << 0)
#define AT91_MATRIX_ITCM_16 (5 << 0)
@@ -74,7 +74,7 @@
#define AT91_MATRIX_DTCM_16 (5 << 4)
#define AT91_MATRIX_DTCM_32 (6 << 4)
-#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI0 Chip Select Assignment Register */
+#define AT91_MATRIX_EBICSA 0x120 /* EBI0 Chip Select Assignment Register */
#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */
#define AT91_MATRIX_CS1A_SMC (0 << 1)
#define AT91_MATRIX_CS1A_SDRAMC (1 << 1)
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 620c67e..372396c 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -276,6 +276,15 @@ void __init at91_ioremap_rstc(u32 base_addr)
panic("Impossible to ioremap at91_rstc_base\n");
}
+void __iomem *at91_matrix_base;
+
+void __init at91_ioremap_matrix(u32 base_addr)
+{
+ at91_matrix_base = ioremap(base_addr, 512);
+ if (!at91_matrix_base)
+ panic("Impossible to ioremap at91_matrix_base\n");
+}
+
void __init at91_initialize(unsigned long main_clock)
{
at91_boot_soc.ioremap_registers();
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index 143a725..f99b3dc 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -41,6 +41,7 @@
#include <mach/board.h>
#include <mach/cpu.h>
#include <mach/at91sam9261_matrix.h>
+#include <mach/at91_matrix.h>
#include "at91_udc.h"
@@ -910,9 +911,9 @@ static void pullup(struct at91_udc *udc, int is_on)
} else if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) {
u32 usbpucr;
- usbpucr = at91_sys_read(AT91_MATRIX_USBPUCR);
+ usbpucr = at91_matrix_read(AT91_MATRIX_USBPUCR);
usbpucr |= AT91_MATRIX_USBPUCR_PUON;
- at91_sys_write(AT91_MATRIX_USBPUCR, usbpucr);
+ at91_matrix_write(AT91_MATRIX_USBPUCR, usbpucr);
}
} else {
stop_activity(udc);
@@ -928,9 +929,9 @@ static void pullup(struct at91_udc *udc, int is_on)
} else if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) {
u32 usbpucr;
- usbpucr = at91_sys_read(AT91_MATRIX_USBPUCR);
+ usbpucr = at91_matrix_read(AT91_MATRIX_USBPUCR);
usbpucr &= ~AT91_MATRIX_USBPUCR_PUON;
- at91_sys_write(AT91_MATRIX_USBPUCR, usbpucr);
+ at91_matrix_write(AT91_MATRIX_USBPUCR, usbpucr);
}
clk_off(udc);
}
--
1.7.9
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [PATCH 04/18] ARM: at91: make ST (System Timer) soc independent
2012-02-17 17:49 ` [PATCH 01/18] ARM: at91: factorise duplicated at91sam9 idle Nicolas Ferre
2012-02-17 17:49 ` [PATCH 02/18] ARM: at91/at91x40: remove use of at91_sys_read/write Nicolas Ferre
2012-02-17 17:49 ` [PATCH 03/18] ARM: at91: make matrix register base soc independent Nicolas Ferre
@ 2012-02-17 17:49 ` Nicolas Ferre
2012-02-20 0:22 ` Ryan Mallon
2012-02-17 17:49 ` [PATCH 05/18] ARM: at91/pm_slowclock: rename register to named define Nicolas Ferre
` (13 subsequent siblings)
16 siblings, 1 reply; 43+ messages in thread
From: Nicolas Ferre @ 2012-02-17 17:49 UTC (permalink / raw)
To: plagnioj, linux-arm-kernel; +Cc: linux-kernel
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
arch/arm/mach-at91/at91rm9200.c | 4 +-
arch/arm/mach-at91/at91rm9200_time.c | 37 ++++++++++++++++----------
arch/arm/mach-at91/generic.h | 1 +
arch/arm/mach-at91/include/mach/at91_st.h | 32 +++++++++++++++-------
arch/arm/mach-at91/include/mach/at91rm9200.h | 2 +-
drivers/watchdog/at91rm9200_wdt.c | 8 +++---
6 files changed, 53 insertions(+), 31 deletions(-)
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index dd6e2de..5a37d40 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -303,8 +303,8 @@ static void at91rm9200_restart(char mode, const char *cmd)
/*
* Perform a hardware reset with the use of the Watchdog timer.
*/
- at91_sys_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1);
- at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
+ at91_st_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1);
+ at91_st_write(AT91_ST_CR, AT91_ST_WDRST);
}
/* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index a028cdf..52d4b45 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -43,9 +43,9 @@ static inline unsigned long read_CRTR(void)
{
unsigned long x1, x2;
- x1 = at91_sys_read(AT91_ST_CRTR);
+ x1 = at91_st_read(AT91_ST_CRTR);
do {
- x2 = at91_sys_read(AT91_ST_CRTR);
+ x2 = at91_st_read(AT91_ST_CRTR);
if (x1 == x2)
break;
x1 = x2;
@@ -58,7 +58,7 @@ static inline unsigned long read_CRTR(void)
*/
static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
{
- u32 sr = at91_sys_read(AT91_ST_SR) & irqmask;
+ u32 sr = at91_st_read(AT91_ST_SR) & irqmask;
/*
* irqs should be disabled here, but as the irq is shared they are only
@@ -110,22 +110,22 @@ static void
clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
{
/* Disable and flush pending timer interrupts */
- at91_sys_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_ALMS);
- (void) at91_sys_read(AT91_ST_SR);
+ at91_st_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_ALMS);
+ (void) at91_st_read(AT91_ST_SR);
last_crtr = read_CRTR();
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
/* PIT for periodic irqs; fixed rate of 1/HZ */
irqmask = AT91_ST_PITS;
- at91_sys_write(AT91_ST_PIMR, RM9200_TIMER_LATCH);
+ at91_st_write(AT91_ST_PIMR, RM9200_TIMER_LATCH);
break;
case CLOCK_EVT_MODE_ONESHOT:
/* ALM for oneshot irqs, set by next_event()
* before 32 seconds have passed
*/
irqmask = AT91_ST_ALMS;
- at91_sys_write(AT91_ST_RTAR, last_crtr);
+ at91_st_write(AT91_ST_RTAR, last_crtr);
break;
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_UNUSED:
@@ -133,7 +133,7 @@ clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
irqmask = 0;
break;
}
- at91_sys_write(AT91_ST_IER, irqmask);
+ at91_st_write(AT91_ST_IER, irqmask);
}
static int
@@ -156,12 +156,12 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
alm = read_CRTR();
/* Cancel any pending alarm; flush any pending IRQ */
- at91_sys_write(AT91_ST_RTAR, alm);
- (void) at91_sys_read(AT91_ST_SR);
+ at91_st_write(AT91_ST_RTAR, alm);
+ (void) at91_st_read(AT91_ST_SR);
/* Schedule alarm by writing RTAR. */
alm += delta;
- at91_sys_write(AT91_ST_RTAR, alm);
+ at91_st_write(AT91_ST_RTAR, alm);
return status;
}
@@ -175,15 +175,24 @@ static struct clock_event_device clkevt = {
.set_mode = clkevt32k_mode,
};
+void __iomem *at91_st_base;
+
+void __init at91rm9200_ioremap_st(u32 addr)
+{
+ at91_st_base = ioremap(AT91RM9200_BASE_ST, 256);
+ if (!at91_st_base)
+ panic("Impossible to ioremap ST\n");
+}
+
/*
* ST (system timer) module supports both clockevents and clocksource.
*/
void __init at91rm9200_timer_init(void)
{
/* Disable all timer interrupts, and clear any pending ones */
- at91_sys_write(AT91_ST_IDR,
+ at91_st_write(AT91_ST_IDR,
AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS);
- (void) at91_sys_read(AT91_ST_SR);
+ (void) at91_st_read(AT91_ST_SR);
/* Make IRQs happen for the system timer */
setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq);
@@ -192,7 +201,7 @@ void __init at91rm9200_timer_init(void)
* directly for the clocksource and all clockevents, after adjusting
* its prescaler from the 1 Hz default.
*/
- at91_sys_write(AT91_ST_RTMR, 1);
+ at91_st_write(AT91_ST_RTMR, 1);
/* Setup timer clockevent, with minimum of two ticks (important!!) */
clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index dc74ec0..aec7fd0 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -28,6 +28,7 @@ extern void __init at91_aic_init(unsigned int priority[]);
/* Timer */
struct sys_timer;
+extern void at91rm9200_ioremap_st(u32 addr);
extern struct sys_timer at91rm9200_timer;
extern void at91sam926x_ioremap_pit(u32 addr);
extern struct sys_timer at91sam926x_timer;
diff --git a/arch/arm/mach-at91/include/mach/at91_st.h b/arch/arm/mach-at91/include/mach/at91_st.h
index 8847173..969aac2 100644
--- a/arch/arm/mach-at91/include/mach/at91_st.h
+++ b/arch/arm/mach-at91/include/mach/at91_st.h
@@ -16,34 +16,46 @@
#ifndef AT91_ST_H
#define AT91_ST_H
-#define AT91_ST_CR (AT91_ST + 0x00) /* Control Register */
+#ifndef __ASSEMBLY__
+extern void __iomem *at91_st_base;
+
+#define at91_st_read(field) \
+ __raw_readl(at91_st_base + field)
+
+#define at91_st_write(field, value) \
+ __raw_writel(value, at91_st_base + field);
+#else
+.extern at91_st_base
+#endif
+
+#define AT91_ST_CR 0x00 /* Control Register */
#define AT91_ST_WDRST (1 << 0) /* Watchdog Timer Restart */
-#define AT91_ST_PIMR (AT91_ST + 0x04) /* Period Interval Mode Register */
+#define AT91_ST_PIMR 0x04 /* Period Interval Mode Register */
#define AT91_ST_PIV (0xffff << 0) /* Period Interval Value */
-#define AT91_ST_WDMR (AT91_ST + 0x08) /* Watchdog Mode Register */
+#define AT91_ST_WDMR 0x08 /* Watchdog Mode Register */
#define AT91_ST_WDV (0xffff << 0) /* Watchdog Counter Value */
#define AT91_ST_RSTEN (1 << 16) /* Reset Enable */
#define AT91_ST_EXTEN (1 << 17) /* External Signal Assertion Enable */
-#define AT91_ST_RTMR (AT91_ST + 0x0c) /* Real-time Mode Register */
+#define AT91_ST_RTMR 0x0c /* Real-time Mode Register */
#define AT91_ST_RTPRES (0xffff << 0) /* Real-time Prescalar Value */
-#define AT91_ST_SR (AT91_ST + 0x10) /* Status Register */
+#define AT91_ST_SR 0x10 /* Status Register */
#define AT91_ST_PITS (1 << 0) /* Period Interval Timer Status */
#define AT91_ST_WDOVF (1 << 1) /* Watchdog Overflow */
#define AT91_ST_RTTINC (1 << 2) /* Real-time Timer Increment */
#define AT91_ST_ALMS (1 << 3) /* Alarm Status */
-#define AT91_ST_IER (AT91_ST + 0x14) /* Interrupt Enable Register */
-#define AT91_ST_IDR (AT91_ST + 0x18) /* Interrupt Disable Register */
-#define AT91_ST_IMR (AT91_ST + 0x1c) /* Interrupt Mask Register */
+#define AT91_ST_IER 0x14 /* Interrupt Enable Register */
+#define AT91_ST_IDR 0x18 /* Interrupt Disable Register */
+#define AT91_ST_IMR 0x1c /* Interrupt Mask Register */
-#define AT91_ST_RTAR (AT91_ST + 0x20) /* Real-time Alarm Register */
+#define AT91_ST_RTAR 0x20 /* Real-time Alarm Register */
#define AT91_ST_ALMV (0xfffff << 0) /* Alarm Value */
-#define AT91_ST_CRTR (AT91_ST + 0x24) /* Current Real-time Register */
+#define AT91_ST_CRTR 0x24 /* Current Real-time Register */
#define AT91_ST_CRTV (0xfffff << 0) /* Current Real-Time Value */
#endif
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h
index fbde306..0d0b9b3 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200.h
@@ -80,7 +80,6 @@
* System Peripherals (offset from AT91_BASE_SYS)
*/
#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */
-#define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */
#define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */
#define AT91RM9200_BASE_DBGU AT91_BASE_DBGU0 /* Debug Unit */
@@ -88,6 +87,7 @@
#define AT91RM9200_BASE_PIOB 0xfffff600 /* PIO Controller B */
#define AT91RM9200_BASE_PIOC 0xfffff800 /* PIO Controller C */
#define AT91RM9200_BASE_PIOD 0xfffffa00 /* PIO Controller D */
+#define AT91RM9200_BASE_ST 0xfffffd00 /* System Timer */
#define AT91RM9200_BASE_RTC 0xfffffe00 /* Real-Time Clock */
#define AT91_USART0 AT91RM9200_BASE_US0
diff --git a/drivers/watchdog/at91rm9200_wdt.c b/drivers/watchdog/at91rm9200_wdt.c
index b3046dc..7ceefd2 100644
--- a/drivers/watchdog/at91rm9200_wdt.c
+++ b/drivers/watchdog/at91rm9200_wdt.c
@@ -51,7 +51,7 @@ static unsigned long at91wdt_busy;
*/
static inline void at91_wdt_stop(void)
{
- at91_sys_write(AT91_ST_WDMR, AT91_ST_EXTEN);
+ at91_st_write(AT91_ST_WDMR, AT91_ST_EXTEN);
}
/*
@@ -59,9 +59,9 @@ static inline void at91_wdt_stop(void)
*/
static inline void at91_wdt_start(void)
{
- at91_sys_write(AT91_ST_WDMR, AT91_ST_EXTEN | AT91_ST_RSTEN |
+ at91_st_write(AT91_ST_WDMR, AT91_ST_EXTEN | AT91_ST_RSTEN |
(((65536 * wdt_time) >> 8) & AT91_ST_WDV));
- at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
+ at91_st_write(AT91_ST_CR, AT91_ST_WDRST);
}
/*
@@ -69,7 +69,7 @@ static inline void at91_wdt_start(void)
*/
static inline void at91_wdt_reload(void)
{
- at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
+ at91_st_write(AT91_ST_CR, AT91_ST_WDRST);
}
/* ......................................................................... */
--
1.7.9
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [PATCH 05/18] ARM: at91/pm_slowclock: rename register to named define
2012-02-17 17:49 ` [PATCH 01/18] ARM: at91: factorise duplicated at91sam9 idle Nicolas Ferre
` (2 preceding siblings ...)
2012-02-17 17:49 ` [PATCH 04/18] ARM: at91: make ST (System Timer) " Nicolas Ferre
@ 2012-02-17 17:49 ` Nicolas Ferre
2012-02-17 17:49 ` [PATCH 06/18] ARM: at91/pm_slowclock: function slow_clock() accepts parameters Nicolas Ferre
` (12 subsequent siblings)
16 siblings, 0 replies; 43+ messages in thread
From: Nicolas Ferre @ 2012-02-17 17:49 UTC (permalink / raw)
To: plagnioj, linux-arm-kernel; +Cc: linux-kernel
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch will give a name to ARM registers in the assembly
source code (using #defines). It is done to simplify the code
reading and the passing of parameters to functions.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
arch/arm/mach-at91/pm_slowclock.S | 177 +++++++++++++++++++------------------
1 files changed, 91 insertions(+), 86 deletions(-)
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index f8539a8..97124f5 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -46,17 +46,22 @@
#define PLLALOCK_TIMEOUT 1000
#define PLLBLOCK_TIMEOUT 1000
+#define pmc r1
+#define sdramc r2
+#define tmp1 r3
+#define tmp2 r4
+#define ramc1 r5
/*
* Wait until master clock is ready (after switching master clock source)
*/
.macro wait_mckrdy
- mov r4, #MCKRDY_TIMEOUT
-1: sub r4, r4, #1
- cmp r4, #0
+ mov tmp2, #MCKRDY_TIMEOUT
+1: sub tmp2, tmp2, #1
+ cmp tmp2, #0
beq 2f
- ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
- tst r3, #AT91_PMC_MCKRDY
+ ldr tmp1, [pmc, #(AT91_PMC_SR - AT91_PMC)]
+ tst tmp1, #AT91_PMC_MCKRDY
beq 1b
2:
.endm
@@ -65,12 +70,12 @@
* Wait until master oscillator has stabilized.
*/
.macro wait_moscrdy
- mov r4, #MOSCRDY_TIMEOUT
-1: sub r4, r4, #1
- cmp r4, #0
+ mov tmp2, #MOSCRDY_TIMEOUT
+1: sub tmp2, tmp2, #1
+ cmp tmp2, #0
beq 2f
- ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
- tst r3, #AT91_PMC_MOSCS
+ ldr tmp1, [pmc, #(AT91_PMC_SR - AT91_PMC)]
+ tst tmp1, #AT91_PMC_MOSCS
beq 1b
2:
.endm
@@ -79,12 +84,12 @@
* Wait until PLLA has locked.
*/
.macro wait_pllalock
- mov r4, #PLLALOCK_TIMEOUT
-1: sub r4, r4, #1
- cmp r4, #0
+ mov tmp2, #PLLALOCK_TIMEOUT
+1: sub tmp2, tmp2, #1
+ cmp tmp2, #0
beq 2f
- ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
- tst r3, #AT91_PMC_LOCKA
+ ldr tmp1, [pmc, #(AT91_PMC_SR - AT91_PMC)]
+ tst tmp1, #AT91_PMC_LOCKA
beq 1b
2:
.endm
@@ -93,12 +98,12 @@
* Wait until PLLB has locked.
*/
.macro wait_pllblock
- mov r4, #PLLBLOCK_TIMEOUT
-1: sub r4, r4, #1
- cmp r4, #0
+ mov tmp2, #PLLBLOCK_TIMEOUT
+1: sub tmp2, tmp2, #1
+ cmp tmp2, #0
beq 2f
- ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
- tst r3, #AT91_PMC_LOCKB
+ ldr tmp1, [pmc, #(AT91_PMC_SR - AT91_PMC)]
+ tst tmp1, #AT91_PMC_LOCKB
beq 1b
2:
.endm
@@ -117,55 +122,55 @@ ENTRY(at91_slow_clock)
* R4 = temporary register
* R5 = Base address of second RAM Controller or 0 if not present
*/
- ldr r1, .at91_va_base_pmc
- ldr r2, .at91_va_base_sdramc
- ldr r5, .at91_va_base_ramc1
+ ldr pmc, .at91_va_base_pmc
+ ldr sdramc, .at91_va_base_sdramc
+ ldr ramc1, .at91_va_base_ramc1
/* Drain write buffer */
- mov r0, #0
- mcr p15, 0, r0, c7, c10, 4
+ mov tmp1, #0
+ mcr p15, 0, tmp1, c7, c10, 4
#ifdef CONFIG_ARCH_AT91RM9200
/* Put SDRAM in self-refresh mode */
- mov r3, #1
- str r3, [r2, #AT91_SDRAMC_SRR]
+ mov tmp1, #1
+ str tmp1, [sdramc, #AT91_SDRAMC_SRR]
#elif defined(CONFIG_ARCH_AT91SAM9G45)
/* prepare for DDRAM self-refresh mode */
- ldr r3, [r2, #AT91_DDRSDRC_LPR]
- str r3, .saved_sam9_lpr
- bic r3, #AT91_DDRSDRC_LPCB
- orr r3, #AT91_DDRSDRC_LPCB_SELF_REFRESH
+ ldr tmp1, [sdramc, #AT91_DDRSDRC_LPR]
+ str tmp1, .saved_sam9_lpr
+ bic tmp1, #AT91_DDRSDRC_LPCB
+ orr tmp1, #AT91_DDRSDRC_LPCB_SELF_REFRESH
/* figure out if we use the second ram controller */
- cmp r5, #0
- ldrne r4, [r5, #AT91_DDRSDRC_LPR]
- strne r4, .saved_sam9_lpr1
- bicne r4, #AT91_DDRSDRC_LPCB
- orrne r4, #AT91_DDRSDRC_LPCB_SELF_REFRESH
+ cmp ramc1, #0
+ ldrne tmp2, [ramc1, #AT91_DDRSDRC_LPR]
+ strne tmp2, .saved_sam9_lpr1
+ bicne tmp2, #AT91_DDRSDRC_LPCB
+ orrne tmp2, #AT91_DDRSDRC_LPCB_SELF_REFRESH
/* Enable DDRAM self-refresh mode */
- str r3, [r2, #AT91_DDRSDRC_LPR]
- strne r4, [r5, #AT91_DDRSDRC_LPR]
+ str tmp1, [sdramc, #AT91_DDRSDRC_LPR]
+ strne tmp2, [ramc1, #AT91_DDRSDRC_LPR]
#else
/* Enable SDRAM self-refresh mode */
- ldr r3, [r2, #AT91_SDRAMC_LPR]
- str r3, .saved_sam9_lpr
+ ldr tmp1, [sdramc, #AT91_SDRAMC_LPR]
+ str tmp1, .saved_sam9_lpr
- bic r3, #AT91_SDRAMC_LPCB
- orr r3, #AT91_SDRAMC_LPCB_SELF_REFRESH
- str r3, [r2, #AT91_SDRAMC_LPR]
+ bic tmp1, #AT91_SDRAMC_LPCB
+ orr tmp1, #AT91_SDRAMC_LPCB_SELF_REFRESH
+ str tmp1, [sdramc, #AT91_SDRAMC_LPR]
#endif
/* Save Master clock setting */
- ldr r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
- str r3, .saved_mckr
+ ldr tmp1, [pmc, #(AT91_PMC_MCKR - AT91_PMC)]
+ str tmp1, .saved_mckr
/*
* Set the Master clock source to slow clock
*/
- bic r3, r3, #AT91_PMC_CSS
- str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
+ bic tmp1, tmp1, #AT91_PMC_CSS
+ str tmp1, [pmc, #(AT91_PMC_MCKR - AT91_PMC)]
wait_mckrdy
@@ -175,61 +180,61 @@ ENTRY(at91_slow_clock)
*
* See AT91RM9200 errata #27 and #28 for details.
*/
- mov r3, #0
- str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
+ mov tmp1, #0
+ str tmp1, [pmc, #(AT91_PMC_MCKR - AT91_PMC)]
wait_mckrdy
#endif
/* Save PLLA setting and disable it */
- ldr r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
- str r3, .saved_pllar
+ ldr tmp1, [pmc, #(AT91_CKGR_PLLAR - AT91_PMC)]
+ str tmp1, .saved_pllar
- mov r3, #AT91_PMC_PLLCOUNT
- orr r3, r3, #(1 << 29) /* bit 29 always set */
- str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
+ mov tmp1, #AT91_PMC_PLLCOUNT
+ orr tmp1, tmp1, #(1 << 29) /* bit 29 always set */
+ str tmp1, [pmc, #(AT91_CKGR_PLLAR - AT91_PMC)]
/* Save PLLB setting and disable it */
- ldr r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
- str r3, .saved_pllbr
+ ldr tmp1, [pmc, #(AT91_CKGR_PLLBR - AT91_PMC)]
+ str tmp1, .saved_pllbr
- mov r3, #AT91_PMC_PLLCOUNT
- str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
+ mov tmp1, #AT91_PMC_PLLCOUNT
+ str tmp1, [pmc, #(AT91_CKGR_PLLBR - AT91_PMC)]
/* Turn off the main oscillator */
- ldr r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
- bic r3, r3, #AT91_PMC_MOSCEN
- str r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
+ ldr tmp1, [pmc, #(AT91_CKGR_MOR - AT91_PMC)]
+ bic tmp1, tmp1, #AT91_PMC_MOSCEN
+ str tmp1, [pmc, #(AT91_CKGR_MOR - AT91_PMC)]
/* Wait for interrupt */
- mcr p15, 0, r0, c7, c0, 4
+ mcr p15, 0, tmp1, c7, c0, 4
/* Turn on the main oscillator */
- ldr r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
- orr r3, r3, #AT91_PMC_MOSCEN
- str r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
+ ldr tmp1, [pmc, #(AT91_CKGR_MOR - AT91_PMC)]
+ orr tmp1, tmp1, #AT91_PMC_MOSCEN
+ str tmp1, [pmc, #(AT91_CKGR_MOR - AT91_PMC)]
wait_moscrdy
/* Restore PLLB setting */
- ldr r3, .saved_pllbr
- str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
+ ldr tmp1, .saved_pllbr
+ str tmp1, [pmc, #(AT91_CKGR_PLLBR - AT91_PMC)]
- tst r3, #(AT91_PMC_MUL & 0xff0000)
+ tst tmp1, #(AT91_PMC_MUL & 0xff0000)
bne 1f
- tst r3, #(AT91_PMC_MUL & ~0xff0000)
+ tst tmp1, #(AT91_PMC_MUL & ~0xff0000)
beq 2f
1:
wait_pllblock
2:
/* Restore PLLA setting */
- ldr r3, .saved_pllar
- str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
+ ldr tmp1, .saved_pllar
+ str tmp1, [pmc, #(AT91_CKGR_PLLAR - AT91_PMC)]
- tst r3, #(AT91_PMC_MUL & 0xff0000)
+ tst tmp1, #(AT91_PMC_MUL & 0xff0000)
bne 3f
- tst r3, #(AT91_PMC_MUL & ~0xff0000)
+ tst tmp1, #(AT91_PMC_MUL & ~0xff0000)
beq 4f
3:
wait_pllalock
@@ -242,11 +247,11 @@ ENTRY(at91_slow_clock)
*
* See AT91RM9200 errata #27 and #28 for details.
*/
- ldr r3, .saved_mckr
- tst r3, #AT91_PMC_PRES
+ ldr tmp1, .saved_mckr
+ tst tmp1, #AT91_PMC_PRES
beq 2f
- and r3, r3, #AT91_PMC_PRES
- str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
+ and tmp1, tmp1, #AT91_PMC_PRES
+ str tmp1, [pmc, #(AT91_PMC_MCKR - AT91_PMC)]
wait_mckrdy
#endif
@@ -254,8 +259,8 @@ ENTRY(at91_slow_clock)
/*
* Restore master clock setting
*/
-2: ldr r3, .saved_mckr
- str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
+2: ldr tmp1, .saved_mckr
+ str tmp1, [pmc, #(AT91_PMC_MCKR - AT91_PMC)]
wait_mckrdy
@@ -263,18 +268,18 @@ ENTRY(at91_slow_clock)
/* Do nothing - self-refresh is automatically disabled. */
#elif defined(CONFIG_ARCH_AT91SAM9G45)
/* Restore LPR on AT91 with DDRAM */
- ldr r3, .saved_sam9_lpr
- str r3, [r2, #AT91_DDRSDRC_LPR]
+ ldr tmp1, .saved_sam9_lpr
+ str tmp1, [sdramc, #AT91_DDRSDRC_LPR]
/* if we use the second ram controller */
- cmp r5, #0
- ldrne r4, .saved_sam9_lpr1
- strne r4, [r5, #AT91_DDRSDRC_LPR]
+ cmp ramc1, #0
+ ldrne tmp2, .saved_sam9_lpr1
+ strne tmp2, [ramc1, #AT91_DDRSDRC_LPR]
#else
/* Restore LPR on AT91 with SDRAM */
- ldr r3, .saved_sam9_lpr
- str r3, [r2, #AT91_SDRAMC_LPR]
+ ldr tmp1, .saved_sam9_lpr
+ str tmp1, [sdramc, #AT91_SDRAMC_LPR]
#endif
/* Restore registers, and return */
--
1.7.9
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [PATCH 06/18] ARM: at91/pm_slowclock: function slow_clock() accepts parameters
2012-02-17 17:49 ` [PATCH 01/18] ARM: at91: factorise duplicated at91sam9 idle Nicolas Ferre
` (3 preceding siblings ...)
2012-02-17 17:49 ` [PATCH 05/18] ARM: at91/pm_slowclock: rename register to named define Nicolas Ferre
@ 2012-02-17 17:49 ` Nicolas Ferre
2012-02-17 17:49 ` [PATCH 07/18] ARM: at91: move at91rm9200 sdramc defines to at91rm9200_sdramc.h Nicolas Ferre
` (11 subsequent siblings)
16 siblings, 0 replies; 43+ messages in thread
From: Nicolas Ferre @ 2012-02-17 17:49 UTC (permalink / raw)
To: plagnioj, linux-arm-kernel; +Cc: linux-kernel
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Change slow_clock()/at91_slow_clock() prototype to accept the PMC
base address and one or two RAM controller addresses by parameters.
The r0, r1 and r2 registers are used differently and preserved during
function call.
Those values are defined in pm.c and slow_clock() function is called
from there with its new parameters.
This will allow to have a soc independent pm_slowclock.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Ached-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
arch/arm/mach-at91/pm.c | 20 +++++++++++++++--
arch/arm/mach-at91/pm_slowclock.S | 41 ++++++++----------------------------
2 files changed, 26 insertions(+), 35 deletions(-)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index d554e67..aac00ce 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -188,13 +188,27 @@ int at91_suspend_entering_slow_clock(void)
EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
-static void (*slow_clock)(void);
+static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0, void __iomem *ramc1);
#ifdef CONFIG_AT91_SLOW_CLOCK
-extern void at91_slow_clock(void);
+extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0, void __iomem *ramc1);
extern u32 at91_slow_clock_sz;
#endif
+static void __iomem *at91_pmc_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_PMC);
+#ifdef CONFIG_ARCH_AT91RM9200
+static void __iomem *at91_ramc0_base = (void __iomem*)AT91_VA_BASE_SYS;
+#elif defined(CONFIG_ARCH_AT91SAM9G45)
+static void __iomem *at91_ramc0_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_DDRSDRC0);
+#else
+static void __iomem *at91_ramc0_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_SDRAMC0);
+#endif
+
+#if defined(CONFIG_ARCH_AT91SAM9G45)
+static void __iomem *at91_ramc1_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_DDRSDRC1);
+#else
+static void __iomem *at91_ramc1_base = NULL;
+#endif
static int at91_pm_enter(suspend_state_t state)
{
@@ -232,7 +246,7 @@ static int at91_pm_enter(suspend_state_t state)
/* copy slow_clock handler to SRAM, and call it */
memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz);
#endif
- slow_clock();
+ slow_clock(at91_pmc_base, at91_ramc0_base, at91_ramc1_base);
break;
} else {
pr_info("AT91: PM - no slow clock mode enabled ...\n");
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 97124f5..33fc4a7 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -46,11 +46,11 @@
#define PLLALOCK_TIMEOUT 1000
#define PLLBLOCK_TIMEOUT 1000
-#define pmc r1
-#define sdramc r2
+#define pmc r0
+#define sdramc r1
+#define ramc1 r2
#define tmp1 r3
#define tmp2 r4
-#define ramc1 r5
/*
* Wait until master clock is ready (after switching master clock source)
@@ -110,21 +110,19 @@
.text
+/* void at91_slow_clock(void __iomem *pmc, void __iomem *sdramc, void __iomem *ramc1) */
ENTRY(at91_slow_clock)
/* Save registers on stack */
- stmfd sp!, {r0 - r12, lr}
+ stmfd sp!, {r3 - r12, lr}
/*
* Register usage:
- * R1 = Base address of AT91_PMC
- * R2 = Base address of RAM Controller (SDRAM, DDRSDR, or AT91_SYS)
+ * R0 = Base address of AT91_PMC
+ * R1 = Base address of RAM Controller (SDRAM, DDRSDR, or AT91_SYS)
+ * R2 = Base address of second RAM Controller or 0 if not present
* R3 = temporary register
* R4 = temporary register
- * R5 = Base address of second RAM Controller or 0 if not present
*/
- ldr pmc, .at91_va_base_pmc
- ldr sdramc, .at91_va_base_sdramc
- ldr ramc1, .at91_va_base_ramc1
/* Drain write buffer */
mov tmp1, #0
@@ -283,7 +281,7 @@ ENTRY(at91_slow_clock)
#endif
/* Restore registers, and return */
- ldmfd sp!, {r0 - r12, pc}
+ ldmfd sp!, {r3 - r12, pc}
.saved_mckr:
@@ -301,26 +299,5 @@ ENTRY(at91_slow_clock)
.saved_sam9_lpr1:
.word 0
-.at91_va_base_pmc:
- .word AT91_VA_BASE_SYS + AT91_PMC
-
-#ifdef CONFIG_ARCH_AT91RM9200
-.at91_va_base_sdramc:
- .word AT91_VA_BASE_SYS
-#elif defined(CONFIG_ARCH_AT91SAM9G45)
-.at91_va_base_sdramc:
- .word AT91_VA_BASE_SYS + AT91_DDRSDRC0
-#else
-.at91_va_base_sdramc:
- .word AT91_VA_BASE_SYS + AT91_SDRAMC0
-#endif
-
-.at91_va_base_ramc1:
-#if defined(CONFIG_ARCH_AT91SAM9G45)
- .word AT91_VA_BASE_SYS + AT91_DDRSDRC1
-#else
- .word 0
-#endif
-
ENTRY(at91_slow_clock_sz)
.word .-at91_slow_clock
--
1.7.9
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [PATCH 07/18] ARM: at91: move at91rm9200 sdramc defines to at91rm9200_sdramc.h
2012-02-17 17:49 ` [PATCH 01/18] ARM: at91: factorise duplicated at91sam9 idle Nicolas Ferre
` (4 preceding siblings ...)
2012-02-17 17:49 ` [PATCH 06/18] ARM: at91/pm_slowclock: function slow_clock() accepts parameters Nicolas Ferre
@ 2012-02-17 17:49 ` Nicolas Ferre
2012-02-17 17:50 ` [PATCH 08/18] ARM: at91: make sdram/ddr register base soc independent Nicolas Ferre
` (10 subsequent siblings)
16 siblings, 0 replies; 43+ messages in thread
From: Nicolas Ferre @ 2012-02-17 17:49 UTC (permalink / raw)
To: plagnioj, linux-arm-kernel; +Cc: linux-kernel
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This cleanup is done to allow to have multiple SoC in the same image.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
arch/arm/mach-at91/include/mach/at91rm9200_mc.h | 44 --------------
.../arm/mach-at91/include/mach/at91rm9200_sdramc.h | 63 ++++++++++++++++++++
arch/arm/mach-at91/pm.c | 2 +-
arch/arm/mach-at91/pm.h | 7 +-
arch/arm/mach-at91/pm_slowclock.S | 3 +-
5 files changed, 70 insertions(+), 49 deletions(-)
create mode 100644 arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200_mc.h b/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
index d34e4ed..0eb031b 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
@@ -87,50 +87,6 @@
#define AT91_SMC_RWHOLD (7 << 28) /* Read & Write Signal Hold Time */
#define AT91_SMC_RWHOLD_(x) ((x) << 28)
-/* SDRAM Controller registers */
-#define AT91_SDRAMC_MR (AT91_MC + 0x90) /* Mode Register */
-#define AT91_SDRAMC_MODE (0xf << 0) /* Command Mode */
-#define AT91_SDRAMC_MODE_NORMAL (0 << 0)
-#define AT91_SDRAMC_MODE_NOP (1 << 0)
-#define AT91_SDRAMC_MODE_PRECHARGE (2 << 0)
-#define AT91_SDRAMC_MODE_LMR (3 << 0)
-#define AT91_SDRAMC_MODE_REFRESH (4 << 0)
-#define AT91_SDRAMC_DBW (1 << 4) /* Data Bus Width */
-#define AT91_SDRAMC_DBW_32 (0 << 4)
-#define AT91_SDRAMC_DBW_16 (1 << 4)
-
-#define AT91_SDRAMC_TR (AT91_MC + 0x94) /* Refresh Timer Register */
-#define AT91_SDRAMC_COUNT (0xfff << 0) /* Refresh Timer Count */
-
-#define AT91_SDRAMC_CR (AT91_MC + 0x98) /* Configuration Register */
-#define AT91_SDRAMC_NC (3 << 0) /* Number of Column Bits */
-#define AT91_SDRAMC_NC_8 (0 << 0)
-#define AT91_SDRAMC_NC_9 (1 << 0)
-#define AT91_SDRAMC_NC_10 (2 << 0)
-#define AT91_SDRAMC_NC_11 (3 << 0)
-#define AT91_SDRAMC_NR (3 << 2) /* Number of Row Bits */
-#define AT91_SDRAMC_NR_11 (0 << 2)
-#define AT91_SDRAMC_NR_12 (1 << 2)
-#define AT91_SDRAMC_NR_13 (2 << 2)
-#define AT91_SDRAMC_NB (1 << 4) /* Number of Banks */
-#define AT91_SDRAMC_NB_2 (0 << 4)
-#define AT91_SDRAMC_NB_4 (1 << 4)
-#define AT91_SDRAMC_CAS (3 << 5) /* CAS Latency */
-#define AT91_SDRAMC_CAS_2 (2 << 5)
-#define AT91_SDRAMC_TWR (0xf << 7) /* Write Recovery Delay */
-#define AT91_SDRAMC_TRC (0xf << 11) /* Row Cycle Delay */
-#define AT91_SDRAMC_TRP (0xf << 15) /* Row Precharge Delay */
-#define AT91_SDRAMC_TRCD (0xf << 19) /* Row to Column Delay */
-#define AT91_SDRAMC_TRAS (0xf << 23) /* Active to Precharge Delay */
-#define AT91_SDRAMC_TXSR (0xf << 27) /* Exit Self Refresh to Active Delay */
-
-#define AT91_SDRAMC_SRR (AT91_MC + 0x9c) /* Self Refresh Register */
-#define AT91_SDRAMC_LPR (AT91_MC + 0xa0) /* Low Power Register */
-#define AT91_SDRAMC_IER (AT91_MC + 0xa4) /* Interrupt Enable Register */
-#define AT91_SDRAMC_IDR (AT91_MC + 0xa8) /* Interrupt Disable Register */
-#define AT91_SDRAMC_IMR (AT91_MC + 0xac) /* Interrupt Mask Register */
-#define AT91_SDRAMC_ISR (AT91_MC + 0xb0) /* Interrupt Status Register */
-
/* Burst Flash Controller register */
#define AT91_BFC_MR (AT91_MC + 0xc0) /* Mode Register */
#define AT91_BFC_BFCOM (3 << 0) /* Burst Flash Controller Operating Mode */
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h b/arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h
new file mode 100644
index 0000000..7ad3597
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h
@@ -0,0 +1,63 @@
+/*
+ * arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h
+ *
+ * Copyright (C) 2005 Ivan Kokshaysky
+ * Copyright (C) SAN People
+ *
+ * Memory Controllers (SDRAMC only) - System peripherals registers.
+ * Based on AT91RM9200 datasheet revision E.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef AT91RM9200_SDRAMC_H
+#define AT91RM9200_SDRAMC_H
+
+/* SDRAM Controller registers */
+#define AT91RM9200_SDRAMC_MR (AT91_MC + 0x90) /* Mode Register */
+#define AT91RM9200_SDRAMC_MODE (0xf << 0) /* Command Mode */
+#define AT91RM9200_SDRAMC_MODE_NORMAL (0 << 0)
+#define AT91RM9200_SDRAMC_MODE_NOP (1 << 0)
+#define AT91RM9200_SDRAMC_MODE_PRECHARGE (2 << 0)
+#define AT91RM9200_SDRAMC_MODE_LMR (3 << 0)
+#define AT91RM9200_SDRAMC_MODE_REFRESH (4 << 0)
+#define AT91RM9200_SDRAMC_DBW (1 << 4) /* Data Bus Width */
+#define AT91RM9200_SDRAMC_DBW_32 (0 << 4)
+#define AT91RM9200_SDRAMC_DBW_16 (1 << 4)
+
+#define AT91RM9200_SDRAMC_TR (AT91_MC + 0x94) /* Refresh Timer Register */
+#define AT91RM9200_SDRAMC_COUNT (0xfff << 0) /* Refresh Timer Count */
+
+#define AT91RM9200_SDRAMC_CR (AT91_MC + 0x98) /* Configuration Register */
+#define AT91RM9200_SDRAMC_NC (3 << 0) /* Number of Column Bits */
+#define AT91RM9200_SDRAMC_NC_8 (0 << 0)
+#define AT91RM9200_SDRAMC_NC_9 (1 << 0)
+#define AT91RM9200_SDRAMC_NC_10 (2 << 0)
+#define AT91RM9200_SDRAMC_NC_11 (3 << 0)
+#define AT91RM9200_SDRAMC_NR (3 << 2) /* Number of Row Bits */
+#define AT91RM9200_SDRAMC_NR_11 (0 << 2)
+#define AT91RM9200_SDRAMC_NR_12 (1 << 2)
+#define AT91RM9200_SDRAMC_NR_13 (2 << 2)
+#define AT91RM9200_SDRAMC_NB (1 << 4) /* Number of Banks */
+#define AT91RM9200_SDRAMC_NB_2 (0 << 4)
+#define AT91RM9200_SDRAMC_NB_4 (1 << 4)
+#define AT91RM9200_SDRAMC_CAS (3 << 5) /* CAS Latency */
+#define AT91RM9200_SDRAMC_CAS_2 (2 << 5)
+#define AT91RM9200_SDRAMC_TWR (0xf << 7) /* Write Recovery Delay */
+#define AT91RM9200_SDRAMC_TRC (0xf << 11) /* Row Cycle Delay */
+#define AT91RM9200_SDRAMC_TRP (0xf << 15) /* Row Precharge Delay */
+#define AT91RM9200_SDRAMC_TRCD (0xf << 19) /* Row to Column Delay */
+#define AT91RM9200_SDRAMC_TRAS (0xf << 23) /* Active to Precharge Delay */
+#define AT91RM9200_SDRAMC_TXSR (0xf << 27) /* Exit Self Refresh to Active Delay */
+
+#define AT91RM9200_SDRAMC_SRR (AT91_MC + 0x9c) /* Self Refresh Register */
+#define AT91RM9200_SDRAMC_LPR (AT91_MC + 0xa0) /* Low Power Register */
+#define AT91RM9200_SDRAMC_IER (AT91_MC + 0xa4) /* Interrupt Enable Register */
+#define AT91RM9200_SDRAMC_IDR (AT91_MC + 0xa8) /* Interrupt Disable Register */
+#define AT91RM9200_SDRAMC_IMR (AT91_MC + 0xac) /* Interrupt Mask Register */
+#define AT91RM9200_SDRAMC_ISR (AT91_MC + 0xb0) /* Interrupt Status Register */
+
+#endif
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index aac00ce..8046a50 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -315,7 +315,7 @@ static int __init at91_pm_init(void)
#ifdef CONFIG_ARCH_AT91RM9200
/* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
- at91_sys_write(AT91_SDRAMC_LPR, 0);
+ at91_sys_write(AT91RM9200_SDRAMC_LPR, 0);
#endif
suspend_set_ops(&at91_pm_ops);
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index bba9ce1..41cdd2b 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -13,6 +13,7 @@
#ifdef CONFIG_ARCH_AT91RM9200
#include <mach/at91rm9200_mc.h>
+#include <mach/at91rm9200_sdramc.h>
/*
* The AT91RM9200 goes into self-refresh mode with this command, and will
@@ -26,7 +27,7 @@
static inline void at91rm9200_standby(void)
{
- u32 lpr = at91_sys_read(AT91_SDRAMC_LPR);
+ u32 lpr = at91_sys_read(AT91RM9200_SDRAMC_LPR);
asm volatile(
"b 1f\n\t"
@@ -37,8 +38,8 @@ static inline void at91rm9200_standby(void)
" mcr p15, 0, %0, c7, c0, 4\n\t"
" str %5, [%1, %2]"
:
- : "r" (0), "r" (AT91_BASE_SYS), "r" (AT91_SDRAMC_LPR),
- "r" (1), "r" (AT91_SDRAMC_SRR),
+ : "r" (0), "r" (AT91_BASE_SYS), "r" (AT91RM9200_SDRAMC_LPR),
+ "r" (1), "r" (AT91RM9200_SDRAMC_SRR),
"r" (lpr));
}
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 33fc4a7..c2cc7d4 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -18,6 +18,7 @@
#if defined(CONFIG_ARCH_AT91RM9200)
#include <mach/at91rm9200_mc.h>
+#include <mach/at91rm9200_sdramc.h>
#elif defined(CONFIG_ARCH_AT91SAM9G45)
#include <mach/at91sam9_ddrsdr.h>
#else
@@ -131,7 +132,7 @@ ENTRY(at91_slow_clock)
#ifdef CONFIG_ARCH_AT91RM9200
/* Put SDRAM in self-refresh mode */
mov tmp1, #1
- str tmp1, [sdramc, #AT91_SDRAMC_SRR]
+ str tmp1, [sdramc, #AT91RM9200_SDRAMC_SRR]
#elif defined(CONFIG_ARCH_AT91SAM9G45)
/* prepare for DDRAM self-refresh mode */
--
1.7.9
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [PATCH 08/18] ARM: at91: make sdram/ddr register base soc independent
2012-02-17 17:49 ` [PATCH 01/18] ARM: at91: factorise duplicated at91sam9 idle Nicolas Ferre
` (5 preceding siblings ...)
2012-02-17 17:49 ` [PATCH 07/18] ARM: at91: move at91rm9200 sdramc defines to at91rm9200_sdramc.h Nicolas Ferre
@ 2012-02-17 17:50 ` Nicolas Ferre
2012-02-17 17:50 ` [PATCH 09/18] ARM: at91/pm_slowclock: add runtime detection of memory contoller Nicolas Ferre
` (9 subsequent siblings)
16 siblings, 0 replies; 43+ messages in thread
From: Nicolas Ferre @ 2012-02-17 17:50 UTC (permalink / raw)
To: plagnioj, linux-arm-kernel; +Cc: linux-kernel
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
arch/arm/mach-at91/at91rm9200.c | 1 +
arch/arm/mach-at91/at91rm9200_devices.c | 13 ++++----
arch/arm/mach-at91/at91sam9260.c | 1 +
arch/arm/mach-at91/at91sam9261.c | 1 +
arch/arm/mach-at91/at91sam9263.c | 2 +
arch/arm/mach-at91/at91sam9_alt_reset.S | 12 +++----
arch/arm/mach-at91/at91sam9g45.c | 2 +
arch/arm/mach-at91/at91sam9g45_reset.S | 12 +++----
arch/arm/mach-at91/at91sam9rl.c | 1 +
arch/arm/mach-at91/at91sam9x5.c | 1 +
arch/arm/mach-at91/board-cpuat91.c | 1 +
arch/arm/mach-at91/board-eco920.c | 5 ++-
arch/arm/mach-at91/board-kb9202.c | 1 +
arch/arm/mach-at91/board-picotux200.c | 1 +
arch/arm/mach-at91/board-rm9200dk.c | 1 +
arch/arm/mach-at91/board-rm9200ek.c | 1 +
arch/arm/mach-at91/board-yl-9200.c | 3 +-
arch/arm/mach-at91/generic.h | 3 ++
arch/arm/mach-at91/include/mach/at91_ramc.h | 31 ++++++++++++++++++++
arch/arm/mach-at91/include/mach/at91rm9200.h | 2 +-
arch/arm/mach-at91/include/mach/at91rm9200_mc.h | 14 ++++----
.../arm/mach-at91/include/mach/at91rm9200_sdramc.h | 18 ++++++------
arch/arm/mach-at91/include/mach/at91sam9260.h | 2 +-
arch/arm/mach-at91/include/mach/at91sam9261.h | 2 +-
arch/arm/mach-at91/include/mach/at91sam9263.h | 4 +-
arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h | 6 ----
arch/arm/mach-at91/include/mach/at91sam9_sdramc.h | 6 ----
arch/arm/mach-at91/include/mach/at91sam9g45.h | 4 +-
arch/arm/mach-at91/include/mach/at91sam9rl.h | 2 +-
arch/arm/mach-at91/include/mach/at91sam9x5.h | 2 +-
arch/arm/mach-at91/pm.c | 27 ++++++++---------
arch/arm/mach-at91/pm.h | 6 +--
arch/arm/mach-at91/pm_slowclock.S | 10 +------
drivers/pcmcia/at91_cf.c | 5 ++-
34 files changed, 114 insertions(+), 89 deletions(-)
create mode 100644 arch/arm/mach-at91/include/mach/at91_ramc.h
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 5a37d40..94141b2 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -319,6 +319,7 @@ static void __init at91rm9200_map_io(void)
static void __init at91rm9200_ioremap_registers(void)
{
+ at91_ioremap_ramc(0, AT91RM9200_BASE_MC, 256);
}
static void __init at91rm9200_initialize(void)
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 18bacec..aca272b 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -21,6 +21,7 @@
#include <mach/board.h>
#include <mach/at91rm9200.h>
#include <mach/at91rm9200_mc.h>
+#include <mach/at91_ramc.h>
#include "generic.h"
@@ -241,15 +242,15 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
data->chipselect = 4; /* can only use EBI ChipSelect 4 */
/* CF takes over CS4, CS5, CS6 */
- csa = at91_sys_read(AT91_EBI_CSA);
- at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);
+ csa = at91_ramc_read(0, AT91_EBI_CSA);
+ at91_ramc_write(0, AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);
/*
* Static memory controller timing adjustments.
* REVISIT: these timings are in terms of MCK cycles, so
* when MCK changes (cpufreq etc) so must these values...
*/
- at91_sys_write(AT91_SMC_CSR(4),
+ at91_ramc_write(0, AT91_SMC_CSR(4),
AT91_SMC_ACSS_STD
| AT91_SMC_DBW_16
| AT91_SMC_BAT
@@ -407,11 +408,11 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
return;
/* enable the address range of CS3 */
- csa = at91_sys_read(AT91_EBI_CSA);
- at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
+ csa = at91_ramc_read(0, AT91_EBI_CSA);
+ at91_ramc_write(0, AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
/* set the bus interface characteristics */
- at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
+ at91_ramc_write(0, AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
| AT91_SMC_NWS_(5)
| AT91_SMC_TDF_(1)
| AT91_SMC_RWSETUP_(0) /* tDS Data Set up Time 30 - ns */
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 5c15d14..14882ae 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -325,6 +325,7 @@ static void __init at91sam9260_ioremap_registers(void)
{
at91_ioremap_shdwc(AT91SAM9260_BASE_SHDWC);
at91_ioremap_rstc(AT91SAM9260_BASE_RSTC);
+ at91_ioremap_ramc(0, AT91SAM9260_BASE_SDRAMC, 512);
at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT);
at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
at91_ioremap_matrix(AT91SAM9260_BASE_MATRIX);
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 50971e6..684c5df 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -283,6 +283,7 @@ static void __init at91sam9261_ioremap_registers(void)
{
at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC);
at91_ioremap_rstc(AT91SAM9261_BASE_RSTC);
+ at91_ioremap_ramc(0, AT91SAM9261_BASE_SDRAMC, 512);
at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT);
at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
at91_ioremap_matrix(AT91SAM9261_BASE_MATRIX);
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 5fd6fe8..0b4fa5a 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -303,6 +303,8 @@ static void __init at91sam9263_ioremap_registers(void)
{
at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC);
at91_ioremap_rstc(AT91SAM9263_BASE_RSTC);
+ at91_ioremap_ramc(0, AT91SAM9263_BASE_SDRAMC0, 512);
+ at91_ioremap_ramc(1, AT91SAM9263_BASE_SDRAMC1, 512);
at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT);
at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0);
at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
diff --git a/arch/arm/mach-at91/at91sam9_alt_reset.S b/arch/arm/mach-at91/at91sam9_alt_reset.S
index 518e423..7af2e10 100644
--- a/arch/arm/mach-at91/at91sam9_alt_reset.S
+++ b/arch/arm/mach-at91/at91sam9_alt_reset.S
@@ -15,16 +15,17 @@
#include <linux/linkage.h>
#include <mach/hardware.h>
-#include <mach/at91sam9_sdramc.h>
+#include <mach/at91_ramc.h>
#include <mach/at91_rstc.h>
.arm
.globl at91sam9_alt_restart
-at91sam9_alt_restart: ldr r0, .at91_va_base_sdramc @ preload constants
- ldr r1, =at91_rstc_base
- ldr r1, [r1]
+at91sam9_alt_restart: ldr r0, =at91_ramc_base @ preload constants
+ ldr r0, [r0]
+ ldr r4, =at91_rstc_base
+ ldr r1, [r4]
mov r2, #1
mov r3, #AT91_SDRAMC_LPCB_POWER_DOWN
@@ -37,6 +38,3 @@ at91sam9_alt_restart: ldr r0, .at91_va_base_sdramc @ preload constants
str r4, [r1, #AT91_RSTC_CR] @ reset processor
b .
-
-.at91_va_base_sdramc:
- .word AT91_VA_BASE_SYS + AT91_SDRAMC0
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 3726160..a41622ea6 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -331,6 +331,8 @@ static void __init at91sam9g45_ioremap_registers(void)
{
at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC);
at91_ioremap_rstc(AT91SAM9G45_BASE_RSTC);
+ at91_ioremap_ramc(0, AT91SAM9G45_BASE_DDRSDRC1, 512);
+ at91_ioremap_ramc(1, AT91SAM9G45_BASE_DDRSDRC0, 512);
at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT);
at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC);
at91_ioremap_matrix(AT91SAM9G45_BASE_MATRIX);
diff --git a/arch/arm/mach-at91/at91sam9g45_reset.S b/arch/arm/mach-at91/at91sam9g45_reset.S
index 0468be1..9d45718 100644
--- a/arch/arm/mach-at91/at91sam9g45_reset.S
+++ b/arch/arm/mach-at91/at91sam9g45_reset.S
@@ -12,7 +12,7 @@
#include <linux/linkage.h>
#include <mach/hardware.h>
-#include <mach/at91sam9_ddrsdr.h>
+#include <mach/at91_ramc.h>
#include <mach/at91_rstc.h>
.arm
@@ -20,9 +20,10 @@
.globl at91sam9g45_restart
at91sam9g45_restart:
- ldr r0, .at91_va_base_sdramc0 @ preload constants
- ldr r1, =at91_rstc_base
- ldr r1, [r1]
+ ldr r5, =at91_ramc_base @ preload constants
+ ldr r0, [r5]
+ ldr r4, =at91_rstc_base
+ ldr r1, [r4]
mov r2, #1
mov r3, #AT91_DDRSDRC_LPCB_POWER_DOWN
@@ -35,6 +36,3 @@ at91sam9g45_restart:
str r4, [r1, #AT91_RSTC_CR] @ reset processor
b .
-
-.at91_va_base_sdramc0:
- .word AT91_VA_BASE_SYS + AT91_DDRSDRC0
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index d95ff97..63d9372 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -288,6 +288,7 @@ static void __init at91sam9rl_ioremap_registers(void)
{
at91_ioremap_shdwc(AT91SAM9RL_BASE_SHDWC);
at91_ioremap_rstc(AT91SAM9RL_BASE_RSTC);
+ at91_ioremap_ramc(0, AT91SAM9RL_BASE_SDRAMC, 512);
at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT);
at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
at91_ioremap_matrix(AT91SAM9RL_BASE_MATRIX);
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index 1c3444d..67b37a0 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -303,6 +303,7 @@ static void __init at91sam9x5_ioremap_registers(void)
{
if (of_at91sam926x_pit_init() < 0)
panic("Impossible to find PIT\n");
+ at91_ioremap_ramc(0, AT91SAM9X5_BASE_DDRSDRC0, 512);
}
void __init at91sam9x5_initialize(void)
diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c
index 368e142..e094cc8 100644
--- a/arch/arm/mach-at91/board-cpuat91.c
+++ b/arch/arm/mach-at91/board-cpuat91.c
@@ -38,6 +38,7 @@
#include <mach/board.h>
#include <mach/at91rm9200_mc.h>
+#include <mach/at91_ramc.h>
#include <mach/cpu.h>
#include "generic.h"
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c
index 07ef35b..f23aabe 100644
--- a/arch/arm/mach-at91/board-eco920.c
+++ b/arch/arm/mach-at91/board-eco920.c
@@ -26,6 +26,7 @@
#include <mach/board.h>
#include <mach/at91rm9200_mc.h>
+#include <mach/at91_ramc.h>
#include <mach/cpu.h>
#include "generic.h"
@@ -110,7 +111,7 @@ static void __init eco920_board_init(void)
at91_add_device_mmc(0, &eco920_mmc_data);
platform_device_register(&eco920_flash);
- at91_sys_write(AT91_SMC_CSR(7), AT91_SMC_RWHOLD_(1)
+ at91_ramc_write(0, AT91_SMC_CSR(7), AT91_SMC_RWHOLD_(1)
| AT91_SMC_RWSETUP_(1)
| AT91_SMC_DBW_8
| AT91_SMC_WSEN
@@ -122,7 +123,7 @@ static void __init eco920_board_init(void)
at91_set_deglitch(AT91_PIN_PA23, 1);
/* Initialization of the Static Memory Controller for Chip Select 3 */
- at91_sys_write(AT91_SMC_CSR(3),
+ at91_ramc_write(0, AT91_SMC_CSR(3),
AT91_SMC_DBW_16 | /* 16 bit */
AT91_SMC_WSEN |
AT91_SMC_NWS_(5) | /* wait states */
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c
index d75a4a2..bb99145 100644
--- a/arch/arm/mach-at91/board-kb9202.c
+++ b/arch/arm/mach-at91/board-kb9202.c
@@ -38,6 +38,7 @@
#include <mach/board.h>
#include <mach/cpu.h>
#include <mach/at91rm9200_mc.h>
+#include <mach/at91_ramc.h>
#include "generic.h"
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c
index ab024fa..59e35dd 100644
--- a/arch/arm/mach-at91/board-picotux200.c
+++ b/arch/arm/mach-at91/board-picotux200.c
@@ -39,6 +39,7 @@
#include <mach/board.h>
#include <mach/at91rm9200_mc.h>
+#include <mach/at91_ramc.h>
#include "generic.h"
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c
index 782f379..9083df0 100644
--- a/arch/arm/mach-at91/board-rm9200dk.c
+++ b/arch/arm/mach-at91/board-rm9200dk.c
@@ -41,6 +41,7 @@
#include <mach/hardware.h>
#include <mach/board.h>
#include <mach/at91rm9200_mc.h>
+#include <mach/at91_ramc.h>
#include "generic.h"
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c
index ef7c12a..11cbaa8 100644
--- a/arch/arm/mach-at91/board-rm9200ek.c
+++ b/arch/arm/mach-at91/board-rm9200ek.c
@@ -41,6 +41,7 @@
#include <mach/hardware.h>
#include <mach/board.h>
#include <mach/at91rm9200_mc.h>
+#include <mach/at91_ramc.h>
#include "generic.h"
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index bbd553e..52f4607 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -45,6 +45,7 @@
#include <mach/hardware.h>
#include <mach/board.h>
#include <mach/at91rm9200_mc.h>
+#include <mach/at91_ramc.h>
#include <mach/cpu.h>
#include "generic.h"
@@ -393,7 +394,7 @@ static void yl9200_init_video(void)
at91_set_A_periph(AT91_PIN_PC6, 0);
/* Initialization of the Static Memory Controller for Chip Select 2 */
- at91_sys_write(AT91_SMC_CSR(2), AT91_SMC_DBW_16 /* 16 bit */
+ at91_ramc_write(0, AT91_SMC_CSR(2), AT91_SMC_DBW_16 /* 16 bit */
| AT91_SMC_WSEN | AT91_SMC_NWS_(0x4) /* wait states */
| AT91_SMC_TDF_(0x100) /* float time */
);
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index aec7fd0..4cad85e 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -71,6 +71,9 @@ extern void at91_ioremap_shdwc(u32 base_addr);
/* Matrix */
extern void at91_ioremap_matrix(u32 base_addr);
+/* Ram Controler */
+extern void at91_ioremap_ramc(int id, u32 addr, u32 size);
+
/* GPIO */
#define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */
#define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */
diff --git a/arch/arm/mach-at91/include/mach/at91_ramc.h b/arch/arm/mach-at91/include/mach/at91_ramc.h
new file mode 100644
index 0000000..3155499
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/at91_ramc.h
@@ -0,0 +1,31 @@
+/*
+ * Header file for the Atmel RAM Controller
+ *
+ * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Under GPLv2 only
+ */
+
+#ifndef __AT91_RAMC_H__
+#define __AT91_RAMC_H__
+
+#ifndef __ASSEMBLY__
+extern void __iomem *at91_ramc_base[];
+
+#define at91_ramc_read(id, field) \
+ __raw_readl(at91_ramc_base[id] + field)
+
+#define at91_ramc_write(id, field, value) \
+ __raw_writel(value, at91_ramc_base[id] + field)
+#else
+.extern at91_ramc_base
+#endif
+
+#ifdef CONFIG_ARCH_AT91RM9200
+#include <mach/at91rm9200_mc.h>
+#else
+#include <mach/at91sam9_ddrsdr.h>
+#include <mach/at91sam9_sdramc.h>
+#endif
+
+#endif /* __AT91_RAMC_H__ */
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h
index 0d0b9b3..32d57be 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200.h
@@ -80,7 +80,6 @@
* System Peripherals (offset from AT91_BASE_SYS)
*/
#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */
-#define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */
#define AT91RM9200_BASE_DBGU AT91_BASE_DBGU0 /* Debug Unit */
#define AT91RM9200_BASE_PIOA 0xfffff400 /* PIO Controller A */
@@ -89,6 +88,7 @@
#define AT91RM9200_BASE_PIOD 0xfffffa00 /* PIO Controller D */
#define AT91RM9200_BASE_ST 0xfffffd00 /* System Timer */
#define AT91RM9200_BASE_RTC 0xfffffe00 /* Real-Time Clock */
+#define AT91RM9200_BASE_MC 0xffffff00 /* Memory Controllers */
#define AT91_USART0 AT91RM9200_BASE_US0
#define AT91_USART1 AT91RM9200_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200_mc.h b/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
index 0eb031b..aeaadfb 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200_mc.h
@@ -17,10 +17,10 @@
#define AT91RM9200_MC_H
/* Memory Controller */
-#define AT91_MC_RCR (AT91_MC + 0x00) /* MC Remap Control Register */
+#define AT91_MC_RCR 0x00 /* MC Remap Control Register */
#define AT91_MC_RCB (1 << 0) /* Remap Command Bit */
-#define AT91_MC_ASR (AT91_MC + 0x04) /* MC Abort Status Register */
+#define AT91_MC_ASR 0x04 /* MC Abort Status Register */
#define AT91_MC_UNADD (1 << 0) /* Undefined Address Abort Status */
#define AT91_MC_MISADD (1 << 1) /* Misaligned Address Abort Status */
#define AT91_MC_ABTSZ (3 << 8) /* Abort Size Status */
@@ -40,16 +40,16 @@
#define AT91_MC_SVMST2 (1 << 26) /* Saved UHP Abort Source */
#define AT91_MC_SVMST3 (1 << 27) /* Saved EMAC Abort Source */
-#define AT91_MC_AASR (AT91_MC + 0x08) /* MC Abort Address Status Register */
+#define AT91_MC_AASR 0x08 /* MC Abort Address Status Register */
-#define AT91_MC_MPR (AT91_MC + 0x0c) /* MC Master Priority Register */
+#define AT91_MC_MPR 0x0c /* MC Master Priority Register */
#define AT91_MPR_MSTP0 (7 << 0) /* ARM920T Priority */
#define AT91_MPR_MSTP1 (7 << 4) /* PDC Priority */
#define AT91_MPR_MSTP2 (7 << 8) /* UHP Priority */
#define AT91_MPR_MSTP3 (7 << 12) /* EMAC Priority */
/* External Bus Interface (EBI) registers */
-#define AT91_EBI_CSA (AT91_MC + 0x60) /* Chip Select Assignment Register */
+#define AT91_EBI_CSA 0x60 /* Chip Select Assignment Register */
#define AT91_EBI_CS0A (1 << 0) /* Chip Select 0 Assignment */
#define AT91_EBI_CS0A_SMC (0 << 0)
#define AT91_EBI_CS0A_BFC (1 << 0)
@@ -66,7 +66,7 @@
#define AT91_EBI_DBPUC (1 << 0) /* Data Bus Pull-Up Configuration */
/* Static Memory Controller (SMC) registers */
-#define AT91_SMC_CSR(n) (AT91_MC + 0x70 + ((n) * 4))/* SMC Chip Select Register */
+#define AT91_SMC_CSR(n) (0x70 + ((n) * 4)) /* SMC Chip Select Register */
#define AT91_SMC_NWS (0x7f << 0) /* Number of Wait States */
#define AT91_SMC_NWS_(x) ((x) << 0)
#define AT91_SMC_WSEN (1 << 7) /* Wait State Enable */
@@ -88,7 +88,7 @@
#define AT91_SMC_RWHOLD_(x) ((x) << 28)
/* Burst Flash Controller register */
-#define AT91_BFC_MR (AT91_MC + 0xc0) /* Mode Register */
+#define AT91_BFC_MR 0xc0 /* Mode Register */
#define AT91_BFC_BFCOM (3 << 0) /* Burst Flash Controller Operating Mode */
#define AT91_BFC_BFCOM_DISABLED (0 << 0)
#define AT91_BFC_BFCOM_ASYNC (1 << 0)
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h b/arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h
index 7ad3597..aa047f45 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h
@@ -17,7 +17,7 @@
#define AT91RM9200_SDRAMC_H
/* SDRAM Controller registers */
-#define AT91RM9200_SDRAMC_MR (AT91_MC + 0x90) /* Mode Register */
+#define AT91RM9200_SDRAMC_MR 0x90 /* Mode Register */
#define AT91RM9200_SDRAMC_MODE (0xf << 0) /* Command Mode */
#define AT91RM9200_SDRAMC_MODE_NORMAL (0 << 0)
#define AT91RM9200_SDRAMC_MODE_NOP (1 << 0)
@@ -28,10 +28,10 @@
#define AT91RM9200_SDRAMC_DBW_32 (0 << 4)
#define AT91RM9200_SDRAMC_DBW_16 (1 << 4)
-#define AT91RM9200_SDRAMC_TR (AT91_MC + 0x94) /* Refresh Timer Register */
+#define AT91RM9200_SDRAMC_TR 0x94 /* Refresh Timer Register */
#define AT91RM9200_SDRAMC_COUNT (0xfff << 0) /* Refresh Timer Count */
-#define AT91RM9200_SDRAMC_CR (AT91_MC + 0x98) /* Configuration Register */
+#define AT91RM9200_SDRAMC_CR 0x98 /* Configuration Register */
#define AT91RM9200_SDRAMC_NC (3 << 0) /* Number of Column Bits */
#define AT91RM9200_SDRAMC_NC_8 (0 << 0)
#define AT91RM9200_SDRAMC_NC_9 (1 << 0)
@@ -53,11 +53,11 @@
#define AT91RM9200_SDRAMC_TRAS (0xf << 23) /* Active to Precharge Delay */
#define AT91RM9200_SDRAMC_TXSR (0xf << 27) /* Exit Self Refresh to Active Delay */
-#define AT91RM9200_SDRAMC_SRR (AT91_MC + 0x9c) /* Self Refresh Register */
-#define AT91RM9200_SDRAMC_LPR (AT91_MC + 0xa0) /* Low Power Register */
-#define AT91RM9200_SDRAMC_IER (AT91_MC + 0xa4) /* Interrupt Enable Register */
-#define AT91RM9200_SDRAMC_IDR (AT91_MC + 0xa8) /* Interrupt Disable Register */
-#define AT91RM9200_SDRAMC_IMR (AT91_MC + 0xac) /* Interrupt Mask Register */
-#define AT91RM9200_SDRAMC_ISR (AT91_MC + 0xb0) /* Interrupt Status Register */
+#define AT91RM9200_SDRAMC_SRR 0x9c /* Self Refresh Register */
+#define AT91RM9200_SDRAMC_LPR 0xa0 /* Low Power Register */
+#define AT91RM9200_SDRAMC_IER 0xa4 /* Interrupt Enable Register */
+#define AT91RM9200_SDRAMC_IDR 0xa8 /* Interrupt Disable Register */
+#define AT91RM9200_SDRAMC_IMR 0xac /* Interrupt Mask Register */
+#define AT91RM9200_SDRAMC_ISR 0xb0 /* Interrupt Status Register */
#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index 2bde649..c5b6b3b 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -80,11 +80,11 @@
/*
* System Peripherals (offset from AT91_BASE_SYS)
*/
-#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
#define AT91SAM9260_BASE_ECC 0xffffe800
+#define AT91SAM9260_BASE_SDRAMC 0xffffea00
#define AT91SAM9260_BASE_SMC 0xffffec00
#define AT91SAM9260_BASE_MATRIX 0xffffee00
#define AT91SAM9260_BASE_DBGU AT91_BASE_DBGU0
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
index 6dcff27..a269cef 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -65,12 +65,12 @@
/*
* System Peripherals (offset from AT91_BASE_SYS)
*/
-#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
#define AT91SAM9261_BASE_SMC 0xffffec00
#define AT91SAM9261_BASE_MATRIX 0xffffee00
+#define AT91SAM9261_BASE_SDRAMC 0xffffea00
#define AT91SAM9261_BASE_DBGU AT91_BASE_DBGU0
#define AT91SAM9261_BASE_PIOA 0xfffff400
#define AT91SAM9261_BASE_PIOB 0xfffff600
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
index fe73bfa..bccba0b 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -74,14 +74,14 @@
/*
* System Peripherals (offset from AT91_BASE_SYS)
*/
-#define AT91_SDRAMC0 (0xffffe200 - AT91_BASE_SYS)
-#define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS)
#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
#define AT91SAM9263_BASE_ECC0 0xffffe000
+#define AT91SAM9263_BASE_SDRAMC0 0xffffe200
#define AT91SAM9263_BASE_SMC0 0xffffe400
#define AT91SAM9263_BASE_ECC1 0xffffe600
+#define AT91SAM9263_BASE_SDRAMC1 0xffffe800
#define AT91SAM9263_BASE_SMC1 0xffffea00
#define AT91SAM9263_BASE_MATRIX 0xffffec00
#define AT91SAM9263_BASE_DBGU AT91_BASE_DBGU1
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
index 5d4a9f8..0210797 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
@@ -121,10 +121,4 @@
#define AT91_DDRSDRC_WPVS (1 << 0) /* Write protect violation status */
#define AT91_DDRSDRC_WPVSRC (0xffff << 8) /* Write protect violation source */
-/* Register access macros */
-#define at91_ramc_read(num, reg) \
- at91_sys_read(AT91_DDRSDRC##num + reg)
-#define at91_ramc_write(num, reg, value) \
- at91_sys_write(AT91_DDRSDRC##num + reg, value)
-
#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h b/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
index 100f5a5..3d085a9 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
@@ -82,10 +82,4 @@
#define AT91_SDRAMC_MD_SDRAM 0
#define AT91_SDRAMC_MD_LOW_POWER_SDRAM 1
-/* Register access macros */
-#define at91_ramc_read(num, reg) \
- at91_sys_read(AT91_SDRAMC##num + reg)
-#define at91_ramc_write(num, reg, value) \
- at91_sys_write(AT91_SDRAMC##num + reg, value)
-
#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index c8fe455..dfc4570 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -86,12 +86,12 @@
/*
* System Peripherals (offset from AT91_BASE_SYS)
*/
-#define AT91_DDRSDRC1 (0xffffe400 - AT91_BASE_SYS)
-#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS)
#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
#define AT91SAM9G45_BASE_ECC 0xffffe200
+#define AT91SAM9G45_BASE_DDRSDRC1 0xffffe400
+#define AT91SAM9G45_BASE_DDRSDRC0 0xffffe600
#define AT91SAM9G45_BASE_DMA 0xffffec00
#define AT91SAM9G45_BASE_SMC 0xffffe800
#define AT91SAM9G45_BASE_MATRIX 0xffffea00
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index 51edc25..de960dc 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -69,13 +69,13 @@
/*
* System Peripherals (offset from AT91_BASE_SYS)
*/
-#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS)
#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
#define AT91SAM9RL_BASE_DMA 0xffffe600
#define AT91SAM9RL_BASE_ECC 0xffffe800
+#define AT91SAM9RL_BASE_SDRAMC 0xffffea00
#define AT91SAM9RL_BASE_SMC 0xffffec00
#define AT91SAM9RL_BASE_MATRIX 0xffffee00
#define AT91SAM9RL_BASE_DBGU AT91_BASE_DBGU0
diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5.h b/arch/arm/mach-at91/include/mach/at91sam9x5.h
index 8476871..96f25f5 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9x5.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9x5.h
@@ -57,7 +57,7 @@
/*
* System Peripherals (offset from AT91_BASE_SYS)
*/
-#define AT91_DDRSDRC0 (0xffffe800 - AT91_BASE_SYS)
+#define AT91SAM9X5_BASE_DDRSDRC0 0xffffe800
#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
/*
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 8046a50..6a02ea2 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -196,19 +196,18 @@ extern u32 at91_slow_clock_sz;
#endif
static void __iomem *at91_pmc_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_PMC);
-#ifdef CONFIG_ARCH_AT91RM9200
-static void __iomem *at91_ramc0_base = (void __iomem*)AT91_VA_BASE_SYS;
-#elif defined(CONFIG_ARCH_AT91SAM9G45)
-static void __iomem *at91_ramc0_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_DDRSDRC0);
-#else
-static void __iomem *at91_ramc0_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_SDRAMC0);
-#endif
+void __iomem *at91_ramc_base[2];
-#if defined(CONFIG_ARCH_AT91SAM9G45)
-static void __iomem *at91_ramc1_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_DDRSDRC1);
-#else
-static void __iomem *at91_ramc1_base = NULL;
-#endif
+void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
+{
+ if (id > 1) {
+ pr_warn("%s: id > 2\n", __func__);
+ return;
+ }
+ at91_ramc_base[id] = ioremap(addr, size);
+ if (!at91_ramc_base[id])
+ pr_warn("Impossible to ioremap ramc.%d 0x%x\n", id, addr);
+}
static int at91_pm_enter(suspend_state_t state)
{
@@ -246,7 +245,7 @@ static int at91_pm_enter(suspend_state_t state)
/* copy slow_clock handler to SRAM, and call it */
memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz);
#endif
- slow_clock(at91_pmc_base, at91_ramc0_base, at91_ramc1_base);
+ slow_clock(at91_pmc_base, at91_ramc_base[0], at91_ramc_base[1]);
break;
} else {
pr_info("AT91: PM - no slow clock mode enabled ...\n");
@@ -315,7 +314,7 @@ static int __init at91_pm_init(void)
#ifdef CONFIG_ARCH_AT91RM9200
/* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
- at91_sys_write(AT91RM9200_SDRAMC_LPR, 0);
+ at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
#endif
suspend_set_ops(&at91_pm_ops);
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index 41cdd2b..89f56f3 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -11,8 +11,8 @@
#ifndef __ARCH_ARM_MACH_AT91_PM
#define __ARCH_ARM_MACH_AT91_PM
+#include <mach/at91_ramc.h>
#ifdef CONFIG_ARCH_AT91RM9200
-#include <mach/at91rm9200_mc.h>
#include <mach/at91rm9200_sdramc.h>
/*
@@ -27,7 +27,7 @@
static inline void at91rm9200_standby(void)
{
- u32 lpr = at91_sys_read(AT91RM9200_SDRAMC_LPR);
+ u32 lpr = at91_ramc_read(0, AT91RM9200_SDRAMC_LPR);
asm volatile(
"b 1f\n\t"
@@ -46,7 +46,6 @@ static inline void at91rm9200_standby(void)
#define at91_standby at91rm9200_standby
#elif defined(CONFIG_ARCH_AT91SAM9G45)
-#include <mach/at91sam9_ddrsdr.h>
/* We manage both DDRAM/SDRAM controllers, we need more than one value to
* remember.
@@ -79,7 +78,6 @@ static inline void at91sam9g45_standby(void)
#define at91_standby at91sam9g45_standby
#else
-#include <mach/at91sam9_sdramc.h>
#ifdef CONFIG_ARCH_AT91SAM9263
/*
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index c2cc7d4..9c3117c 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -15,15 +15,7 @@
#include <linux/linkage.h>
#include <mach/hardware.h>
#include <mach/at91_pmc.h>
-
-#if defined(CONFIG_ARCH_AT91RM9200)
-#include <mach/at91rm9200_mc.h>
-#include <mach/at91rm9200_sdramc.h>
-#elif defined(CONFIG_ARCH_AT91SAM9G45)
-#include <mach/at91sam9_ddrsdr.h>
-#else
-#include <mach/at91sam9_sdramc.h>
-#endif
+#include <mach/at91_ramc.h>
#ifdef CONFIG_ARCH_AT91SAM9263
diff --git a/drivers/pcmcia/at91_cf.c b/drivers/pcmcia/at91_cf.c
index 4902206..1dd68f5 100644
--- a/drivers/pcmcia/at91_cf.c
+++ b/drivers/pcmcia/at91_cf.c
@@ -26,6 +26,7 @@
#include <mach/board.h>
#include <mach/at91rm9200_mc.h>
+#include <mach/at91_ramc.h>
/*
@@ -156,7 +157,7 @@ static int at91_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
/*
* Use 16 bit accesses unless/until we need 8-bit i/o space.
*/
- csr = at91_sys_read(AT91_SMC_CSR(cf->board->chipselect)) & ~AT91_SMC_DBW;
+ csr = at91_ramc_read(0, AT91_SMC_CSR(cf->board->chipselect)) & ~AT91_SMC_DBW;
/*
* NOTE: this CF controller ignores IOIS16, so we can't really do
@@ -175,7 +176,7 @@ static int at91_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
csr |= AT91_SMC_DBW_16;
pr_debug("%s: 16bit i/o bus\n", driver_name);
}
- at91_sys_write(AT91_SMC_CSR(cf->board->chipselect), csr);
+ at91_ramc_write(0, AT91_SMC_CSR(cf->board->chipselect), csr);
io->start = cf->socket.io_offset;
io->stop = io->start + SZ_2K - 1;
--
1.7.9
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [PATCH 09/18] ARM: at91/pm_slowclock: add runtime detection of memory contoller
2012-02-17 17:49 ` [PATCH 01/18] ARM: at91: factorise duplicated at91sam9 idle Nicolas Ferre
` (6 preceding siblings ...)
2012-02-17 17:50 ` [PATCH 08/18] ARM: at91: make sdram/ddr register base soc independent Nicolas Ferre
@ 2012-02-17 17:50 ` Nicolas Ferre
2012-02-17 17:50 ` [PATCH 10/18] ARM: at91/PMC: make register base soc independent Nicolas Ferre
` (8 subsequent siblings)
16 siblings, 0 replies; 43+ messages in thread
From: Nicolas Ferre @ 2012-02-17 17:50 UTC (permalink / raw)
To: plagnioj, linux-arm-kernel; +Cc: linux-kernel
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This will allow to have all SoC in one kernel image.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
arch/arm/mach-at91/include/mach/at91_ramc.h | 9 ++--
arch/arm/mach-at91/pm.c | 15 +++++-
arch/arm/mach-at91/pm_slowclock.S | 66 +++++++++++++++++++++------
3 files changed, 68 insertions(+), 22 deletions(-)
diff --git a/arch/arm/mach-at91/include/mach/at91_ramc.h b/arch/arm/mach-at91/include/mach/at91_ramc.h
index 3155499..d8aeb27 100644
--- a/arch/arm/mach-at91/include/mach/at91_ramc.h
+++ b/arch/arm/mach-at91/include/mach/at91_ramc.h
@@ -21,11 +21,12 @@ extern void __iomem *at91_ramc_base[];
.extern at91_ramc_base
#endif
-#ifdef CONFIG_ARCH_AT91RM9200
-#include <mach/at91rm9200_mc.h>
-#else
+#define AT91_MEMCTRL_MC 0
+#define AT91_MEMCTRL_SDRAMC 1
+#define AT91_MEMCTRL_DDRSDR 2
+
+#include <mach/at91rm9200_sdramc.h>
#include <mach/at91sam9_ddrsdr.h>
#include <mach/at91sam9_sdramc.h>
-#endif
#endif /* __AT91_RAMC_H__ */
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 6a02ea2..83a0051 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -188,10 +188,12 @@ int at91_suspend_entering_slow_clock(void)
EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
-static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0, void __iomem *ramc1);
+static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0,
+ void __iomem *ramc1, int memctrl);
#ifdef CONFIG_AT91_SLOW_CLOCK
-extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0, void __iomem *ramc1);
+extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0,
+ void __iomem *ramc1, int memctrl);
extern u32 at91_slow_clock_sz;
#endif
@@ -241,11 +243,18 @@ static int at91_pm_enter(suspend_state_t state)
* turning off the main oscillator; reverse on wakeup.
*/
if (slow_clock) {
+ int memctrl = AT91_MEMCTRL_SDRAMC;
+
+ if (cpu_is_at91rm9200())
+ memctrl = AT91_MEMCTRL_MC;
+ else if (cpu_is_at91sam9g45())
+ memctrl = AT91_MEMCTRL_DDRSDR;
#ifdef CONFIG_AT91_SLOW_CLOCK
/* copy slow_clock handler to SRAM, and call it */
memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz);
#endif
- slow_clock(at91_pmc_base, at91_ramc_base[0], at91_ramc_base[1]);
+ slow_clock(at91_pmc_base, at91_ramc_base[0],
+ at91_ramc_base[1], memctrl);
break;
} else {
pr_info("AT91: PM - no slow clock mode enabled ...\n");
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 9c3117c..17f4d72 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -42,8 +42,9 @@
#define pmc r0
#define sdramc r1
#define ramc1 r2
-#define tmp1 r3
-#define tmp2 r4
+#define memctrl r3
+#define tmp1 r4
+#define tmp2 r5
/*
* Wait until master clock is ready (after switching master clock source)
@@ -103,29 +104,44 @@
.text
-/* void at91_slow_clock(void __iomem *pmc, void __iomem *sdramc, void __iomem *ramc1) */
+/* void at91_slow_clock(void __iomem *pmc, void __iomem *sdramc,
+ * void __iomem *ramc1, int memctrl)
+ */
ENTRY(at91_slow_clock)
/* Save registers on stack */
- stmfd sp!, {r3 - r12, lr}
+ stmfd sp!, {r4 - r12, lr}
/*
* Register usage:
* R0 = Base address of AT91_PMC
* R1 = Base address of RAM Controller (SDRAM, DDRSDR, or AT91_SYS)
* R2 = Base address of second RAM Controller or 0 if not present
- * R3 = temporary register
+ * R3 = Memory controller
* R4 = temporary register
+ * R5 = temporary register
*/
/* Drain write buffer */
mov tmp1, #0
mcr p15, 0, tmp1, c7, c10, 4
-#ifdef CONFIG_ARCH_AT91RM9200
+ cmp memctrl, #AT91_MEMCTRL_MC
+ bne ddr_sr_enable
+
+ /*
+ * at91rm9200 Memory controller
+ */
/* Put SDRAM in self-refresh mode */
mov tmp1, #1
str tmp1, [sdramc, #AT91RM9200_SDRAMC_SRR]
-#elif defined(CONFIG_ARCH_AT91SAM9G45)
+ b sdr_sr_done
+
+ /*
+ * DDRSDR Memory controller
+ */
+ddr_sr_enable:
+ cmp memctrl, #AT91_MEMCTRL_DDRSDR
+ bne sdr_sr_enable
/* prepare for DDRAM self-refresh mode */
ldr tmp1, [sdramc, #AT91_DDRSDRC_LPR]
@@ -143,7 +159,13 @@ ENTRY(at91_slow_clock)
/* Enable DDRAM self-refresh mode */
str tmp1, [sdramc, #AT91_DDRSDRC_LPR]
strne tmp2, [ramc1, #AT91_DDRSDRC_LPR]
-#else
+
+ b sdr_sr_done
+
+ /*
+ * SDRAMC Memory controller
+ */
+sdr_sr_enable:
/* Enable SDRAM self-refresh mode */
ldr tmp1, [sdramc, #AT91_SDRAMC_LPR]
str tmp1, .saved_sam9_lpr
@@ -151,8 +173,8 @@ ENTRY(at91_slow_clock)
bic tmp1, #AT91_SDRAMC_LPCB
orr tmp1, #AT91_SDRAMC_LPCB_SELF_REFRESH
str tmp1, [sdramc, #AT91_SDRAMC_LPR]
-#endif
+sdr_sr_done:
/* Save Master clock setting */
ldr tmp1, [pmc, #(AT91_PMC_MCKR - AT91_PMC)]
str tmp1, .saved_mckr
@@ -255,9 +277,18 @@ ENTRY(at91_slow_clock)
wait_mckrdy
-#ifdef CONFIG_ARCH_AT91RM9200
- /* Do nothing - self-refresh is automatically disabled. */
-#elif defined(CONFIG_ARCH_AT91SAM9G45)
+ /*
+ * at91rm9200 Memory controller
+ * Do nothing - self-refresh is automatically disabled.
+ */
+ cmp memctrl, #AT91_MEMCTRL_MC
+ beq ram_restored
+
+ /*
+ * DDRSDR Memory controller
+ */
+ cmp memctrl, #AT91_MEMCTRL_DDRSDR
+ bne sdr_en_restore
/* Restore LPR on AT91 with DDRAM */
ldr tmp1, .saved_sam9_lpr
str tmp1, [sdramc, #AT91_DDRSDRC_LPR]
@@ -267,14 +298,19 @@ ENTRY(at91_slow_clock)
ldrne tmp2, .saved_sam9_lpr1
strne tmp2, [ramc1, #AT91_DDRSDRC_LPR]
-#else
+ b ram_restored
+
+ /*
+ * SDRAMC Memory controller
+ */
+sdr_en_restore:
/* Restore LPR on AT91 with SDRAM */
ldr tmp1, .saved_sam9_lpr
str tmp1, [sdramc, #AT91_SDRAMC_LPR]
-#endif
+ram_restored:
/* Restore registers, and return */
- ldmfd sp!, {r3 - r12, pc}
+ ldmfd sp!, {r4 - r12, pc}
.saved_mckr:
--
1.7.9
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [PATCH 10/18] ARM: at91/PMC: make register base soc independent
2012-02-17 17:49 ` [PATCH 01/18] ARM: at91: factorise duplicated at91sam9 idle Nicolas Ferre
` (7 preceding siblings ...)
2012-02-17 17:50 ` [PATCH 09/18] ARM: at91/pm_slowclock: add runtime detection of memory contoller Nicolas Ferre
@ 2012-02-17 17:50 ` Nicolas Ferre
2012-02-20 0:27 ` Ryan Mallon
2012-02-17 17:50 ` [PATCH 11/18] ARM: at91/rtc-at91sam9: each SoC can select the RTT device to use Nicolas Ferre
` (7 subsequent siblings)
16 siblings, 1 reply; 43+ messages in thread
From: Nicolas Ferre @ 2012-02-17 17:50 UTC (permalink / raw)
To: plagnioj, linux-arm-kernel; +Cc: linux-kernel
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
arch/arm/mach-at91/at91rm9200.c | 2 +-
arch/arm/mach-at91/clock.c | 75 +++++++++++++------------
arch/arm/mach-at91/include/mach/at91_pmc.h | 56 +++++++++++-------
arch/arm/mach-at91/include/mach/at91rm9200.h | 4 +-
arch/arm/mach-at91/include/mach/at91sam9260.h | 1 -
arch/arm/mach-at91/include/mach/at91sam9261.h | 1 -
arch/arm/mach-at91/include/mach/at91sam9263.h | 1 -
arch/arm/mach-at91/include/mach/at91sam9g45.h | 1 -
arch/arm/mach-at91/include/mach/at91sam9rl.h | 1 -
arch/arm/mach-at91/include/mach/at91sam9x5.h | 3 +-
arch/arm/mach-at91/include/mach/hardware.h | 3 +-
arch/arm/mach-at91/pm.c | 9 +--
arch/arm/mach-at91/pm_slowclock.S | 38 ++++++------
drivers/usb/gadget/atmel_usba_udc.c | 6 +-
14 files changed, 105 insertions(+), 96 deletions(-)
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 94141b2..c7efa17 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -295,7 +295,7 @@ static void at91rm9200_idle(void)
* Disable the processor clock. The processor will be automatically
* re-enabled by an interrupt or by a reset.
*/
- at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
+ at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK);
}
static void at91rm9200_restart(char mode, const char *cmd)
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index d1b4e07..57b15a9 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -33,6 +33,7 @@
#include "clock.h"
#include "generic.h"
+void __iomem *at91_pmc_base;
/*
* There's a lot more which can be done with clocks, including cpufreq
@@ -125,11 +126,11 @@ static void pllb_mode(struct clk *clk, int is_on)
value = 0;
// REVISIT: Add work-around for AT91RM9200 Errata #26 ?
- at91_sys_write(AT91_CKGR_PLLBR, value);
+ at91_pmc_write(AT91_CKGR_PLLBR, value);
do {
cpu_relax();
- } while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != is_on);
+ } while ((at91_pmc_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != is_on);
}
static struct clk pllb = {
@@ -144,24 +145,24 @@ static struct clk pllb = {
static void pmc_sys_mode(struct clk *clk, int is_on)
{
if (is_on)
- at91_sys_write(AT91_PMC_SCER, clk->pmc_mask);
+ at91_pmc_write(AT91_PMC_SCER, clk->pmc_mask);
else
- at91_sys_write(AT91_PMC_SCDR, clk->pmc_mask);
+ at91_pmc_write(AT91_PMC_SCDR, clk->pmc_mask);
}
static void pmc_uckr_mode(struct clk *clk, int is_on)
{
- unsigned int uckr = at91_sys_read(AT91_CKGR_UCKR);
+ unsigned int uckr = at91_pmc_read(AT91_CKGR_UCKR);
if (is_on) {
is_on = AT91_PMC_LOCKU;
- at91_sys_write(AT91_CKGR_UCKR, uckr | clk->pmc_mask);
+ at91_pmc_write(AT91_CKGR_UCKR, uckr | clk->pmc_mask);
} else
- at91_sys_write(AT91_CKGR_UCKR, uckr & ~(clk->pmc_mask));
+ at91_pmc_write(AT91_CKGR_UCKR, uckr & ~(clk->pmc_mask));
do {
cpu_relax();
- } while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKU) != is_on);
+ } while ((at91_pmc_read(AT91_PMC_SR) & AT91_PMC_LOCKU) != is_on);
}
/* USB function clocks (PLLB must be 48 MHz) */
@@ -197,9 +198,9 @@ struct clk mck = {
static void pmc_periph_mode(struct clk *clk, int is_on)
{
if (is_on)
- at91_sys_write(AT91_PMC_PCER, clk->pmc_mask);
+ at91_pmc_write(AT91_PMC_PCER, clk->pmc_mask);
else
- at91_sys_write(AT91_PMC_PCDR, clk->pmc_mask);
+ at91_pmc_write(AT91_PMC_PCDR, clk->pmc_mask);
}
static struct clk __init *at91_css_to_clk(unsigned long css)
@@ -359,10 +360,10 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
if (actual && actual <= rate) {
u32 pckr;
- pckr = at91_sys_read(AT91_PMC_PCKR(clk->id));
+ pckr = at91_pmc_read(AT91_PMC_PCKR(clk->id));
pckr &= css_mask; /* keep clock selection */
pckr |= prescale << prescale_offset;
- at91_sys_write(AT91_PMC_PCKR(clk->id), pckr);
+ at91_pmc_write(AT91_PMC_PCKR(clk->id), pckr);
clk->rate_hz = actual;
break;
}
@@ -396,7 +397,7 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
clk->rate_hz = parent->rate_hz;
clk->parent = parent;
- at91_sys_write(AT91_PMC_PCKR(clk->id), parent->id);
+ at91_pmc_write(AT91_PMC_PCKR(clk->id), parent->id);
spin_unlock_irqrestore(&clk_lock, flags);
return 0;
@@ -415,7 +416,7 @@ static void __init init_programmable_clock(struct clk *clk)
else
css_mask = AT91_PMC_CSS;
- pckr = at91_sys_read(AT91_PMC_PCKR(clk->id));
+ pckr = at91_pmc_read(AT91_PMC_PCKR(clk->id));
parent = at91_css_to_clk(pckr & css_mask);
clk->parent = parent;
clk->rate_hz = parent->rate_hz / pmc_prescaler_divider(pckr);
@@ -432,19 +433,19 @@ static int at91_clk_show(struct seq_file *s, void *unused)
u32 scsr, pcsr, uckr = 0, sr;
struct clk *clk;
- seq_printf(s, "SCSR = %8x\n", scsr = at91_sys_read(AT91_PMC_SCSR));
- seq_printf(s, "PCSR = %8x\n", pcsr = at91_sys_read(AT91_PMC_PCSR));
- seq_printf(s, "MOR = %8x\n", at91_sys_read(AT91_CKGR_MOR));
- seq_printf(s, "MCFR = %8x\n", at91_sys_read(AT91_CKGR_MCFR));
- seq_printf(s, "PLLA = %8x\n", at91_sys_read(AT91_CKGR_PLLAR));
+ seq_printf(s, "SCSR = %8x\n", scsr = at91_pmc_read(AT91_PMC_SCSR));
+ seq_printf(s, "PCSR = %8x\n", pcsr = at91_pmc_read(AT91_PMC_PCSR));
+ seq_printf(s, "MOR = %8x\n", at91_pmc_read(AT91_CKGR_MOR));
+ seq_printf(s, "MCFR = %8x\n", at91_pmc_read(AT91_CKGR_MCFR));
+ seq_printf(s, "PLLA = %8x\n", at91_pmc_read(AT91_CKGR_PLLAR));
if (cpu_has_pllb())
- seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR));
+ seq_printf(s, "PLLB = %8x\n", at91_pmc_read(AT91_CKGR_PLLBR));
if (cpu_has_utmi())
- seq_printf(s, "UCKR = %8x\n", uckr = at91_sys_read(AT91_CKGR_UCKR));
- seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR));
+ seq_printf(s, "UCKR = %8x\n", uckr = at91_pmc_read(AT91_CKGR_UCKR));
+ seq_printf(s, "MCKR = %8x\n", at91_pmc_read(AT91_PMC_MCKR));
if (cpu_has_upll())
- seq_printf(s, "USB = %8x\n", at91_sys_read(AT91_PMC_USB));
- seq_printf(s, "SR = %8x\n", sr = at91_sys_read(AT91_PMC_SR));
+ seq_printf(s, "USB = %8x\n", at91_pmc_read(AT91_PMC_USB));
+ seq_printf(s, "SR = %8x\n", sr = at91_pmc_read(AT91_PMC_SR));
seq_printf(s, "\n");
@@ -632,14 +633,14 @@ static void __init at91_pllb_usbfs_clock_init(unsigned long main_clock)
if (cpu_is_at91rm9200()) {
uhpck.pmc_mask = AT91RM9200_PMC_UHP;
udpck.pmc_mask = AT91RM9200_PMC_UDP;
- at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP);
+ at91_pmc_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP);
} else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() ||
cpu_is_at91sam9263() || cpu_is_at91sam9g20() ||
cpu_is_at91sam9g10()) {
uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
udpck.pmc_mask = AT91SAM926x_PMC_UDP;
}
- at91_sys_write(AT91_CKGR_PLLBR, 0);
+ at91_pmc_write(AT91_CKGR_PLLBR, 0);
udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
@@ -656,13 +657,13 @@ static void __init at91_upll_usbfs_clock_init(unsigned long main_clock)
/* Setup divider by 10 to reach 48 MHz */
usbr |= ((10 - 1) << 8) & AT91_PMC_OHCIUSBDIV;
- at91_sys_write(AT91_PMC_USB, usbr);
+ at91_pmc_write(AT91_PMC_USB, usbr);
/* Now set uhpck values */
uhpck.parent = &utmi_clk;
uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
uhpck.rate_hz = utmi_clk.rate_hz;
- uhpck.rate_hz /= 1 + ((at91_sys_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8);
+ uhpck.rate_hz /= 1 + ((at91_pmc_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8);
}
int __init at91_clock_init(unsigned long main_clock)
@@ -671,6 +672,10 @@ int __init at91_clock_init(unsigned long main_clock)
int i;
int pll_overclock = false;
+ at91_pmc_base = ioremap(AT91_PMC, 256);
+ if (!at91_pmc_base)
+ panic("Impossible to ioremap AT91_PMC 0x%x\n", AT91_PMC);
+
/*
* When the bootloader initialized the main oscillator correctly,
* there's no problem using the cycle counter. But if it didn't,
@@ -679,14 +684,14 @@ int __init at91_clock_init(unsigned long main_clock)
*/
if (!main_clock) {
do {
- tmp = at91_sys_read(AT91_CKGR_MCFR);
+ tmp = at91_pmc_read(AT91_CKGR_MCFR);
} while (!(tmp & AT91_PMC_MAINRDY));
main_clock = (tmp & AT91_PMC_MAINF) * (AT91_SLOW_CLOCK / 16);
}
main_clk.rate_hz = main_clock;
/* report if PLLA is more than mildly overclocked */
- plla.rate_hz = at91_pll_rate(&plla, main_clock, at91_sys_read(AT91_CKGR_PLLAR));
+ plla.rate_hz = at91_pll_rate(&plla, main_clock, at91_pmc_read(AT91_CKGR_PLLAR));
if (cpu_has_300M_plla()) {
if (plla.rate_hz > 300000000)
pll_overclock = true;
@@ -701,7 +706,7 @@ int __init at91_clock_init(unsigned long main_clock)
pr_info("Clocks: PLLA overclocked, %ld MHz\n", plla.rate_hz / 1000000);
if (cpu_has_plladiv2()) {
- mckr = at91_sys_read(AT91_PMC_MCKR);
+ mckr = at91_pmc_read(AT91_PMC_MCKR);
plla.rate_hz /= (1 << ((mckr & AT91_PMC_PLLADIV2) >> 12)); /* plla divisor by 2 */
}
@@ -741,7 +746,7 @@ int __init at91_clock_init(unsigned long main_clock)
* MCK and CPU derive from one of those primary clocks.
* For now, assume this parentage won't change.
*/
- mckr = at91_sys_read(AT91_PMC_MCKR);
+ mckr = at91_pmc_read(AT91_PMC_MCKR);
mck.parent = at91_css_to_clk(mckr & AT91_PMC_CSS);
freq = mck.parent->rate_hz;
freq /= pmc_prescaler_divider(mckr); /* prescale */
@@ -814,8 +819,8 @@ static int __init at91_clock_reset(void)
pr_debug("Clocks: disable unused %s\n", clk->name);
}
- at91_sys_write(AT91_PMC_PCDR, pcdr);
- at91_sys_write(AT91_PMC_SCDR, scdr);
+ at91_pmc_write(AT91_PMC_PCDR, pcdr);
+ at91_pmc_write(AT91_PMC_SCDR, scdr);
return 0;
}
@@ -823,6 +828,6 @@ late_initcall(at91_clock_reset);
void at91sam9_idle(void)
{
- at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
+ at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK);
cpu_do_idle();
}
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index f9fdbbe..3660478 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -16,10 +16,22 @@
#ifndef AT91_PMC_H
#define AT91_PMC_H
-#define AT91_PMC_SCER (AT91_PMC + 0x00) /* System Clock Enable Register */
-#define AT91_PMC_SCDR (AT91_PMC + 0x04) /* System Clock Disable Register */
+#ifndef __ASSEMBLY__
+extern void __iomem *at91_pmc_base;
-#define AT91_PMC_SCSR (AT91_PMC + 0x08) /* System Clock Status Register */
+#define at91_pmc_read(field) \
+ __raw_readl(at91_pmc_base + field)
+
+#define at91_pmc_write(field, value) \
+ __raw_writel(value, at91_pmc_base + field)
+#else
+.extern at91_aic_base
+#endif
+
+#define AT91_PMC_SCER 0x00 /* System Clock Enable Register */
+#define AT91_PMC_SCDR 0x04 /* System Clock Disable Register */
+
+#define AT91_PMC_SCSR 0x08 /* System Clock Status Register */
#define AT91_PMC_PCK (1 << 0) /* Processor Clock */
#define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */
#define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */
@@ -34,17 +46,17 @@
#define AT91_PMC_HCK0 (1 << 16) /* AHB Clock (USB host) [AT91SAM9261 only] */
#define AT91_PMC_HCK1 (1 << 17) /* AHB Clock (LCD) [AT91SAM9261 only] */
-#define AT91_PMC_PCER (AT91_PMC + 0x10) /* Peripheral Clock Enable Register */
-#define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */
-#define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */
+#define AT91_PMC_PCER 0x10 /* Peripheral Clock Enable Register */
+#define AT91_PMC_PCDR 0x14 /* Peripheral Clock Disable Register */
+#define AT91_PMC_PCSR 0x18 /* Peripheral Clock Status Register */
-#define AT91_CKGR_UCKR (AT91_PMC + 0x1C) /* UTMI Clock Register [some SAM9] */
+#define AT91_CKGR_UCKR 0x1C /* UTMI Clock Register [some SAM9] */
#define AT91_PMC_UPLLEN (1 << 16) /* UTMI PLL Enable */
#define AT91_PMC_UPLLCOUNT (0xf << 20) /* UTMI PLL Start-up Time */
#define AT91_PMC_BIASEN (1 << 24) /* UTMI BIAS Enable */
#define AT91_PMC_BIASCOUNT (0xf << 28) /* UTMI BIAS Start-up Time */
-#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */
+#define AT91_CKGR_MOR 0x20 /* Main Oscillator Register [not on SAM9RL] */
#define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */
#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass */
#define AT91_PMC_MOSCRCEN (1 << 3) /* Main On-Chip RC Oscillator Enable [some SAM9] */
@@ -53,12 +65,12 @@
#define AT91_PMC_MOSCSEL (1 << 24) /* Main Oscillator Selection [some SAM9] */
#define AT91_PMC_CFDEN (1 << 25) /* Clock Failure Detector Enable [some SAM9] */
-#define AT91_CKGR_MCFR (AT91_PMC + 0x24) /* Main Clock Frequency Register */
+#define AT91_CKGR_MCFR 0x24 /* Main Clock Frequency Register */
#define AT91_PMC_MAINF (0xffff << 0) /* Main Clock Frequency */
#define AT91_PMC_MAINRDY (1 << 16) /* Main Clock Ready */
-#define AT91_CKGR_PLLAR (AT91_PMC + 0x28) /* PLL A Register */
-#define AT91_CKGR_PLLBR (AT91_PMC + 0x2c) /* PLL B Register */
+#define AT91_CKGR_PLLAR 0x28 /* PLL A Register */
+#define AT91_CKGR_PLLBR 0x2c /* PLL B Register */
#define AT91_PMC_DIV (0xff << 0) /* Divider */
#define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */
#define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */
@@ -69,7 +81,7 @@
#define AT91_PMC_USBDIV_4 (2 << 28)
#define AT91_PMC_USB96M (1 << 28) /* Divider by 2 Enable (PLLB only) */
-#define AT91_PMC_MCKR (AT91_PMC + 0x30) /* Master Clock Register */
+#define AT91_PMC_MCKR 0x30 /* Master Clock Register */
#define AT91_PMC_CSS (3 << 0) /* Master Clock Selection */
#define AT91_PMC_CSS_SLOW (0 << 0)
#define AT91_PMC_CSS_MAIN (1 << 0)
@@ -111,27 +123,27 @@
#define AT91_PMC_PLLADIV2_OFF (0 << 12)
#define AT91_PMC_PLLADIV2_ON (1 << 12)
-#define AT91_PMC_USB (AT91_PMC + 0x38) /* USB Clock Register [some SAM9 only] */
+#define AT91_PMC_USB 0x38 /* USB Clock Register [some SAM9 only] */
#define AT91_PMC_USBS (0x1 << 0) /* USB OHCI Input clock selection */
#define AT91_PMC_USBS_PLLA (0 << 0)
#define AT91_PMC_USBS_UPLL (1 << 0)
#define AT91_PMC_OHCIUSBDIV (0xF << 8) /* Divider for USB OHCI Clock */
-#define AT91_PMC_SMD (AT91_PMC + 0x3c) /* Soft Modem Clock Register [some SAM9 only] */
+#define AT91_PMC_SMD 0x3c /* Soft Modem Clock Register [some SAM9 only] */
#define AT91_PMC_SMDS (0x1 << 0) /* SMD input clock selection */
#define AT91_PMC_SMD_DIV (0x1f << 8) /* SMD input clock divider */
#define AT91_PMC_SMDDIV(n) (((n) << 8) & AT91_PMC_SMD_DIV)
-#define AT91_PMC_PCKR(n) (AT91_PMC + 0x40 + ((n) * 4)) /* Programmable Clock 0-N Registers */
+#define AT91_PMC_PCKR(n) (0x40 + ((n) * 4)) /* Programmable Clock 0-N Registers */
#define AT91_PMC_ALT_PCKR_CSS (0x7 << 0) /* Programmable Clock Source Selection [alternate length] */
#define AT91_PMC_CSS_MASTER (4 << 0) /* [some SAM9 only] */
#define AT91_PMC_CSSMCK (0x1 << 8) /* CSS or Master Clock Selection */
#define AT91_PMC_CSSMCK_CSS (0 << 8)
#define AT91_PMC_CSSMCK_MCK (1 << 8)
-#define AT91_PMC_IER (AT91_PMC + 0x60) /* Interrupt Enable Register */
-#define AT91_PMC_IDR (AT91_PMC + 0x64) /* Interrupt Disable Register */
-#define AT91_PMC_SR (AT91_PMC + 0x68) /* Status Register */
+#define AT91_PMC_IER 0x60 /* Interrupt Enable Register */
+#define AT91_PMC_IDR 0x64 /* Interrupt Disable Register */
+#define AT91_PMC_SR 0x68 /* Status Register */
#define AT91_PMC_MOSCS (1 << 0) /* MOSCS Flag */
#define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */
#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */
@@ -144,18 +156,18 @@
#define AT91_PMC_MOSCSELS (1 << 16) /* Main Oscillator Selection [some SAM9] */
#define AT91_PMC_MOSCRCS (1 << 17) /* Main On-Chip RC [some SAM9] */
#define AT91_PMC_CFDEV (1 << 18) /* Clock Failure Detector Event [some SAM9] */
-#define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */
+#define AT91_PMC_IMR 0x6c /* Interrupt Mask Register */
-#define AT91_PMC_PROT (AT91_PMC + 0xe4) /* Write Protect Mode Register [some SAM9] */
+#define AT91_PMC_PROT 0xe4 /* Write Protect Mode Register [some SAM9] */
#define AT91_PMC_WPEN (0x1 << 0) /* Write Protect Enable */
#define AT91_PMC_WPKEY (0xffffff << 8) /* Write Protect Key */
#define AT91_PMC_PROTKEY (0x504d43 << 8) /* Activation Code */
-#define AT91_PMC_WPSR (AT91_PMC + 0xe8) /* Write Protect Status Register [some SAM9] */
+#define AT91_PMC_WPSR 0xe8 /* Write Protect Status Register [some SAM9] */
#define AT91_PMC_WPVS (0x1 << 0) /* Write Protect Violation Status */
#define AT91_PMC_WPVSRC (0xffff << 8) /* Write Protect Violation Source */
-#define AT91_PMC_PCR (AT91_PMC + 0x10c) /* Peripheral Control Register [some SAM9] */
+#define AT91_PMC_PCR 0x10c /* Peripheral Control Register [some SAM9] */
#define AT91_PMC_PCR_PID (0x3f << 0) /* Peripheral ID */
#define AT91_PMC_PCR_CMD (0x1 << 12) /* Command */
#define AT91_PMC_PCR_DIV (0x3 << 16) /* Divisor Value */
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h
index 32d57be..603e6aa 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200.h
@@ -77,10 +77,8 @@
/*
- * System Peripherals (offset from AT91_BASE_SYS)
+ * System Peripherals
*/
-#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */
-
#define AT91RM9200_BASE_DBGU AT91_BASE_DBGU0 /* Debug Unit */
#define AT91RM9200_BASE_PIOA 0xfffff400 /* PIO Controller A */
#define AT91RM9200_BASE_PIOB 0xfffff600 /* PIO Controller B */
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index c5b6b3b..1524e87 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -80,7 +80,6 @@
/*
* System Peripherals (offset from AT91_BASE_SYS)
*/
-#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
#define AT91SAM9260_BASE_ECC 0xffffe800
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
index a269cef..a6a3c1d 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -65,7 +65,6 @@
/*
* System Peripherals (offset from AT91_BASE_SYS)
*/
-#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
#define AT91SAM9261_BASE_SMC 0xffffec00
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
index bccba0b..dda083d 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -74,7 +74,6 @@
/*
* System Peripherals (offset from AT91_BASE_SYS)
*/
-#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
#define AT91SAM9263_BASE_ECC0 0xffffe000
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index dfc4570..a824e15 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -86,7 +86,6 @@
/*
* System Peripherals (offset from AT91_BASE_SYS)
*/
-#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
#define AT91SAM9G45_BASE_ECC 0xffffe200
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index de960dc..2d7176a 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -69,7 +69,6 @@
/*
* System Peripherals (offset from AT91_BASE_SYS)
*/
-#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS)
#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5.h b/arch/arm/mach-at91/include/mach/at91sam9x5.h
index 96f25f5..a297a77 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9x5.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9x5.h
@@ -55,10 +55,9 @@
#define AT91SAM9X5_BASE_USART2 0xf8024000
/*
- * System Peripherals (offset from AT91_BASE_SYS)
+ * System Peripherals
*/
#define AT91SAM9X5_BASE_DDRSDRC0 0xffffe800
-#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
/*
* Base addresses for early serial code (uncompress.h)
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index fd7dce4..e9e29a6 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -59,9 +59,10 @@
/*
* On all at91 have the Advanced Interrupt Controller starts at address
- * 0xfffff000
+ * 0xfffff000 and the Power Management Controller starts at 0xfffffc00
*/
#define AT91_AIC 0xfffff000
+#define AT91_PMC 0xfffffc00
/*
* Peripheral identifiers/interrupts.
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 83a0051..44f4b08 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -136,7 +136,7 @@ static int at91_pm_verify_clocks(void)
unsigned long scsr;
int i;
- scsr = at91_sys_read(AT91_PMC_SCSR);
+ scsr = at91_pmc_read(AT91_PMC_SCSR);
/* USB must not be using PLLB */
if (cpu_is_at91rm9200()) {
@@ -160,7 +160,7 @@ static int at91_pm_verify_clocks(void)
if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
continue;
- css = at91_sys_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
+ css = at91_pmc_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
if (css != AT91_PMC_CSS_SLOW) {
pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
return 0;
@@ -197,7 +197,6 @@ extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0,
extern u32 at91_slow_clock_sz;
#endif
-static void __iomem *at91_pmc_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_PMC);
void __iomem *at91_ramc_base[2];
void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
@@ -208,7 +207,7 @@ void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
}
at91_ramc_base[id] = ioremap(addr, size);
if (!at91_ramc_base[id])
- pr_warn("Impossible to ioremap ramc.%d 0x%x\n", id, addr);
+ panic("Impossible to ioremap ramc.%d 0x%x\n", id, addr);
}
static int at91_pm_enter(suspend_state_t state)
@@ -218,7 +217,7 @@ static int at91_pm_enter(suspend_state_t state)
pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
/* remember all the always-wake irqs */
- (at91_sys_read(AT91_PMC_PCSR)
+ (at91_pmc_read(AT91_PMC_PCSR)
| (1 << AT91_ID_FIQ)
| (1 << AT91_ID_SYS)
| (at91_extern_irq))
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 17f4d72..abb9214 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -54,7 +54,7 @@
1: sub tmp2, tmp2, #1
cmp tmp2, #0
beq 2f
- ldr tmp1, [pmc, #(AT91_PMC_SR - AT91_PMC)]
+ ldr tmp1, [pmc, #AT91_PMC_SR]
tst tmp1, #AT91_PMC_MCKRDY
beq 1b
2:
@@ -68,7 +68,7 @@
1: sub tmp2, tmp2, #1
cmp tmp2, #0
beq 2f
- ldr tmp1, [pmc, #(AT91_PMC_SR - AT91_PMC)]
+ ldr tmp1, [pmc, #AT91_PMC_SR]
tst tmp1, #AT91_PMC_MOSCS
beq 1b
2:
@@ -82,7 +82,7 @@
1: sub tmp2, tmp2, #1
cmp tmp2, #0
beq 2f
- ldr tmp1, [pmc, #(AT91_PMC_SR - AT91_PMC)]
+ ldr tmp1, [pmc, #AT91_PMC_SR]
tst tmp1, #AT91_PMC_LOCKA
beq 1b
2:
@@ -96,7 +96,7 @@
1: sub tmp2, tmp2, #1
cmp tmp2, #0
beq 2f
- ldr tmp1, [pmc, #(AT91_PMC_SR - AT91_PMC)]
+ ldr tmp1, [pmc, #AT91_PMC_SR]
tst tmp1, #AT91_PMC_LOCKB
beq 1b
2:
@@ -176,14 +176,14 @@ sdr_sr_enable:
sdr_sr_done:
/* Save Master clock setting */
- ldr tmp1, [pmc, #(AT91_PMC_MCKR - AT91_PMC)]
+ ldr tmp1, [pmc, #AT91_PMC_MCKR]
str tmp1, .saved_mckr
/*
* Set the Master clock source to slow clock
*/
bic tmp1, tmp1, #AT91_PMC_CSS
- str tmp1, [pmc, #(AT91_PMC_MCKR - AT91_PMC)]
+ str tmp1, [pmc, #AT91_PMC_MCKR]
wait_mckrdy
@@ -194,44 +194,44 @@ sdr_sr_done:
* See AT91RM9200 errata #27 and #28 for details.
*/
mov tmp1, #0
- str tmp1, [pmc, #(AT91_PMC_MCKR - AT91_PMC)]
+ str tmp1, [pmc, #AT91_PMC_MCKR]
wait_mckrdy
#endif
/* Save PLLA setting and disable it */
- ldr tmp1, [pmc, #(AT91_CKGR_PLLAR - AT91_PMC)]
+ ldr tmp1, [pmc, #AT91_CKGR_PLLAR]
str tmp1, .saved_pllar
mov tmp1, #AT91_PMC_PLLCOUNT
orr tmp1, tmp1, #(1 << 29) /* bit 29 always set */
- str tmp1, [pmc, #(AT91_CKGR_PLLAR - AT91_PMC)]
+ str tmp1, [pmc, #AT91_CKGR_PLLAR]
/* Save PLLB setting and disable it */
- ldr tmp1, [pmc, #(AT91_CKGR_PLLBR - AT91_PMC)]
+ ldr tmp1, [pmc, #AT91_CKGR_PLLBR]
str tmp1, .saved_pllbr
mov tmp1, #AT91_PMC_PLLCOUNT
- str tmp1, [pmc, #(AT91_CKGR_PLLBR - AT91_PMC)]
+ str tmp1, [pmc, #AT91_CKGR_PLLBR]
/* Turn off the main oscillator */
- ldr tmp1, [pmc, #(AT91_CKGR_MOR - AT91_PMC)]
+ ldr tmp1, [pmc, #AT91_CKGR_MOR]
bic tmp1, tmp1, #AT91_PMC_MOSCEN
- str tmp1, [pmc, #(AT91_CKGR_MOR - AT91_PMC)]
+ str tmp1, [pmc, #AT91_CKGR_MOR]
/* Wait for interrupt */
mcr p15, 0, tmp1, c7, c0, 4
/* Turn on the main oscillator */
- ldr tmp1, [pmc, #(AT91_CKGR_MOR - AT91_PMC)]
+ ldr tmp1, [pmc, #AT91_CKGR_MOR]
orr tmp1, tmp1, #AT91_PMC_MOSCEN
- str tmp1, [pmc, #(AT91_CKGR_MOR - AT91_PMC)]
+ str tmp1, [pmc, #AT91_CKGR_MOR]
wait_moscrdy
/* Restore PLLB setting */
ldr tmp1, .saved_pllbr
- str tmp1, [pmc, #(AT91_CKGR_PLLBR - AT91_PMC)]
+ str tmp1, [pmc, #AT91_CKGR_PLLBR]
tst tmp1, #(AT91_PMC_MUL & 0xff0000)
bne 1f
@@ -243,7 +243,7 @@ sdr_sr_done:
/* Restore PLLA setting */
ldr tmp1, .saved_pllar
- str tmp1, [pmc, #(AT91_CKGR_PLLAR - AT91_PMC)]
+ str tmp1, [pmc, #AT91_CKGR_PLLAR]
tst tmp1, #(AT91_PMC_MUL & 0xff0000)
bne 3f
@@ -264,7 +264,7 @@ sdr_sr_done:
tst tmp1, #AT91_PMC_PRES
beq 2f
and tmp1, tmp1, #AT91_PMC_PRES
- str tmp1, [pmc, #(AT91_PMC_MCKR - AT91_PMC)]
+ str tmp1, [pmc, #AT91_PMC_MCKR]
wait_mckrdy
#endif
@@ -273,7 +273,7 @@ sdr_sr_done:
* Restore master clock setting
*/
2: ldr tmp1, .saved_mckr
- str tmp1, [pmc, #(AT91_PMC_MCKR - AT91_PMC)]
+ str tmp1, [pmc, #AT91_PMC_MCKR]
wait_mckrdy
diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
index e2fb6d5..ce9dffb 100644
--- a/drivers/usb/gadget/atmel_usba_udc.c
+++ b/drivers/usb/gadget/atmel_usba_udc.c
@@ -332,12 +332,12 @@ static int vbus_is_present(struct usba_udc *udc)
static void toggle_bias(int is_on)
{
- unsigned int uckr = at91_sys_read(AT91_CKGR_UCKR);
+ unsigned int uckr = at91_pmc_read(AT91_CKGR_UCKR);
if (is_on)
- at91_sys_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN);
+ at91_pmc_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN);
else
- at91_sys_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN));
+ at91_pmc_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN));
}
#else
--
1.7.9
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [PATCH 11/18] ARM: at91/rtc-at91sam9: each SoC can select the RTT device to use
2012-02-17 17:49 ` [PATCH 01/18] ARM: at91: factorise duplicated at91sam9 idle Nicolas Ferre
` (8 preceding siblings ...)
2012-02-17 17:50 ` [PATCH 10/18] ARM: at91/PMC: make register base soc independent Nicolas Ferre
@ 2012-02-17 17:50 ` Nicolas Ferre
2012-02-20 0:32 ` Ryan Mallon
2012-02-17 17:50 ` [PATCH 12/18] ARM: at91:rtc/rtc-at91sam9: ioremap register bank Nicolas Ferre
` (6 subsequent siblings)
16 siblings, 1 reply; 43+ messages in thread
From: Nicolas Ferre @ 2012-02-17 17:50 UTC (permalink / raw)
To: plagnioj, linux-arm-kernel; +Cc: linux-kernel
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
For the RTT as RTC driver rtc-at91sam9, the platform_device structure
is filled during SoC initialization. This will allow to convert this
RTC driver as a standard platform driver.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
arch/arm/mach-at91/at91sam9260_devices.c | 11 +++++
arch/arm/mach-at91/at91sam9261_devices.c | 10 +++++
arch/arm/mach-at91/at91sam9263_devices.c | 25 ++++++++++++
arch/arm/mach-at91/at91sam9g45_devices.c | 10 +++++
arch/arm/mach-at91/at91sam9rl_devices.c | 10 +++++
drivers/rtc/rtc-at91sam9.c | 61 ++++-------------------------
6 files changed, 75 insertions(+), 52 deletions(-)
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index b93a337..2071017 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -728,8 +728,19 @@ static struct platform_device at91sam9260_rtt_device = {
.num_resources = ARRAY_SIZE(rtt_resources),
};
+
+#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
+static void __init at91_add_device_rtt_rtc(void)
+{
+ at91sam9260_rtt_device.name = "rtc-at91sam9";
+}
+#else
+static void __init at91_add_device_rtt_rtc(void) {}
+#endif
+
static void __init at91_add_device_rtt(void)
{
+ at91_add_device_rtt_rtc();
platform_device_register(&at91sam9260_rtt_device);
}
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 52c1f1a..b3ceb97 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -614,8 +614,18 @@ static struct platform_device at91sam9261_rtt_device = {
.num_resources = ARRAY_SIZE(rtt_resources),
};
+#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
+static void __init at91_add_device_rtt_rtc(void)
+{
+ at91sam9261_rtt_device.name = "rtc-at91sam9";
+}
+#else
+static void __init at91_add_device_rtt_rtc(void) {}
+#endif
+
static void __init at91_add_device_rtt(void)
{
+ at91_add_device_rtt_rtc();
platform_device_register(&at91sam9261_rtt_device);
}
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 545826b..b4a6adb 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -992,8 +992,33 @@ static struct platform_device at91sam9263_rtt1_device = {
.num_resources = ARRAY_SIZE(rtt1_resources),
};
+#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
+static void __init at91_add_device_rtt_rtc(void)
+{
+ struct platform_device *pdev;
+
+ switch (CONFIG_RTC_DRV_AT91SAM9_RTT) {
+ case 0:
+ pdev = &at91sam9263_rtt0_device;
+ break;
+ case 1:
+ pdev = &at91sam9263_rtt1_device;
+ break;
+ default:
+ pr_err("at91sam9263: support only 2 RTT (%d)\n",
+ CONFIG_RTC_DRV_AT91SAM9_RTT);
+ return;
+ }
+
+ pdev->name = "rtc-at91sam9";
+}
+#else
+static void __init at91_add_device_rtt_rtc(void) {}
+#endif
+
static void __init at91_add_device_rtt(void)
{
+ at91_add_device_rtt_rtc();
platform_device_register(&at91sam9263_rtt0_device);
platform_device_register(&at91sam9263_rtt1_device);
}
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 8c036ff..81d1adf 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -1204,8 +1204,18 @@ static struct platform_device at91sam9g45_rtt_device = {
.num_resources = ARRAY_SIZE(rtt_resources),
};
+#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
+static void __init at91_add_device_rtt_rtc(void)
+{
+ at91sam9g45_rtt_device.name = "rtc-at91sam9";
+}
+#else
+static void __init at91_add_device_rtt_rtc(void) {}
+#endif
+
static void __init at91_add_device_rtt(void)
{
+ at91_add_device_rtt_rtc();
platform_device_register(&at91sam9g45_rtt_device);
}
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 936cf20..dd248c8 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -693,8 +693,18 @@ static struct platform_device at91sam9rl_rtt_device = {
.num_resources = ARRAY_SIZE(rtt_resources),
};
+#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
+static void __init at91_add_device_rtt_rtc(void)
+{
+ at91sam9rl_rtt_device.name = "rtc-at91sam9";
+}
+#else
+static void __init at91_add_device_rtt_rtc(void) {}
+#endif
+
static void __init at91_add_device_rtt(void)
{
+ at91_add_device_rtt_rtc();
platform_device_register(&at91sam9rl_rtt_device);
}
diff --git a/drivers/rtc/rtc-at91sam9.c b/drivers/rtc/rtc-at91sam9.c
index a3ad957..65896a3 100644
--- a/drivers/rtc/rtc-at91sam9.c
+++ b/drivers/rtc/rtc-at91sam9.c
@@ -287,7 +287,7 @@ static const struct rtc_class_ops at91_rtc_ops = {
/*
* Initialize and install RTC driver
*/
-static int __init at91_rtc_probe(struct platform_device *pdev)
+static int __devinit at91_rtc_probe(struct platform_device *pdev)
{
struct resource *r;
struct sam9_rtc *rtc;
@@ -360,7 +360,7 @@ fail:
/*
* Disable and remove the RTC driver
*/
-static int __exit at91_rtc_remove(struct platform_device *pdev)
+static int __devexit at91_rtc_remove(struct platform_device *pdev)
{
struct sam9_rtc *rtc = platform_get_drvdata(pdev);
u32 mr = rtt_readl(rtc, MR);
@@ -433,63 +433,20 @@ static int at91_rtc_resume(struct platform_device *pdev)
#endif
static struct platform_driver at91_rtc_driver = {
- .driver.name = "rtc-at91sam9",
- .driver.owner = THIS_MODULE,
- .remove = __exit_p(at91_rtc_remove),
+ .probe = at91_rtc_probe,
+ .remove = __devexit_p(at91_rtc_remove),
.shutdown = at91_rtc_shutdown,
.suspend = at91_rtc_suspend,
.resume = at91_rtc_resume,
+ .driver = {
+ .name = "rtc-at91sam9",
+ .owner = THIS_MODULE,
+ },
};
-/* Chips can have more than one RTT module, and they can be used for more
- * than just RTCs. So we can't just register as "the" RTT driver.
- *
- * A normal approach in such cases is to create a library to allocate and
- * free the modules. Here we just use bus_find_device() as like such a
- * library, binding directly ... no runtime "library" footprint is needed.
- */
-static int __init at91_rtc_match(struct device *dev, void *v)
-{
- struct platform_device *pdev = to_platform_device(dev);
- int ret;
-
- /* continue searching if this isn't the RTT we need */
- if (strcmp("at91_rtt", pdev->name) != 0
- || pdev->id != CONFIG_RTC_DRV_AT91SAM9_RTT)
- goto fail;
-
- /* else we found it ... but fail unless we can bind to the RTC driver */
- if (dev->driver) {
- dev_dbg(dev, "busy, can't use as RTC!\n");
- goto fail;
- }
- dev->driver = &at91_rtc_driver.driver;
- if (device_attach(dev) == 0) {
- dev_dbg(dev, "can't attach RTC!\n");
- goto fail;
- }
- ret = at91_rtc_probe(pdev);
- if (ret == 0)
- return true;
-
- dev_dbg(dev, "RTC probe err %d!\n", ret);
-fail:
- return false;
-}
-
static int __init at91_rtc_init(void)
{
- int status;
- struct device *rtc;
-
- status = platform_driver_register(&at91_rtc_driver);
- if (status)
- return status;
- rtc = bus_find_device(&platform_bus_type, NULL,
- NULL, at91_rtc_match);
- if (!rtc)
- platform_driver_unregister(&at91_rtc_driver);
- return rtc ? 0 : -ENODEV;
+ return platform_driver_register(&at91_rtc_driver);
}
module_init(at91_rtc_init);
--
1.7.9
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [PATCH 12/18] ARM: at91:rtc/rtc-at91sam9: ioremap register bank
2012-02-17 17:49 ` [PATCH 01/18] ARM: at91: factorise duplicated at91sam9 idle Nicolas Ferre
` (9 preceding siblings ...)
2012-02-17 17:50 ` [PATCH 11/18] ARM: at91/rtc-at91sam9: each SoC can select the RTT device to use Nicolas Ferre
@ 2012-02-17 17:50 ` Nicolas Ferre
2012-02-17 17:50 ` [PATCH 13/18] ARM: at91/rtc-at91sam9: pass the GPBR to use via ressources Nicolas Ferre
` (5 subsequent siblings)
16 siblings, 0 replies; 43+ messages in thread
From: Nicolas Ferre @ 2012-02-17 17:50 UTC (permalink / raw)
To: plagnioj, linux-arm-kernel; +Cc: linux-kernel
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Instead of computing virtual address with AT91_VA_BASE_SYS, use the
appropriate ioremap() call on the driver "memory" resource.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
drivers/rtc/rtc-at91sam9.c | 13 ++++++++++---
1 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/rtc/rtc-at91sam9.c b/drivers/rtc/rtc-at91sam9.c
index 65896a3..08b69fd 100644
--- a/drivers/rtc/rtc-at91sam9.c
+++ b/drivers/rtc/rtc-at91sam9.c
@@ -307,8 +307,12 @@ static int __devinit at91_rtc_probe(struct platform_device *pdev)
device_init_wakeup(&pdev->dev, 1);
platform_set_drvdata(pdev, rtc);
- rtc->rtt = (void __force __iomem *) (AT91_VA_BASE_SYS - AT91_BASE_SYS);
- rtc->rtt += r->start;
+ rtc->rtt = ioremap(r->start, resource_size(r));
+ if (!rtc->rtt) {
+ dev_err(&pdev->dev, "failed to map registers, aborting.\n");
+ ret = -ENOMEM;
+ goto fail;
+ }
mr = rtt_readl(rtc, MR);
@@ -326,7 +330,7 @@ static int __devinit at91_rtc_probe(struct platform_device *pdev)
&at91_rtc_ops, THIS_MODULE);
if (IS_ERR(rtc->rtcdev)) {
ret = PTR_ERR(rtc->rtcdev);
- goto fail;
+ goto fail_register;
}
/* register irq handler after we know what name we'll use */
@@ -351,6 +355,8 @@ static int __devinit at91_rtc_probe(struct platform_device *pdev)
return 0;
+fail_register:
+ iounmap(rtc->rtt);
fail:
platform_set_drvdata(pdev, NULL);
kfree(rtc);
@@ -371,6 +377,7 @@ static int __devexit at91_rtc_remove(struct platform_device *pdev)
rtc_device_unregister(rtc->rtcdev);
+ iounmap(rtc->rtt);
platform_set_drvdata(pdev, NULL);
kfree(rtc);
return 0;
--
1.7.9
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [PATCH 13/18] ARM: at91/rtc-at91sam9: pass the GPBR to use via ressources
2012-02-17 17:49 ` [PATCH 01/18] ARM: at91: factorise duplicated at91sam9 idle Nicolas Ferre
` (10 preceding siblings ...)
2012-02-17 17:50 ` [PATCH 12/18] ARM: at91:rtc/rtc-at91sam9: ioremap register bank Nicolas Ferre
@ 2012-02-17 17:50 ` Nicolas Ferre
2012-02-20 0:43 ` Ryan Mallon
2012-02-17 17:50 ` [PATCH 14/18] ARM: at91: finally drop at91_sys_read/write Nicolas Ferre
` (4 subsequent siblings)
16 siblings, 1 reply; 43+ messages in thread
From: Nicolas Ferre @ 2012-02-17 17:50 UTC (permalink / raw)
To: plagnioj, linux-arm-kernel; +Cc: linux-kernel
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The GPBR registers are used for storing RTC values. The GPBR registers
to use are now provided using standard resource entry. The array is
filled in SoC specific code.
rtc-at91sam9 RTT as RTC driver is modified to retrieve this information.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
arch/arm/mach-at91/at91sam9260_devices.c | 10 +++++++-
arch/arm/mach-at91/at91sam9261_devices.c | 8 ++++++-
arch/arm/mach-at91/at91sam9263_devices.c | 16 +++++++++++--
arch/arm/mach-at91/at91sam9g45_devices.c | 8 ++++++-
arch/arm/mach-at91/at91sam9rl_devices.c | 8 ++++++-
arch/arm/mach-at91/include/mach/at91sam9260.h | 5 +--
arch/arm/mach-at91/include/mach/at91sam9261.h | 5 +--
arch/arm/mach-at91/include/mach/at91sam9263.h | 5 +--
arch/arm/mach-at91/include/mach/at91sam9g45.h | 5 +--
arch/arm/mach-at91/include/mach/at91sam9rl.h | 2 +-
drivers/rtc/rtc-at91sam9.c | 29 +++++++++++++++++++++---
11 files changed, 76 insertions(+), 25 deletions(-)
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 2071017..ae2b648 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -718,14 +718,16 @@ static struct resource rtt_resources[] = {
.start = AT91SAM9260_BASE_RTT,
.end = AT91SAM9260_BASE_RTT + SZ_16 - 1,
.flags = IORESOURCE_MEM,
- }
+ }, {
+ .flags = IORESOURCE_MEM,
+ },
};
static struct platform_device at91sam9260_rtt_device = {
.name = "at91_rtt",
.id = 0,
.resource = rtt_resources,
- .num_resources = ARRAY_SIZE(rtt_resources),
+ .num_resources = 1,
};
@@ -733,6 +735,10 @@ static struct platform_device at91sam9260_rtt_device = {
static void __init at91_add_device_rtt_rtc(void)
{
at91sam9260_rtt_device.name = "rtc-at91sam9";
+ at91sam9260_rtt_device.num_resources++;
+ rtt_resources[1].start = AT91SAM9260_BASE_GPBR +
+ 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
+ rtt_resources[1].end = rtt_resources[1].start + 3;
}
#else
static void __init at91_add_device_rtt_rtc(void) {}
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index b3ceb97..57dca50 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -604,6 +604,8 @@ static struct resource rtt_resources[] = {
.start = AT91SAM9261_BASE_RTT,
.end = AT91SAM9261_BASE_RTT + SZ_16 - 1,
.flags = IORESOURCE_MEM,
+ }, {
+ .flags = IORESOURCE_MEM,
}
};
@@ -611,13 +613,17 @@ static struct platform_device at91sam9261_rtt_device = {
.name = "at91_rtt",
.id = 0,
.resource = rtt_resources,
- .num_resources = ARRAY_SIZE(rtt_resources),
+ .num_resources = 1,
};
#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
static void __init at91_add_device_rtt_rtc(void)
{
at91sam9261_rtt_device.name = "rtc-at91sam9";
+ at91sam9261_rtt_device.num_resources++;
+ rtt_resources[1].start = AT91SAM9261_BASE_GPBR +
+ 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
+ rtt_resources[1].end = rtt_resources[1].start + 3;
}
#else
static void __init at91_add_device_rtt_rtc(void) {}
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index b4a6adb..d042f91 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -967,6 +967,8 @@ static struct resource rtt0_resources[] = {
.start = AT91SAM9263_BASE_RTT0,
.end = AT91SAM9263_BASE_RTT0 + SZ_16 - 1,
.flags = IORESOURCE_MEM,
+ }, {
+ .flags = IORESOURCE_MEM,
}
};
@@ -974,7 +976,7 @@ static struct platform_device at91sam9263_rtt0_device = {
.name = "at91_rtt",
.id = 0,
.resource = rtt0_resources,
- .num_resources = ARRAY_SIZE(rtt0_resources),
+ .num_resources = 1,
};
static struct resource rtt1_resources[] = {
@@ -982,6 +984,8 @@ static struct resource rtt1_resources[] = {
.start = AT91SAM9263_BASE_RTT1,
.end = AT91SAM9263_BASE_RTT1 + SZ_16 - 1,
.flags = IORESOURCE_MEM,
+ }, {
+ .flags = IORESOURCE_MEM,
}
};
@@ -989,28 +993,34 @@ static struct platform_device at91sam9263_rtt1_device = {
.name = "at91_rtt",
.id = 1,
.resource = rtt1_resources,
- .num_resources = ARRAY_SIZE(rtt1_resources),
+ .num_resources = 1,
};
#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
static void __init at91_add_device_rtt_rtc(void)
{
struct platform_device *pdev;
+ struct resource *r;
switch (CONFIG_RTC_DRV_AT91SAM9_RTT) {
case 0:
pdev = &at91sam9263_rtt0_device;
+ r = rtt0_resources;
break;
case 1:
pdev = &at91sam9263_rtt1_device;
+ r = rtt1_resources;
break;
default:
pr_err("at91sam9263: support only 2 RTT (%d)\n",
- CONFIG_RTC_DRV_AT91SAM9_RTT);
+ CONFIG_RTC_DRV_AT91SAM9_RTT);
return;
}
+ r[1].start = AT91SAM9263_BASE_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
+ r[1].end = r[1].start + 3;
pdev->name = "rtc-at91sam9";
+ pdev->num_resources++;
}
#else
static void __init at91_add_device_rtt_rtc(void) {}
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 81d1adf..d184ae4 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -1194,6 +1194,8 @@ static struct resource rtt_resources[] = {
.start = AT91SAM9G45_BASE_RTT,
.end = AT91SAM9G45_BASE_RTT + SZ_16 - 1,
.flags = IORESOURCE_MEM,
+ }, {
+ .flags = IORESOURCE_MEM,
}
};
@@ -1201,13 +1203,17 @@ static struct platform_device at91sam9g45_rtt_device = {
.name = "at91_rtt",
.id = 0,
.resource = rtt_resources,
- .num_resources = ARRAY_SIZE(rtt_resources),
+ .num_resources = 1,
};
#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
static void __init at91_add_device_rtt_rtc(void)
{
at91sam9g45_rtt_device.name = "rtc-at91sam9";
+ at91sam9g45_rtt_device.num_resources++;
+ rtt_resources[1].start = AT91SAM9G45_BASE_GPBR +
+ 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
+ rtt_resources[1].end = rtt_resources[1].start + 3;
}
#else
static void __init at91_add_device_rtt_rtc(void) {}
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index dd248c8..285dc6b 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -683,6 +683,8 @@ static struct resource rtt_resources[] = {
.start = AT91SAM9RL_BASE_RTT,
.end = AT91SAM9RL_BASE_RTT + SZ_16 - 1,
.flags = IORESOURCE_MEM,
+ }, {
+ .flags = IORESOURCE_MEM,
}
};
@@ -690,13 +692,17 @@ static struct platform_device at91sam9rl_rtt_device = {
.name = "at91_rtt",
.id = 0,
.resource = rtt_resources,
- .num_resources = ARRAY_SIZE(rtt_resources),
+ .num_resources = 1,
};
#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
static void __init at91_add_device_rtt_rtc(void)
{
at91sam9rl_rtt_device.name = "rtc-at91sam9";
+ at91sam9rl_rtt_device.num_resources++;
+ rtt_resources[1].start = AT91SAM9RL_BASE_GPBR +
+ 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
+ rtt_resources[1].end = rtt_resources[1].start + 3;
}
#else
static void __init at91_add_device_rtt_rtc(void) {}
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index 1524e87..2e47b6d 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -78,10 +78,8 @@
#define AT91SAM9260_BASE_ADC 0xfffe0000
/*
- * System Peripherals (offset from AT91_BASE_SYS)
+ * System Peripherals
*/
-#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
-
#define AT91SAM9260_BASE_ECC 0xffffe800
#define AT91SAM9260_BASE_SDRAMC 0xffffea00
#define AT91SAM9260_BASE_SMC 0xffffec00
@@ -95,6 +93,7 @@
#define AT91SAM9260_BASE_RTT 0xfffffd20
#define AT91SAM9260_BASE_PIT 0xfffffd30
#define AT91SAM9260_BASE_WDT 0xfffffd40
+#define AT91SAM9260_BASE_GPBR 0xfffffd50
#define AT91_USART0 AT91SAM9260_BASE_US0
#define AT91_USART1 AT91SAM9260_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
index a6a3c1d..44fbdc1 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -63,10 +63,8 @@
/*
- * System Peripherals (offset from AT91_BASE_SYS)
+ * System Peripherals
*/
-#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
-
#define AT91SAM9261_BASE_SMC 0xffffec00
#define AT91SAM9261_BASE_MATRIX 0xffffee00
#define AT91SAM9261_BASE_SDRAMC 0xffffea00
@@ -79,6 +77,7 @@
#define AT91SAM9261_BASE_RTT 0xfffffd20
#define AT91SAM9261_BASE_PIT 0xfffffd30
#define AT91SAM9261_BASE_WDT 0xfffffd40
+#define AT91SAM9261_BASE_GPBR 0xfffffd50
#define AT91_USART0 AT91SAM9261_BASE_US0
#define AT91_USART1 AT91SAM9261_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
index dda083d..d96cbb2 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -72,10 +72,8 @@
#define AT91SAM9263_BASE_2DGE 0xfffc8000
/*
- * System Peripherals (offset from AT91_BASE_SYS)
+ * System Peripherals
*/
-#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
-
#define AT91SAM9263_BASE_ECC0 0xffffe000
#define AT91SAM9263_BASE_SDRAMC0 0xffffe200
#define AT91SAM9263_BASE_SMC0 0xffffe400
@@ -95,6 +93,7 @@
#define AT91SAM9263_BASE_PIT 0xfffffd30
#define AT91SAM9263_BASE_WDT 0xfffffd40
#define AT91SAM9263_BASE_RTT1 0xfffffd50
+#define AT91SAM9263_BASE_GPBR 0xfffffd60
#define AT91_USART0 AT91SAM9263_BASE_US0
#define AT91_USART1 AT91SAM9263_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index a824e15..d052abc 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -84,10 +84,8 @@
#define AT91SAM9G45_BASE_TC5 0xfffd4080
/*
- * System Peripherals (offset from AT91_BASE_SYS)
+ * System Peripherals
*/
-#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
-
#define AT91SAM9G45_BASE_ECC 0xffffe200
#define AT91SAM9G45_BASE_DDRSDRC1 0xffffe400
#define AT91SAM9G45_BASE_DDRSDRC0 0xffffe600
@@ -106,6 +104,7 @@
#define AT91SAM9G45_BASE_PIT 0xfffffd30
#define AT91SAM9G45_BASE_WDT 0xfffffd40
#define AT91SAM9G45_BASE_RTC 0xfffffdb0
+#define AT91SAM9G45_BASE_GPBR 0xfffffd60
#define AT91_USART0 AT91SAM9G45_BASE_US0
#define AT91_USART1 AT91SAM9G45_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index 2d7176a..e0073eb 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -70,7 +70,6 @@
* System Peripherals (offset from AT91_BASE_SYS)
*/
#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS)
-#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
#define AT91SAM9RL_BASE_DMA 0xffffe600
#define AT91SAM9RL_BASE_ECC 0xffffe800
@@ -87,6 +86,7 @@
#define AT91SAM9RL_BASE_RTT 0xfffffd20
#define AT91SAM9RL_BASE_PIT 0xfffffd30
#define AT91SAM9RL_BASE_WDT 0xfffffd40
+#define AT91SAM9RL_BASE_GPBR 0xfffffd60
#define AT91SAM9RL_BASE_RTC 0xfffffe00
#define AT91_USART0 AT91SAM9RL_BASE_US0
diff --git a/drivers/rtc/rtc-at91sam9.c b/drivers/rtc/rtc-at91sam9.c
index 08b69fd..d49feff 100644
--- a/drivers/rtc/rtc-at91sam9.c
+++ b/drivers/rtc/rtc-at91sam9.c
@@ -57,6 +57,7 @@ struct sam9_rtc {
void __iomem *rtt;
struct rtc_device *rtcdev;
u32 imr;
+ void __iomem *gpbr;
};
#define rtt_readl(rtc, field) \
@@ -65,9 +66,9 @@ struct sam9_rtc {
__raw_writel((val), (rtc)->rtt + AT91_RTT_ ## field)
#define gpbr_readl(rtc) \
- at91_sys_read(AT91_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR)
+ __raw_readl((rtc)->gpbr)
#define gpbr_writel(rtc, val) \
- at91_sys_write(AT91_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR, (val))
+ __raw_writel((val), (rtc)->gpbr)
/*
* Read current time and date in RTC
@@ -289,14 +290,17 @@ static const struct rtc_class_ops at91_rtc_ops = {
*/
static int __devinit at91_rtc_probe(struct platform_device *pdev)
{
- struct resource *r;
+ struct resource *r, *r_gpbr;
struct sam9_rtc *rtc;
int ret;
u32 mr;
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!r)
+ r_gpbr = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ if (!r || !r_gpbr) {
+ dev_err(&pdev->dev, "need 2 ressources\n");
return -ENODEV;
+ }
rtc = kzalloc(sizeof *rtc, GFP_KERNEL);
if (!rtc)
@@ -314,6 +318,20 @@ static int __devinit at91_rtc_probe(struct platform_device *pdev)
goto fail;
}
+ rtc->rtt = ioremap(r->start, resource_size(r));
+ if (!rtc->rtt) {
+ dev_err(&pdev->dev, "failed to map registers, aborting.\n");
+ ret = -ENOMEM;
+ goto fail;
+ }
+
+ rtc->gpbr = ioremap(r_gpbr->start, resource_size(r_gpbr));
+ if (!rtc->gpbr) {
+ dev_err(&pdev->dev, "failed to map gpbr registers, aborting.\n");
+ ret = -ENOMEM;
+ goto fail_gpbr;
+ }
+
mr = rtt_readl(rtc, MR);
/* unless RTT is counting at 1 Hz, re-initialize it */
@@ -356,6 +374,8 @@ static int __devinit at91_rtc_probe(struct platform_device *pdev)
return 0;
fail_register:
+ iounmap(rtc->gpbr);
+fail_gpbr:
iounmap(rtc->rtt);
fail:
platform_set_drvdata(pdev, NULL);
@@ -377,6 +397,7 @@ static int __devexit at91_rtc_remove(struct platform_device *pdev)
rtc_device_unregister(rtc->rtcdev);
+ iounmap(rtc->gpbr);
iounmap(rtc->rtt);
platform_set_drvdata(pdev, NULL);
kfree(rtc);
--
1.7.9
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [PATCH 14/18] ARM: at91: finally drop at91_sys_read/write
2012-02-17 17:49 ` [PATCH 01/18] ARM: at91: factorise duplicated at91sam9 idle Nicolas Ferre
` (11 preceding siblings ...)
2012-02-17 17:50 ` [PATCH 13/18] ARM: at91/rtc-at91sam9: pass the GPBR to use via ressources Nicolas Ferre
@ 2012-02-17 17:50 ` Nicolas Ferre
2012-02-17 17:50 ` [PATCH 15/18] ARM: at91: merge SRAM Memory banks thanks to mirroring Nicolas Ferre
` (3 subsequent siblings)
16 siblings, 0 replies; 43+ messages in thread
From: Nicolas Ferre @ 2012-02-17 17:50 UTC (permalink / raw)
To: plagnioj, linux-arm-kernel; +Cc: linux-kernel
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Remove at91_sys_read/write() from io.h file. This function
is not used anymore and was a stopper on the way to single
zImage kernel for AT91.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
arch/arm/mach-at91/include/mach/io.h | 18 ------------------
1 files changed, 0 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h
index 4ca09ef..4003001 100644
--- a/arch/arm/mach-at91/include/mach/io.h
+++ b/arch/arm/mach-at91/include/mach/io.h
@@ -28,22 +28,4 @@
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
-#ifndef __ASSEMBLY__
-
-static inline unsigned int at91_sys_read(unsigned int reg_offset)
-{
- void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
-
- return __raw_readl(addr + reg_offset);
-}
-
-static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
-{
- void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
-
- __raw_writel(value, addr + reg_offset);
-}
-
-#endif
-
#endif
--
1.7.9
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [PATCH 15/18] ARM: at91: merge SRAM Memory banks thanks to mirroring
2012-02-17 17:49 ` [PATCH 01/18] ARM: at91: factorise duplicated at91sam9 idle Nicolas Ferre
` (12 preceding siblings ...)
2012-02-17 17:50 ` [PATCH 14/18] ARM: at91: finally drop at91_sys_read/write Nicolas Ferre
@ 2012-02-17 17:50 ` Nicolas Ferre
2012-02-17 17:50 ` [PATCH 16/18] Atmel: move console default platform_device to serial driver Nicolas Ferre
` (2 subsequent siblings)
16 siblings, 0 replies; 43+ messages in thread
From: Nicolas Ferre @ 2012-02-17 17:50 UTC (permalink / raw)
To: plagnioj, linux-arm-kernel; +Cc: linux-kernel
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
On at91sam9260 and at91sam9g20 the SRAM banks are mirrored. We can
merge them together to be able to have bigger and continuous
internal RAM.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
arch/arm/mach-at91/at91sam9260.c | 13 +++++--------
arch/arm/mach-at91/include/mach/at91sam9260.h | 4 ++++
2 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 14882ae..4ade265 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -310,15 +310,12 @@ static void __init at91sam9xe_map_io(void)
static void __init at91sam9260_map_io(void)
{
- if (cpu_is_at91sam9xe()) {
+ if (cpu_is_at91sam9xe())
at91sam9xe_map_io();
- } else if (cpu_is_at91sam9g20()) {
- at91_init_sram(0, AT91SAM9G20_SRAM0_BASE, AT91SAM9G20_SRAM0_SIZE);
- at91_init_sram(1, AT91SAM9G20_SRAM1_BASE, AT91SAM9G20_SRAM1_SIZE);
- } else {
- at91_init_sram(0, AT91SAM9260_SRAM0_BASE, AT91SAM9260_SRAM0_SIZE);
- at91_init_sram(1, AT91SAM9260_SRAM1_BASE, AT91SAM9260_SRAM1_SIZE);
- }
+ else if (cpu_is_at91sam9g20())
+ at91_init_sram(0, AT91SAM9G20_SRAM_BASE, AT91SAM9G20_SRAM_SIZE);
+ else
+ at91_init_sram(0, AT91SAM9260_SRAM_BASE, AT91SAM9260_SRAM_SIZE);
}
static void __init at91sam9260_ioremap_registers(void)
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index 2e47b6d..08ae9af 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -113,6 +113,8 @@
#define AT91SAM9260_SRAM0_SIZE SZ_4K /* Internal SRAM 0 size (4Kb) */
#define AT91SAM9260_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */
#define AT91SAM9260_SRAM1_SIZE SZ_4K /* Internal SRAM 1 size (4Kb) */
+#define AT91SAM9260_SRAM_BASE 0x002FF000 /* Internal SRAM base address */
+#define AT91SAM9260_SRAM_SIZE SZ_8K /* Internal SRAM size (8Kb) */
#define AT91SAM9260_UHP_BASE 0x00500000 /* USB Host controller */
@@ -126,6 +128,8 @@
#define AT91SAM9G20_SRAM0_SIZE SZ_16K /* Internal SRAM 0 size (16Kb) */
#define AT91SAM9G20_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */
#define AT91SAM9G20_SRAM1_SIZE SZ_16K /* Internal SRAM 1 size (16Kb) */
+#define AT91SAM9G20_SRAM_BASE 0x002FC000 /* Internal SRAM base address */
+#define AT91SAM9G20_SRAM_SIZE SZ_32K /* Internal SRAM size (32Kb) */
#define AT91SAM9G20_UHP_BASE 0x00500000 /* USB Host controller */
--
1.7.9
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [PATCH 16/18] Atmel: move console default platform_device to serial driver
2012-02-17 17:49 ` [PATCH 01/18] ARM: at91: factorise duplicated at91sam9 idle Nicolas Ferre
` (13 preceding siblings ...)
2012-02-17 17:50 ` [PATCH 15/18] ARM: at91: merge SRAM Memory banks thanks to mirroring Nicolas Ferre
@ 2012-02-17 17:50 ` Nicolas Ferre
2012-02-18 9:17 ` Hans-Christian Egtvedt
2012-02-17 17:50 ` [PATCH 17/18] ARM: at91/board-dt: drop default console Nicolas Ferre
2012-02-17 17:50 ` [PATCH 18/18] ARM: at91/board-dt: move at91_initialize() to init_irq() Nicolas Ferre
16 siblings, 1 reply; 43+ messages in thread
From: Nicolas Ferre @ 2012-02-17 17:50 UTC (permalink / raw)
To: plagnioj, linux-arm-kernel; +Cc: linux-kernel, Hans-Christian Egtvedt, kernel
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This variable spread on every SoC that is using the atmel_serial.c
driver can be included directly into the latter.
This will allow to compile multiple soc in the same kernel.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no>
Cc: kernel@avr32linux.org
---
arch/arm/mach-at91/at91rm9200_devices.c | 1 -
arch/arm/mach-at91/at91sam9260_devices.c | 1 -
arch/arm/mach-at91/at91sam9261_devices.c | 1 -
arch/arm/mach-at91/at91sam9263_devices.c | 1 -
arch/arm/mach-at91/at91sam9g45_devices.c | 1 -
arch/arm/mach-at91/at91sam9rl_devices.c | 1 -
arch/arm/mach-at91/at91sam9x5.c | 1 -
arch/avr32/mach-at32ap/at32ap700x.c | 2 --
drivers/tty/serial/atmel_serial.c | 2 ++
9 files changed, 2 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index aca272b..640520c 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -1115,7 +1115,6 @@ static inline void configure_usart3_pins(unsigned pins)
}
static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
-struct platform_device *atmel_default_console_device; /* the serial console device */
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
{
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index ae2b648..f8a88fb 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -1157,7 +1157,6 @@ static inline void configure_usart5_pins(void)
}
static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
-struct platform_device *atmel_default_console_device; /* the serial console device */
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
{
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 57dca50..32a20ef 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -1008,7 +1008,6 @@ static inline void configure_usart2_pins(unsigned pins)
}
static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
-struct platform_device *atmel_default_console_device; /* the serial console device */
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
{
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index d042f91..28cb074 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -1414,7 +1414,6 @@ static inline void configure_usart2_pins(unsigned pins)
}
static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
-struct platform_device *atmel_default_console_device; /* the serial console device */
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
{
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index d184ae4..bb7e2ce 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -1676,7 +1676,6 @@ static inline void configure_usart3_pins(unsigned pins)
}
static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
-struct platform_device *atmel_default_console_device; /* the serial console device */
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
{
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 285dc6b..16fd20b 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -1145,7 +1145,6 @@ static inline void configure_usart3_pins(unsigned pins)
}
static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
-struct platform_device *atmel_default_console_device; /* the serial console device */
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
{
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index 67b37a0..90bb7ec 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -320,7 +320,6 @@ void __init at91sam9x5_initialize(void)
* -------------------------------------------------------------------- */
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
void __init at91_set_serial_console(unsigned portnr) {}
-struct platform_device *atmel_default_console_device = NULL;
void __init at91_add_device_nand(struct atmel_nand_data *data) {}
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index 402a7bb..889c544 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -1055,8 +1055,6 @@ struct platform_device *__init at32_add_device_usart(unsigned int id)
return at32_usarts[id];
}
-struct platform_device *atmel_default_console_device;
-
void __init at32_setup_serial_console(unsigned int usart_id)
{
atmel_default_console_device = at32_usarts[usart_id];
diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index 10605ec..f9a6be7 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -1526,6 +1526,8 @@ void __init atmel_register_uart_fns(struct atmel_port_fns *fns)
atmel_pops.set_wake = fns->set_wake;
}
+struct platform_device *atmel_default_console_device; /* the serial console device */
+
#ifdef CONFIG_SERIAL_ATMEL_CONSOLE
static void atmel_console_putchar(struct uart_port *port, int ch)
{
--
1.7.9
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [PATCH 17/18] ARM: at91/board-dt: drop default console
2012-02-17 17:49 ` [PATCH 01/18] ARM: at91: factorise duplicated at91sam9 idle Nicolas Ferre
` (14 preceding siblings ...)
2012-02-17 17:50 ` [PATCH 16/18] Atmel: move console default platform_device to serial driver Nicolas Ferre
@ 2012-02-17 17:50 ` Nicolas Ferre
2012-02-17 17:50 ` [PATCH 18/18] ARM: at91/board-dt: move at91_initialize() to init_irq() Nicolas Ferre
16 siblings, 0 replies; 43+ messages in thread
From: Nicolas Ferre @ 2012-02-17 17:50 UTC (permalink / raw)
To: plagnioj, linux-arm-kernel; +Cc: linux-kernel
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This default console mechanism is not used if the console is selected
by command line (console= parameter).
Dropping this will simplify the compilation of multiple SoC in the same
kernel image.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
arch/arm/mach-at91/at91sam9x5.c | 3 ---
arch/arm/mach-at91/board-dt.c | 6 ------
2 files changed, 0 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index 90bb7ec..d17d426 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -318,9 +318,6 @@ void __init at91sam9x5_initialize(void)
/* --------------------------------------------------------------------
* AT91SAM9x5 devices (temporary before modification of code)
* -------------------------------------------------------------------- */
-void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
-void __init at91_set_serial_console(unsigned portnr) {}
-
void __init at91_add_device_nand(struct atmel_nand_data *data) {}
/* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c
index 0579315..08c8ad8 100644
--- a/arch/arm/mach-at91/board-dt.c
+++ b/arch/arm/mach-at91/board-dt.c
@@ -38,12 +38,6 @@ static void __init ek_init_early(void)
{
/* Initialize processor: 12.000 MHz crystal */
at91_initialize(12000000);
-
- /* DGBU on ttyS0. (Rx & Tx only) */
- at91_register_uart(0, 0, 0);
-
- /* set serial console to ttyS0 (ie, DBGU) */
- at91_set_serial_console(0);
}
/* det_pin is not connected */
--
1.7.9
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [PATCH 18/18] ARM: at91/board-dt: move at91_initialize() to init_irq()
2012-02-17 17:49 ` [PATCH 01/18] ARM: at91: factorise duplicated at91sam9 idle Nicolas Ferre
` (15 preceding siblings ...)
2012-02-17 17:50 ` [PATCH 17/18] ARM: at91/board-dt: drop default console Nicolas Ferre
@ 2012-02-17 17:50 ` Nicolas Ferre
16 siblings, 0 replies; 43+ messages in thread
From: Nicolas Ferre @ 2012-02-17 17:50 UTC (permalink / raw)
To: plagnioj, linux-arm-kernel; +Cc: linux-kernel
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Remove the need for at91_initialize() to be called at init_early().
We move it to init_irq() function as we still need it before the
timer initialization.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
arch/arm/mach-at91/board-dt.c | 10 +++-------
1 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c
index 08c8ad8..8868b3c 100644
--- a/arch/arm/mach-at91/board-dt.c
+++ b/arch/arm/mach-at91/board-dt.c
@@ -34,12 +34,6 @@
#include "generic.h"
-static void __init ek_init_early(void)
-{
- /* Initialize processor: 12.000 MHz crystal */
- at91_initialize(12000000);
-}
-
/* det_pin is not connected */
static struct atmel_nand_data __initdata ek_nand_data = {
.ale = 21,
@@ -89,6 +83,9 @@ static const struct of_device_id aic_of_match[] __initconst = {
static void __init at91_dt_init_irq(void)
{
+ /* Initialize processor: 12.000 MHz crystal */
+ at91_initialize(12000000);
+
irq_domain_generate_simple(aic_of_match, 0xfffff000, 0);
at91_init_irq_default();
}
@@ -112,7 +109,6 @@ DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)")
/* Maintainer: Atmel */
.timer = &at91sam926x_timer,
.map_io = at91_map_io,
- .init_early = ek_init_early,
.init_irq = at91_dt_init_irq,
.init_machine = at91_dt_device_init,
.dt_compat = at91_dt_board_compat,
--
1.7.9
^ permalink raw reply related [flat|nested] 43+ messages in thread
* Re: [PATCH 16/18] Atmel: move console default platform_device to serial driver
2012-02-17 17:50 ` [PATCH 16/18] Atmel: move console default platform_device to serial driver Nicolas Ferre
@ 2012-02-18 9:17 ` Hans-Christian Egtvedt
2012-02-19 7:07 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 43+ messages in thread
From: Hans-Christian Egtvedt @ 2012-02-18 9:17 UTC (permalink / raw)
To: Nicolas Ferre; +Cc: plagnioj, linux-arm-kernel, linux-kernel, kernel
Around Fri 17 Feb 2012 18:50:08 +0100 or thereabout, Nicolas Ferre wrote:
> From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
>
> This variable spread on every SoC that is using the atmel_serial.c
> driver can be included directly into the latter.
>
> This will allow to compile multiple soc in the same kernel.
Sounds like a good idea, but...
<snipp AT91 changes>
> diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
> index 402a7bb..889c544 100644
> --- a/arch/avr32/mach-at32ap/at32ap700x.c
> +++ b/arch/avr32/mach-at32ap/at32ap700x.c
> @@ -1055,8 +1055,6 @@ struct platform_device *__init at32_add_device_usart(unsigned int id)
> return at32_usarts[id];
> }
>
> -struct platform_device *atmel_default_console_device;
> -
> void __init at32_setup_serial_console(unsigned int usart_id)
> {
> atmel_default_console_device = at32_usarts[usart_id];
I doubt this assignment will work if you remove the struct above. I did not
look at how AT91 does this, will it be similar affected?
> diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
> index 10605ec..f9a6be7 100644
> --- a/drivers/tty/serial/atmel_serial.c
> +++ b/drivers/tty/serial/atmel_serial.c
> @@ -1526,6 +1526,8 @@ void __init atmel_register_uart_fns(struct atmel_port_fns *fns)
> atmel_pops.set_wake = fns->set_wake;
> }
>
> +struct platform_device *atmel_default_console_device; /* the serial console device */
> +
> #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
> static void atmel_console_putchar(struct uart_port *port, int ch)
> {
--
mvh
Hans-Christian Egtvedt
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH 16/18] Atmel: move console default platform_device to serial driver
2012-02-18 9:17 ` Hans-Christian Egtvedt
@ 2012-02-19 7:07 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 0 replies; 43+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-02-19 7:07 UTC (permalink / raw)
To: Hans-Christian Egtvedt
Cc: Nicolas Ferre, linux-arm-kernel, linux-kernel, kernel
On 10:17 Sat 18 Feb , Hans-Christian Egtvedt wrote:
> Around Fri 17 Feb 2012 18:50:08 +0100 or thereabout, Nicolas Ferre wrote:
> > From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> >
> > This variable spread on every SoC that is using the atmel_serial.c
> > driver can be included directly into the latter.
> >
> > This will allow to compile multiple soc in the same kernel.
>
> Sounds like a good idea, but...
>
> <snipp AT91 changes>
>
> > diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
> > index 402a7bb..889c544 100644
> > --- a/arch/avr32/mach-at32ap/at32ap700x.c
> > +++ b/arch/avr32/mach-at32ap/at32ap700x.c
> > @@ -1055,8 +1055,6 @@ struct platform_device *__init at32_add_device_usart(unsigned int id)
> > return at32_usarts[id];
> > }
> >
> > -struct platform_device *atmel_default_console_device;
> > -
> > void __init at32_setup_serial_console(unsigned int usart_id)
> > {
> > atmel_default_console_device = at32_usarts[usart_id];
>
> I doubt this assignment will work if you remove the struct above. I did not
> look at how AT91 does this, will it be similar affected?
none the still exist in the kernel, its just moved
Best Regards,
J.
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH 04/18] ARM: at91: make ST (System Timer) soc independent
2012-02-17 17:49 ` [PATCH 04/18] ARM: at91: make ST (System Timer) " Nicolas Ferre
@ 2012-02-20 0:22 ` Ryan Mallon
2012-02-20 1:38 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 43+ messages in thread
From: Ryan Mallon @ 2012-02-20 0:22 UTC (permalink / raw)
To: Nicolas Ferre; +Cc: plagnioj, linux-arm-kernel, linux-kernel
On 18/02/12 04:49, Nicolas Ferre wrote:
> From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
>
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> ---
> arch/arm/mach-at91/at91rm9200.c | 4 +-
> arch/arm/mach-at91/at91rm9200_time.c | 37 ++++++++++++++++----------
> arch/arm/mach-at91/generic.h | 1 +
> arch/arm/mach-at91/include/mach/at91_st.h | 32 +++++++++++++++-------
> arch/arm/mach-at91/include/mach/at91rm9200.h | 2 +-
> drivers/watchdog/at91rm9200_wdt.c | 8 +++---
> 6 files changed, 53 insertions(+), 31 deletions(-)
>
> diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
Hi Jean, Nicolas,
Patch looks mostly good, couple of points below.
~Ryan
<snip>
> /* Cancel any pending alarm; flush any pending IRQ */
> - at91_sys_write(AT91_ST_RTAR, alm);
> - (void) at91_sys_read(AT91_ST_SR);
> + at91_st_write(AT91_ST_RTAR, alm);
> + (void) at91_st_read(AT91_ST_SR);
Can we please remove the (void) casting of the return value when making
this change, especially since at91_st_read is now a macro which doesn't
even have a return value. Same in a few other places.
>
> /* Schedule alarm by writing RTAR. */
> alm += delta;
> - at91_sys_write(AT91_ST_RTAR, alm);
> + at91_st_write(AT91_ST_RTAR, alm);
>
> return status;
> }
> @@ -175,15 +175,24 @@ static struct clock_event_device clkevt = {
> .set_mode = clkevt32k_mode,
> };
>
> +void __iomem *at91_st_base;
> +
> +void __init at91rm9200_ioremap_st(u32 addr)
> +{
> + at91_st_base = ioremap(AT91RM9200_BASE_ST, 256);
> + if (!at91_st_base)
> + panic("Impossible to ioremap ST\n");
> +}
I can't see anything in this patch which calls this function? Also, why
is it extern? Can't it just be moved to whichever file is going to call
it and make it static there?
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH 10/18] ARM: at91/PMC: make register base soc independent
2012-02-17 17:50 ` [PATCH 10/18] ARM: at91/PMC: make register base soc independent Nicolas Ferre
@ 2012-02-20 0:27 ` Ryan Mallon
0 siblings, 0 replies; 43+ messages in thread
From: Ryan Mallon @ 2012-02-20 0:27 UTC (permalink / raw)
To: Nicolas Ferre; +Cc: plagnioj, linux-arm-kernel, linux-kernel
On 18/02/12 04:50, Nicolas Ferre wrote:
> From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
>
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Looks good,
Reviewed-by: Ryan Mallon <rmallon@gmail.com>
> ---
> arch/arm/mach-at91/at91rm9200.c | 2 +-
> arch/arm/mach-at91/clock.c | 75 +++++++++++++------------
> arch/arm/mach-at91/include/mach/at91_pmc.h | 56 +++++++++++-------
> arch/arm/mach-at91/include/mach/at91rm9200.h | 4 +-
> arch/arm/mach-at91/include/mach/at91sam9260.h | 1 -
> arch/arm/mach-at91/include/mach/at91sam9261.h | 1 -
> arch/arm/mach-at91/include/mach/at91sam9263.h | 1 -
> arch/arm/mach-at91/include/mach/at91sam9g45.h | 1 -
> arch/arm/mach-at91/include/mach/at91sam9rl.h | 1 -
> arch/arm/mach-at91/include/mach/at91sam9x5.h | 3 +-
> arch/arm/mach-at91/include/mach/hardware.h | 3 +-
> arch/arm/mach-at91/pm.c | 9 +--
> arch/arm/mach-at91/pm_slowclock.S | 38 ++++++------
> drivers/usb/gadget/atmel_usba_udc.c | 6 +-
> 14 files changed, 105 insertions(+), 96 deletions(-)
>
> diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
> index 94141b2..c7efa17 100644
> --- a/arch/arm/mach-at91/at91rm9200.c
> +++ b/arch/arm/mach-at91/at91rm9200.c
> @@ -295,7 +295,7 @@ static void at91rm9200_idle(void)
> * Disable the processor clock. The processor will be automatically
> * re-enabled by an interrupt or by a reset.
> */
> - at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
> + at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK);
> }
>
> static void at91rm9200_restart(char mode, const char *cmd)
> diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
> index d1b4e07..57b15a9 100644
> --- a/arch/arm/mach-at91/clock.c
> +++ b/arch/arm/mach-at91/clock.c
> @@ -33,6 +33,7 @@
> #include "clock.h"
> #include "generic.h"
>
> +void __iomem *at91_pmc_base;
>
> /*
> * There's a lot more which can be done with clocks, including cpufreq
> @@ -125,11 +126,11 @@ static void pllb_mode(struct clk *clk, int is_on)
> value = 0;
>
> // REVISIT: Add work-around for AT91RM9200 Errata #26 ?
> - at91_sys_write(AT91_CKGR_PLLBR, value);
> + at91_pmc_write(AT91_CKGR_PLLBR, value);
>
> do {
> cpu_relax();
> - } while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != is_on);
> + } while ((at91_pmc_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != is_on);
> }
>
> static struct clk pllb = {
> @@ -144,24 +145,24 @@ static struct clk pllb = {
> static void pmc_sys_mode(struct clk *clk, int is_on)
> {
> if (is_on)
> - at91_sys_write(AT91_PMC_SCER, clk->pmc_mask);
> + at91_pmc_write(AT91_PMC_SCER, clk->pmc_mask);
> else
> - at91_sys_write(AT91_PMC_SCDR, clk->pmc_mask);
> + at91_pmc_write(AT91_PMC_SCDR, clk->pmc_mask);
> }
>
> static void pmc_uckr_mode(struct clk *clk, int is_on)
> {
> - unsigned int uckr = at91_sys_read(AT91_CKGR_UCKR);
> + unsigned int uckr = at91_pmc_read(AT91_CKGR_UCKR);
>
> if (is_on) {
> is_on = AT91_PMC_LOCKU;
> - at91_sys_write(AT91_CKGR_UCKR, uckr | clk->pmc_mask);
> + at91_pmc_write(AT91_CKGR_UCKR, uckr | clk->pmc_mask);
> } else
> - at91_sys_write(AT91_CKGR_UCKR, uckr & ~(clk->pmc_mask));
> + at91_pmc_write(AT91_CKGR_UCKR, uckr & ~(clk->pmc_mask));
>
> do {
> cpu_relax();
> - } while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKU) != is_on);
> + } while ((at91_pmc_read(AT91_PMC_SR) & AT91_PMC_LOCKU) != is_on);
> }
>
> /* USB function clocks (PLLB must be 48 MHz) */
> @@ -197,9 +198,9 @@ struct clk mck = {
> static void pmc_periph_mode(struct clk *clk, int is_on)
> {
> if (is_on)
> - at91_sys_write(AT91_PMC_PCER, clk->pmc_mask);
> + at91_pmc_write(AT91_PMC_PCER, clk->pmc_mask);
> else
> - at91_sys_write(AT91_PMC_PCDR, clk->pmc_mask);
> + at91_pmc_write(AT91_PMC_PCDR, clk->pmc_mask);
> }
>
> static struct clk __init *at91_css_to_clk(unsigned long css)
> @@ -359,10 +360,10 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
> if (actual && actual <= rate) {
> u32 pckr;
>
> - pckr = at91_sys_read(AT91_PMC_PCKR(clk->id));
> + pckr = at91_pmc_read(AT91_PMC_PCKR(clk->id));
> pckr &= css_mask; /* keep clock selection */
> pckr |= prescale << prescale_offset;
> - at91_sys_write(AT91_PMC_PCKR(clk->id), pckr);
> + at91_pmc_write(AT91_PMC_PCKR(clk->id), pckr);
> clk->rate_hz = actual;
> break;
> }
> @@ -396,7 +397,7 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
>
> clk->rate_hz = parent->rate_hz;
> clk->parent = parent;
> - at91_sys_write(AT91_PMC_PCKR(clk->id), parent->id);
> + at91_pmc_write(AT91_PMC_PCKR(clk->id), parent->id);
>
> spin_unlock_irqrestore(&clk_lock, flags);
> return 0;
> @@ -415,7 +416,7 @@ static void __init init_programmable_clock(struct clk *clk)
> else
> css_mask = AT91_PMC_CSS;
>
> - pckr = at91_sys_read(AT91_PMC_PCKR(clk->id));
> + pckr = at91_pmc_read(AT91_PMC_PCKR(clk->id));
> parent = at91_css_to_clk(pckr & css_mask);
> clk->parent = parent;
> clk->rate_hz = parent->rate_hz / pmc_prescaler_divider(pckr);
> @@ -432,19 +433,19 @@ static int at91_clk_show(struct seq_file *s, void *unused)
> u32 scsr, pcsr, uckr = 0, sr;
> struct clk *clk;
>
> - seq_printf(s, "SCSR = %8x\n", scsr = at91_sys_read(AT91_PMC_SCSR));
> - seq_printf(s, "PCSR = %8x\n", pcsr = at91_sys_read(AT91_PMC_PCSR));
> - seq_printf(s, "MOR = %8x\n", at91_sys_read(AT91_CKGR_MOR));
> - seq_printf(s, "MCFR = %8x\n", at91_sys_read(AT91_CKGR_MCFR));
> - seq_printf(s, "PLLA = %8x\n", at91_sys_read(AT91_CKGR_PLLAR));
> + seq_printf(s, "SCSR = %8x\n", scsr = at91_pmc_read(AT91_PMC_SCSR));
> + seq_printf(s, "PCSR = %8x\n", pcsr = at91_pmc_read(AT91_PMC_PCSR));
> + seq_printf(s, "MOR = %8x\n", at91_pmc_read(AT91_CKGR_MOR));
> + seq_printf(s, "MCFR = %8x\n", at91_pmc_read(AT91_CKGR_MCFR));
> + seq_printf(s, "PLLA = %8x\n", at91_pmc_read(AT91_CKGR_PLLAR));
> if (cpu_has_pllb())
> - seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR));
> + seq_printf(s, "PLLB = %8x\n", at91_pmc_read(AT91_CKGR_PLLBR));
> if (cpu_has_utmi())
> - seq_printf(s, "UCKR = %8x\n", uckr = at91_sys_read(AT91_CKGR_UCKR));
> - seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR));
> + seq_printf(s, "UCKR = %8x\n", uckr = at91_pmc_read(AT91_CKGR_UCKR));
> + seq_printf(s, "MCKR = %8x\n", at91_pmc_read(AT91_PMC_MCKR));
> if (cpu_has_upll())
> - seq_printf(s, "USB = %8x\n", at91_sys_read(AT91_PMC_USB));
> - seq_printf(s, "SR = %8x\n", sr = at91_sys_read(AT91_PMC_SR));
> + seq_printf(s, "USB = %8x\n", at91_pmc_read(AT91_PMC_USB));
> + seq_printf(s, "SR = %8x\n", sr = at91_pmc_read(AT91_PMC_SR));
>
> seq_printf(s, "\n");
>
> @@ -632,14 +633,14 @@ static void __init at91_pllb_usbfs_clock_init(unsigned long main_clock)
> if (cpu_is_at91rm9200()) {
> uhpck.pmc_mask = AT91RM9200_PMC_UHP;
> udpck.pmc_mask = AT91RM9200_PMC_UDP;
> - at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP);
> + at91_pmc_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP);
> } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() ||
> cpu_is_at91sam9263() || cpu_is_at91sam9g20() ||
> cpu_is_at91sam9g10()) {
> uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
> udpck.pmc_mask = AT91SAM926x_PMC_UDP;
> }
> - at91_sys_write(AT91_CKGR_PLLBR, 0);
> + at91_pmc_write(AT91_CKGR_PLLBR, 0);
>
> udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
> uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
> @@ -656,13 +657,13 @@ static void __init at91_upll_usbfs_clock_init(unsigned long main_clock)
> /* Setup divider by 10 to reach 48 MHz */
> usbr |= ((10 - 1) << 8) & AT91_PMC_OHCIUSBDIV;
>
> - at91_sys_write(AT91_PMC_USB, usbr);
> + at91_pmc_write(AT91_PMC_USB, usbr);
>
> /* Now set uhpck values */
> uhpck.parent = &utmi_clk;
> uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
> uhpck.rate_hz = utmi_clk.rate_hz;
> - uhpck.rate_hz /= 1 + ((at91_sys_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8);
> + uhpck.rate_hz /= 1 + ((at91_pmc_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8);
> }
>
> int __init at91_clock_init(unsigned long main_clock)
> @@ -671,6 +672,10 @@ int __init at91_clock_init(unsigned long main_clock)
> int i;
> int pll_overclock = false;
>
> + at91_pmc_base = ioremap(AT91_PMC, 256);
> + if (!at91_pmc_base)
> + panic("Impossible to ioremap AT91_PMC 0x%x\n", AT91_PMC);
> +
> /*
> * When the bootloader initialized the main oscillator correctly,
> * there's no problem using the cycle counter. But if it didn't,
> @@ -679,14 +684,14 @@ int __init at91_clock_init(unsigned long main_clock)
> */
> if (!main_clock) {
> do {
> - tmp = at91_sys_read(AT91_CKGR_MCFR);
> + tmp = at91_pmc_read(AT91_CKGR_MCFR);
> } while (!(tmp & AT91_PMC_MAINRDY));
> main_clock = (tmp & AT91_PMC_MAINF) * (AT91_SLOW_CLOCK / 16);
> }
> main_clk.rate_hz = main_clock;
>
> /* report if PLLA is more than mildly overclocked */
> - plla.rate_hz = at91_pll_rate(&plla, main_clock, at91_sys_read(AT91_CKGR_PLLAR));
> + plla.rate_hz = at91_pll_rate(&plla, main_clock, at91_pmc_read(AT91_CKGR_PLLAR));
> if (cpu_has_300M_plla()) {
> if (plla.rate_hz > 300000000)
> pll_overclock = true;
> @@ -701,7 +706,7 @@ int __init at91_clock_init(unsigned long main_clock)
> pr_info("Clocks: PLLA overclocked, %ld MHz\n", plla.rate_hz / 1000000);
>
> if (cpu_has_plladiv2()) {
> - mckr = at91_sys_read(AT91_PMC_MCKR);
> + mckr = at91_pmc_read(AT91_PMC_MCKR);
> plla.rate_hz /= (1 << ((mckr & AT91_PMC_PLLADIV2) >> 12)); /* plla divisor by 2 */
> }
>
> @@ -741,7 +746,7 @@ int __init at91_clock_init(unsigned long main_clock)
> * MCK and CPU derive from one of those primary clocks.
> * For now, assume this parentage won't change.
> */
> - mckr = at91_sys_read(AT91_PMC_MCKR);
> + mckr = at91_pmc_read(AT91_PMC_MCKR);
> mck.parent = at91_css_to_clk(mckr & AT91_PMC_CSS);
> freq = mck.parent->rate_hz;
> freq /= pmc_prescaler_divider(mckr); /* prescale */
> @@ -814,8 +819,8 @@ static int __init at91_clock_reset(void)
> pr_debug("Clocks: disable unused %s\n", clk->name);
> }
>
> - at91_sys_write(AT91_PMC_PCDR, pcdr);
> - at91_sys_write(AT91_PMC_SCDR, scdr);
> + at91_pmc_write(AT91_PMC_PCDR, pcdr);
> + at91_pmc_write(AT91_PMC_SCDR, scdr);
>
> return 0;
> }
> @@ -823,6 +828,6 @@ late_initcall(at91_clock_reset);
>
> void at91sam9_idle(void)
> {
> - at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
> + at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK);
> cpu_do_idle();
> }
> diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
> index f9fdbbe..3660478 100644
> --- a/arch/arm/mach-at91/include/mach/at91_pmc.h
> +++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
> @@ -16,10 +16,22 @@
> #ifndef AT91_PMC_H
> #define AT91_PMC_H
>
> -#define AT91_PMC_SCER (AT91_PMC + 0x00) /* System Clock Enable Register */
> -#define AT91_PMC_SCDR (AT91_PMC + 0x04) /* System Clock Disable Register */
> +#ifndef __ASSEMBLY__
> +extern void __iomem *at91_pmc_base;
>
> -#define AT91_PMC_SCSR (AT91_PMC + 0x08) /* System Clock Status Register */
> +#define at91_pmc_read(field) \
> + __raw_readl(at91_pmc_base + field)
> +
> +#define at91_pmc_write(field, value) \
> + __raw_writel(value, at91_pmc_base + field)
> +#else
> +.extern at91_aic_base
> +#endif
> +
> +#define AT91_PMC_SCER 0x00 /* System Clock Enable Register */
> +#define AT91_PMC_SCDR 0x04 /* System Clock Disable Register */
> +
> +#define AT91_PMC_SCSR 0x08 /* System Clock Status Register */
> #define AT91_PMC_PCK (1 << 0) /* Processor Clock */
> #define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */
> #define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */
> @@ -34,17 +46,17 @@
> #define AT91_PMC_HCK0 (1 << 16) /* AHB Clock (USB host) [AT91SAM9261 only] */
> #define AT91_PMC_HCK1 (1 << 17) /* AHB Clock (LCD) [AT91SAM9261 only] */
>
> -#define AT91_PMC_PCER (AT91_PMC + 0x10) /* Peripheral Clock Enable Register */
> -#define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */
> -#define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */
> +#define AT91_PMC_PCER 0x10 /* Peripheral Clock Enable Register */
> +#define AT91_PMC_PCDR 0x14 /* Peripheral Clock Disable Register */
> +#define AT91_PMC_PCSR 0x18 /* Peripheral Clock Status Register */
>
> -#define AT91_CKGR_UCKR (AT91_PMC + 0x1C) /* UTMI Clock Register [some SAM9] */
> +#define AT91_CKGR_UCKR 0x1C /* UTMI Clock Register [some SAM9] */
> #define AT91_PMC_UPLLEN (1 << 16) /* UTMI PLL Enable */
> #define AT91_PMC_UPLLCOUNT (0xf << 20) /* UTMI PLL Start-up Time */
> #define AT91_PMC_BIASEN (1 << 24) /* UTMI BIAS Enable */
> #define AT91_PMC_BIASCOUNT (0xf << 28) /* UTMI BIAS Start-up Time */
>
> -#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */
> +#define AT91_CKGR_MOR 0x20 /* Main Oscillator Register [not on SAM9RL] */
> #define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */
> #define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass */
> #define AT91_PMC_MOSCRCEN (1 << 3) /* Main On-Chip RC Oscillator Enable [some SAM9] */
> @@ -53,12 +65,12 @@
> #define AT91_PMC_MOSCSEL (1 << 24) /* Main Oscillator Selection [some SAM9] */
> #define AT91_PMC_CFDEN (1 << 25) /* Clock Failure Detector Enable [some SAM9] */
>
> -#define AT91_CKGR_MCFR (AT91_PMC + 0x24) /* Main Clock Frequency Register */
> +#define AT91_CKGR_MCFR 0x24 /* Main Clock Frequency Register */
> #define AT91_PMC_MAINF (0xffff << 0) /* Main Clock Frequency */
> #define AT91_PMC_MAINRDY (1 << 16) /* Main Clock Ready */
>
> -#define AT91_CKGR_PLLAR (AT91_PMC + 0x28) /* PLL A Register */
> -#define AT91_CKGR_PLLBR (AT91_PMC + 0x2c) /* PLL B Register */
> +#define AT91_CKGR_PLLAR 0x28 /* PLL A Register */
> +#define AT91_CKGR_PLLBR 0x2c /* PLL B Register */
> #define AT91_PMC_DIV (0xff << 0) /* Divider */
> #define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */
> #define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */
> @@ -69,7 +81,7 @@
> #define AT91_PMC_USBDIV_4 (2 << 28)
> #define AT91_PMC_USB96M (1 << 28) /* Divider by 2 Enable (PLLB only) */
>
> -#define AT91_PMC_MCKR (AT91_PMC + 0x30) /* Master Clock Register */
> +#define AT91_PMC_MCKR 0x30 /* Master Clock Register */
> #define AT91_PMC_CSS (3 << 0) /* Master Clock Selection */
> #define AT91_PMC_CSS_SLOW (0 << 0)
> #define AT91_PMC_CSS_MAIN (1 << 0)
> @@ -111,27 +123,27 @@
> #define AT91_PMC_PLLADIV2_OFF (0 << 12)
> #define AT91_PMC_PLLADIV2_ON (1 << 12)
>
> -#define AT91_PMC_USB (AT91_PMC + 0x38) /* USB Clock Register [some SAM9 only] */
> +#define AT91_PMC_USB 0x38 /* USB Clock Register [some SAM9 only] */
> #define AT91_PMC_USBS (0x1 << 0) /* USB OHCI Input clock selection */
> #define AT91_PMC_USBS_PLLA (0 << 0)
> #define AT91_PMC_USBS_UPLL (1 << 0)
> #define AT91_PMC_OHCIUSBDIV (0xF << 8) /* Divider for USB OHCI Clock */
>
> -#define AT91_PMC_SMD (AT91_PMC + 0x3c) /* Soft Modem Clock Register [some SAM9 only] */
> +#define AT91_PMC_SMD 0x3c /* Soft Modem Clock Register [some SAM9 only] */
> #define AT91_PMC_SMDS (0x1 << 0) /* SMD input clock selection */
> #define AT91_PMC_SMD_DIV (0x1f << 8) /* SMD input clock divider */
> #define AT91_PMC_SMDDIV(n) (((n) << 8) & AT91_PMC_SMD_DIV)
>
> -#define AT91_PMC_PCKR(n) (AT91_PMC + 0x40 + ((n) * 4)) /* Programmable Clock 0-N Registers */
> +#define AT91_PMC_PCKR(n) (0x40 + ((n) * 4)) /* Programmable Clock 0-N Registers */
> #define AT91_PMC_ALT_PCKR_CSS (0x7 << 0) /* Programmable Clock Source Selection [alternate length] */
> #define AT91_PMC_CSS_MASTER (4 << 0) /* [some SAM9 only] */
> #define AT91_PMC_CSSMCK (0x1 << 8) /* CSS or Master Clock Selection */
> #define AT91_PMC_CSSMCK_CSS (0 << 8)
> #define AT91_PMC_CSSMCK_MCK (1 << 8)
>
> -#define AT91_PMC_IER (AT91_PMC + 0x60) /* Interrupt Enable Register */
> -#define AT91_PMC_IDR (AT91_PMC + 0x64) /* Interrupt Disable Register */
> -#define AT91_PMC_SR (AT91_PMC + 0x68) /* Status Register */
> +#define AT91_PMC_IER 0x60 /* Interrupt Enable Register */
> +#define AT91_PMC_IDR 0x64 /* Interrupt Disable Register */
> +#define AT91_PMC_SR 0x68 /* Status Register */
> #define AT91_PMC_MOSCS (1 << 0) /* MOSCS Flag */
> #define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */
> #define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */
> @@ -144,18 +156,18 @@
> #define AT91_PMC_MOSCSELS (1 << 16) /* Main Oscillator Selection [some SAM9] */
> #define AT91_PMC_MOSCRCS (1 << 17) /* Main On-Chip RC [some SAM9] */
> #define AT91_PMC_CFDEV (1 << 18) /* Clock Failure Detector Event [some SAM9] */
> -#define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */
> +#define AT91_PMC_IMR 0x6c /* Interrupt Mask Register */
>
> -#define AT91_PMC_PROT (AT91_PMC + 0xe4) /* Write Protect Mode Register [some SAM9] */
> +#define AT91_PMC_PROT 0xe4 /* Write Protect Mode Register [some SAM9] */
> #define AT91_PMC_WPEN (0x1 << 0) /* Write Protect Enable */
> #define AT91_PMC_WPKEY (0xffffff << 8) /* Write Protect Key */
> #define AT91_PMC_PROTKEY (0x504d43 << 8) /* Activation Code */
>
> -#define AT91_PMC_WPSR (AT91_PMC + 0xe8) /* Write Protect Status Register [some SAM9] */
> +#define AT91_PMC_WPSR 0xe8 /* Write Protect Status Register [some SAM9] */
> #define AT91_PMC_WPVS (0x1 << 0) /* Write Protect Violation Status */
> #define AT91_PMC_WPVSRC (0xffff << 8) /* Write Protect Violation Source */
>
> -#define AT91_PMC_PCR (AT91_PMC + 0x10c) /* Peripheral Control Register [some SAM9] */
> +#define AT91_PMC_PCR 0x10c /* Peripheral Control Register [some SAM9] */
> #define AT91_PMC_PCR_PID (0x3f << 0) /* Peripheral ID */
> #define AT91_PMC_PCR_CMD (0x1 << 12) /* Command */
> #define AT91_PMC_PCR_DIV (0x3 << 16) /* Divisor Value */
> diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h
> index 32d57be..603e6aa 100644
> --- a/arch/arm/mach-at91/include/mach/at91rm9200.h
> +++ b/arch/arm/mach-at91/include/mach/at91rm9200.h
> @@ -77,10 +77,8 @@
>
>
> /*
> - * System Peripherals (offset from AT91_BASE_SYS)
> + * System Peripherals
> */
> -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */
> -
> #define AT91RM9200_BASE_DBGU AT91_BASE_DBGU0 /* Debug Unit */
> #define AT91RM9200_BASE_PIOA 0xfffff400 /* PIO Controller A */
> #define AT91RM9200_BASE_PIOB 0xfffff600 /* PIO Controller B */
> diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
> index c5b6b3b..1524e87 100644
> --- a/arch/arm/mach-at91/include/mach/at91sam9260.h
> +++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
> @@ -80,7 +80,6 @@
> /*
> * System Peripherals (offset from AT91_BASE_SYS)
> */
> -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
> #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
>
> #define AT91SAM9260_BASE_ECC 0xffffe800
> diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
> index a269cef..a6a3c1d 100644
> --- a/arch/arm/mach-at91/include/mach/at91sam9261.h
> +++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
> @@ -65,7 +65,6 @@
> /*
> * System Peripherals (offset from AT91_BASE_SYS)
> */
> -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
> #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
>
> #define AT91SAM9261_BASE_SMC 0xffffec00
> diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
> index bccba0b..dda083d 100644
> --- a/arch/arm/mach-at91/include/mach/at91sam9263.h
> +++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
> @@ -74,7 +74,6 @@
> /*
> * System Peripherals (offset from AT91_BASE_SYS)
> */
> -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
> #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
>
> #define AT91SAM9263_BASE_ECC0 0xffffe000
> diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
> index dfc4570..a824e15 100644
> --- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
> +++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
> @@ -86,7 +86,6 @@
> /*
> * System Peripherals (offset from AT91_BASE_SYS)
> */
> -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
> #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
>
> #define AT91SAM9G45_BASE_ECC 0xffffe200
> diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
> index de960dc..2d7176a 100644
> --- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
> +++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
> @@ -69,7 +69,6 @@
> /*
> * System Peripherals (offset from AT91_BASE_SYS)
> */
> -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
> #define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS)
> #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
>
> diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5.h b/arch/arm/mach-at91/include/mach/at91sam9x5.h
> index 96f25f5..a297a77 100644
> --- a/arch/arm/mach-at91/include/mach/at91sam9x5.h
> +++ b/arch/arm/mach-at91/include/mach/at91sam9x5.h
> @@ -55,10 +55,9 @@
> #define AT91SAM9X5_BASE_USART2 0xf8024000
>
> /*
> - * System Peripherals (offset from AT91_BASE_SYS)
> + * System Peripherals
> */
> #define AT91SAM9X5_BASE_DDRSDRC0 0xffffe800
> -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
>
> /*
> * Base addresses for early serial code (uncompress.h)
> diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
> index fd7dce4..e9e29a6 100644
> --- a/arch/arm/mach-at91/include/mach/hardware.h
> +++ b/arch/arm/mach-at91/include/mach/hardware.h
> @@ -59,9 +59,10 @@
>
> /*
> * On all at91 have the Advanced Interrupt Controller starts at address
> - * 0xfffff000
> + * 0xfffff000 and the Power Management Controller starts at 0xfffffc00
> */
> #define AT91_AIC 0xfffff000
> +#define AT91_PMC 0xfffffc00
>
> /*
> * Peripheral identifiers/interrupts.
> diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
> index 83a0051..44f4b08 100644
> --- a/arch/arm/mach-at91/pm.c
> +++ b/arch/arm/mach-at91/pm.c
> @@ -136,7 +136,7 @@ static int at91_pm_verify_clocks(void)
> unsigned long scsr;
> int i;
>
> - scsr = at91_sys_read(AT91_PMC_SCSR);
> + scsr = at91_pmc_read(AT91_PMC_SCSR);
>
> /* USB must not be using PLLB */
> if (cpu_is_at91rm9200()) {
> @@ -160,7 +160,7 @@ static int at91_pm_verify_clocks(void)
> if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
> continue;
>
> - css = at91_sys_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
> + css = at91_pmc_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
> if (css != AT91_PMC_CSS_SLOW) {
> pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
> return 0;
> @@ -197,7 +197,6 @@ extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0,
> extern u32 at91_slow_clock_sz;
> #endif
>
> -static void __iomem *at91_pmc_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_PMC);
> void __iomem *at91_ramc_base[2];
>
> void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
> @@ -208,7 +207,7 @@ void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
> }
> at91_ramc_base[id] = ioremap(addr, size);
> if (!at91_ramc_base[id])
> - pr_warn("Impossible to ioremap ramc.%d 0x%x\n", id, addr);
> + panic("Impossible to ioremap ramc.%d 0x%x\n", id, addr);
> }
>
> static int at91_pm_enter(suspend_state_t state)
> @@ -218,7 +217,7 @@ static int at91_pm_enter(suspend_state_t state)
>
> pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
> /* remember all the always-wake irqs */
> - (at91_sys_read(AT91_PMC_PCSR)
> + (at91_pmc_read(AT91_PMC_PCSR)
> | (1 << AT91_ID_FIQ)
> | (1 << AT91_ID_SYS)
> | (at91_extern_irq))
> diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
> index 17f4d72..abb9214 100644
> --- a/arch/arm/mach-at91/pm_slowclock.S
> +++ b/arch/arm/mach-at91/pm_slowclock.S
> @@ -54,7 +54,7 @@
> 1: sub tmp2, tmp2, #1
> cmp tmp2, #0
> beq 2f
> - ldr tmp1, [pmc, #(AT91_PMC_SR - AT91_PMC)]
> + ldr tmp1, [pmc, #AT91_PMC_SR]
> tst tmp1, #AT91_PMC_MCKRDY
> beq 1b
> 2:
> @@ -68,7 +68,7 @@
> 1: sub tmp2, tmp2, #1
> cmp tmp2, #0
> beq 2f
> - ldr tmp1, [pmc, #(AT91_PMC_SR - AT91_PMC)]
> + ldr tmp1, [pmc, #AT91_PMC_SR]
> tst tmp1, #AT91_PMC_MOSCS
> beq 1b
> 2:
> @@ -82,7 +82,7 @@
> 1: sub tmp2, tmp2, #1
> cmp tmp2, #0
> beq 2f
> - ldr tmp1, [pmc, #(AT91_PMC_SR - AT91_PMC)]
> + ldr tmp1, [pmc, #AT91_PMC_SR]
> tst tmp1, #AT91_PMC_LOCKA
> beq 1b
> 2:
> @@ -96,7 +96,7 @@
> 1: sub tmp2, tmp2, #1
> cmp tmp2, #0
> beq 2f
> - ldr tmp1, [pmc, #(AT91_PMC_SR - AT91_PMC)]
> + ldr tmp1, [pmc, #AT91_PMC_SR]
> tst tmp1, #AT91_PMC_LOCKB
> beq 1b
> 2:
> @@ -176,14 +176,14 @@ sdr_sr_enable:
>
> sdr_sr_done:
> /* Save Master clock setting */
> - ldr tmp1, [pmc, #(AT91_PMC_MCKR - AT91_PMC)]
> + ldr tmp1, [pmc, #AT91_PMC_MCKR]
> str tmp1, .saved_mckr
>
> /*
> * Set the Master clock source to slow clock
> */
> bic tmp1, tmp1, #AT91_PMC_CSS
> - str tmp1, [pmc, #(AT91_PMC_MCKR - AT91_PMC)]
> + str tmp1, [pmc, #AT91_PMC_MCKR]
>
> wait_mckrdy
>
> @@ -194,44 +194,44 @@ sdr_sr_done:
> * See AT91RM9200 errata #27 and #28 for details.
> */
> mov tmp1, #0
> - str tmp1, [pmc, #(AT91_PMC_MCKR - AT91_PMC)]
> + str tmp1, [pmc, #AT91_PMC_MCKR]
>
> wait_mckrdy
> #endif
>
> /* Save PLLA setting and disable it */
> - ldr tmp1, [pmc, #(AT91_CKGR_PLLAR - AT91_PMC)]
> + ldr tmp1, [pmc, #AT91_CKGR_PLLAR]
> str tmp1, .saved_pllar
>
> mov tmp1, #AT91_PMC_PLLCOUNT
> orr tmp1, tmp1, #(1 << 29) /* bit 29 always set */
> - str tmp1, [pmc, #(AT91_CKGR_PLLAR - AT91_PMC)]
> + str tmp1, [pmc, #AT91_CKGR_PLLAR]
>
> /* Save PLLB setting and disable it */
> - ldr tmp1, [pmc, #(AT91_CKGR_PLLBR - AT91_PMC)]
> + ldr tmp1, [pmc, #AT91_CKGR_PLLBR]
> str tmp1, .saved_pllbr
>
> mov tmp1, #AT91_PMC_PLLCOUNT
> - str tmp1, [pmc, #(AT91_CKGR_PLLBR - AT91_PMC)]
> + str tmp1, [pmc, #AT91_CKGR_PLLBR]
>
> /* Turn off the main oscillator */
> - ldr tmp1, [pmc, #(AT91_CKGR_MOR - AT91_PMC)]
> + ldr tmp1, [pmc, #AT91_CKGR_MOR]
> bic tmp1, tmp1, #AT91_PMC_MOSCEN
> - str tmp1, [pmc, #(AT91_CKGR_MOR - AT91_PMC)]
> + str tmp1, [pmc, #AT91_CKGR_MOR]
>
> /* Wait for interrupt */
> mcr p15, 0, tmp1, c7, c0, 4
>
> /* Turn on the main oscillator */
> - ldr tmp1, [pmc, #(AT91_CKGR_MOR - AT91_PMC)]
> + ldr tmp1, [pmc, #AT91_CKGR_MOR]
> orr tmp1, tmp1, #AT91_PMC_MOSCEN
> - str tmp1, [pmc, #(AT91_CKGR_MOR - AT91_PMC)]
> + str tmp1, [pmc, #AT91_CKGR_MOR]
>
> wait_moscrdy
>
> /* Restore PLLB setting */
> ldr tmp1, .saved_pllbr
> - str tmp1, [pmc, #(AT91_CKGR_PLLBR - AT91_PMC)]
> + str tmp1, [pmc, #AT91_CKGR_PLLBR]
>
> tst tmp1, #(AT91_PMC_MUL & 0xff0000)
> bne 1f
> @@ -243,7 +243,7 @@ sdr_sr_done:
>
> /* Restore PLLA setting */
> ldr tmp1, .saved_pllar
> - str tmp1, [pmc, #(AT91_CKGR_PLLAR - AT91_PMC)]
> + str tmp1, [pmc, #AT91_CKGR_PLLAR]
>
> tst tmp1, #(AT91_PMC_MUL & 0xff0000)
> bne 3f
> @@ -264,7 +264,7 @@ sdr_sr_done:
> tst tmp1, #AT91_PMC_PRES
> beq 2f
> and tmp1, tmp1, #AT91_PMC_PRES
> - str tmp1, [pmc, #(AT91_PMC_MCKR - AT91_PMC)]
> + str tmp1, [pmc, #AT91_PMC_MCKR]
>
> wait_mckrdy
> #endif
> @@ -273,7 +273,7 @@ sdr_sr_done:
> * Restore master clock setting
> */
> 2: ldr tmp1, .saved_mckr
> - str tmp1, [pmc, #(AT91_PMC_MCKR - AT91_PMC)]
> + str tmp1, [pmc, #AT91_PMC_MCKR]
>
> wait_mckrdy
>
> diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
> index e2fb6d5..ce9dffb 100644
> --- a/drivers/usb/gadget/atmel_usba_udc.c
> +++ b/drivers/usb/gadget/atmel_usba_udc.c
> @@ -332,12 +332,12 @@ static int vbus_is_present(struct usba_udc *udc)
>
> static void toggle_bias(int is_on)
> {
> - unsigned int uckr = at91_sys_read(AT91_CKGR_UCKR);
> + unsigned int uckr = at91_pmc_read(AT91_CKGR_UCKR);
>
> if (is_on)
> - at91_sys_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN);
> + at91_pmc_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN);
> else
> - at91_sys_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN));
> + at91_pmc_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN));
> }
>
> #else
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH 11/18] ARM: at91/rtc-at91sam9: each SoC can select the RTT device to use
2012-02-17 17:50 ` [PATCH 11/18] ARM: at91/rtc-at91sam9: each SoC can select the RTT device to use Nicolas Ferre
@ 2012-02-20 0:32 ` Ryan Mallon
2012-02-20 1:25 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 43+ messages in thread
From: Ryan Mallon @ 2012-02-20 0:32 UTC (permalink / raw)
To: Nicolas Ferre; +Cc: plagnioj, linux-arm-kernel, linux-kernel
On 18/02/12 04:50, Nicolas Ferre wrote:
> From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
>
> For the RTT as RTC driver rtc-at91sam9, the platform_device structure
> is filled during SoC initialization. This will allow to convert this
> RTC driver as a standard platform driver.
>
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> ---
> arch/arm/mach-at91/at91sam9260_devices.c | 11 +++++
> arch/arm/mach-at91/at91sam9261_devices.c | 10 +++++
> arch/arm/mach-at91/at91sam9263_devices.c | 25 ++++++++++++
> arch/arm/mach-at91/at91sam9g45_devices.c | 10 +++++
> arch/arm/mach-at91/at91sam9rl_devices.c | 10 +++++
> drivers/rtc/rtc-at91sam9.c | 61 ++++-------------------------
> 6 files changed, 75 insertions(+), 52 deletions(-)
>
> diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
> index b93a337..2071017 100644
> --- a/arch/arm/mach-at91/at91sam9260_devices.c
> +++ b/arch/arm/mach-at91/at91sam9260_devices.c
> @@ -728,8 +728,19 @@ static struct platform_device at91sam9260_rtt_device = {
> .num_resources = ARRAY_SIZE(rtt_resources),
> };
>
> +
> +#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
> +static void __init at91_add_device_rtt_rtc(void)
> +{
> + at91sam9260_rtt_device.name = "rtc-at91sam9";
> +}
Nitpickish: This function doesn't _add_ anything. It would probably be
better called at91_init_device_rtt_rtc. Same goes for the other "add"
functions in this patch.
> +#else
> +static void __init at91_add_device_rtt_rtc(void) {}
> +#endif
> +
> static void __init at91_add_device_rtt(void)
> {
> + at91_add_device_rtt_rtc();
> platform_device_register(&at91sam9260_rtt_device);
> }
Does this work by setting the rtt device name iff
CONFIG_RTC_DRV_AT91SAM9 is set? If so, it seems a bit ugly. Why bother
doing the platform_device_register at all if you know it isn't going to
do anything? Shouldn't the at91sam9260_rrt_device struct declaration and
the platform_device_register all be conditional on CONFIG_RTC_DRV_AT91SAM9?
~Ryan
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH 13/18] ARM: at91/rtc-at91sam9: pass the GPBR to use via ressources
2012-02-17 17:50 ` [PATCH 13/18] ARM: at91/rtc-at91sam9: pass the GPBR to use via ressources Nicolas Ferre
@ 2012-02-20 0:43 ` Ryan Mallon
2012-02-20 1:20 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 43+ messages in thread
From: Ryan Mallon @ 2012-02-20 0:43 UTC (permalink / raw)
To: Nicolas Ferre; +Cc: plagnioj, linux-arm-kernel, linux-kernel
On 18/02/12 04:50, Nicolas Ferre wrote:
> From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
>
> The GPBR registers are used for storing RTC values. The GPBR registers
> to use are now provided using standard resource entry. The array is
> filled in SoC specific code.
> rtc-at91sam9 RTT as RTC driver is modified to retrieve this information.
>
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> ---
> arch/arm/mach-at91/at91sam9260_devices.c | 10 +++++++-
> arch/arm/mach-at91/at91sam9261_devices.c | 8 ++++++-
> arch/arm/mach-at91/at91sam9263_devices.c | 16 +++++++++++--
> arch/arm/mach-at91/at91sam9g45_devices.c | 8 ++++++-
> arch/arm/mach-at91/at91sam9rl_devices.c | 8 ++++++-
> arch/arm/mach-at91/include/mach/at91sam9260.h | 5 +--
> arch/arm/mach-at91/include/mach/at91sam9261.h | 5 +--
> arch/arm/mach-at91/include/mach/at91sam9263.h | 5 +--
> arch/arm/mach-at91/include/mach/at91sam9g45.h | 5 +--
> arch/arm/mach-at91/include/mach/at91sam9rl.h | 2 +-
> drivers/rtc/rtc-at91sam9.c | 29 +++++++++++++++++++++---
> 11 files changed, 76 insertions(+), 25 deletions(-)
>
> diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
> index 2071017..ae2b648 100644
> --- a/arch/arm/mach-at91/at91sam9260_devices.c
> +++ b/arch/arm/mach-at91/at91sam9260_devices.c
> @@ -718,14 +718,16 @@ static struct resource rtt_resources[] = {
> .start = AT91SAM9260_BASE_RTT,
> .end = AT91SAM9260_BASE_RTT + SZ_16 - 1,
> .flags = IORESOURCE_MEM,
> - }
> + }, {
> + .flags = IORESOURCE_MEM,
> + },
> };
>
> static struct platform_device at91sam9260_rtt_device = {
> .name = "at91_rtt",
> .id = 0,
> .resource = rtt_resources,
> - .num_resources = ARRAY_SIZE(rtt_resources),
> + .num_resources = 1,
Why this change? The device has two resources, and the rtc driver
request both of them, so why are you saying there is only one resource
here. It either needs to be changed back to use ARRAY_SIZE, or needs a
comment explaining what magic is in use.
<snip>
> #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
> static void __init at91_add_device_rtt_rtc(void)
> {
> struct platform_device *pdev;
> + struct resource *r;
>
> switch (CONFIG_RTC_DRV_AT91SAM9_RTT) {
> case 0:
> pdev = &at91sam9263_rtt0_device;
> + r = rtt0_resources;
> break;
> case 1:
> pdev = &at91sam9263_rtt1_device;
> + r = rtt1_resources;
> break;
> default:
> pr_err("at91sam9263: support only 2 RTT (%d)\n",
> - CONFIG_RTC_DRV_AT91SAM9_RTT);
> + CONFIG_RTC_DRV_AT91SAM9_RTT);
> return;
> }
>
> + r[1].start = AT91SAM9263_BASE_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
> + r[1].end = r[1].start + 3;
> pdev->name = "rtc-at91sam9";
> + pdev->num_resources++;
Okay, makes a little more sense now. I really think it needs a comment
explaining how the resources are being managed, since it is a bit
non-obvious.
Also, can only one of the RTT's can be used as an RTC at a time?
~Ryan
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH 13/18] ARM: at91/rtc-at91sam9: pass the GPBR to use via ressources
2012-02-20 0:43 ` Ryan Mallon
@ 2012-02-20 1:20 ` Jean-Christophe PLAGNIOL-VILLARD
2012-02-20 7:36 ` Russell King - ARM Linux
0 siblings, 1 reply; 43+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-02-20 1:20 UTC (permalink / raw)
To: Ryan Mallon; +Cc: Nicolas Ferre, linux-arm-kernel, linux-kernel
On 11:43 Mon 20 Feb , Ryan Mallon wrote:
> On 18/02/12 04:50, Nicolas Ferre wrote:
>
> > From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> >
> > The GPBR registers are used for storing RTC values. The GPBR registers
> > to use are now provided using standard resource entry. The array is
> > filled in SoC specific code.
> > rtc-at91sam9 RTT as RTC driver is modified to retrieve this information.
> >
> > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> > Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> > ---
> > arch/arm/mach-at91/at91sam9260_devices.c | 10 +++++++-
> > arch/arm/mach-at91/at91sam9261_devices.c | 8 ++++++-
> > arch/arm/mach-at91/at91sam9263_devices.c | 16 +++++++++++--
> > arch/arm/mach-at91/at91sam9g45_devices.c | 8 ++++++-
> > arch/arm/mach-at91/at91sam9rl_devices.c | 8 ++++++-
> > arch/arm/mach-at91/include/mach/at91sam9260.h | 5 +--
> > arch/arm/mach-at91/include/mach/at91sam9261.h | 5 +--
> > arch/arm/mach-at91/include/mach/at91sam9263.h | 5 +--
> > arch/arm/mach-at91/include/mach/at91sam9g45.h | 5 +--
> > arch/arm/mach-at91/include/mach/at91sam9rl.h | 2 +-
> > drivers/rtc/rtc-at91sam9.c | 29 +++++++++++++++++++++---
> > 11 files changed, 76 insertions(+), 25 deletions(-)
> >
> > diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
> > index 2071017..ae2b648 100644
> > --- a/arch/arm/mach-at91/at91sam9260_devices.c
> > +++ b/arch/arm/mach-at91/at91sam9260_devices.c
> > @@ -718,14 +718,16 @@ static struct resource rtt_resources[] = {
> > .start = AT91SAM9260_BASE_RTT,
> > .end = AT91SAM9260_BASE_RTT + SZ_16 - 1,
> > .flags = IORESOURCE_MEM,
> > - }
> > + }, {
> > + .flags = IORESOURCE_MEM,
> > + },
> > };
> >
> > static struct platform_device at91sam9260_rtt_device = {
> > .name = "at91_rtt",
> > .id = 0,
> > .resource = rtt_resources,
> > - .num_resources = ARRAY_SIZE(rtt_resources),
> > + .num_resources = 1,
>
>
> Why this change? The device has two resources, and the rtc driver
> request both of them, so why are you saying there is only one resource
> here. It either needs to be changed back to use ARRAY_SIZE, or needs a
> comment explaining what magic is in use.
because the number of resources depends on the user of rtt
we must not hardcode the GPBR reg as this resource will be present only if the
rtc-at91sam9 is enabled
>
> <snip>
>
> > #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
> > static void __init at91_add_device_rtt_rtc(void)
> > {
> > struct platform_device *pdev;
> > + struct resource *r;
> >
> > switch (CONFIG_RTC_DRV_AT91SAM9_RTT) {
> > case 0:
> > pdev = &at91sam9263_rtt0_device;
> > + r = rtt0_resources;
> > break;
> > case 1:
> > pdev = &at91sam9263_rtt1_device;
> > + r = rtt1_resources;
> > break;
> > default:
> > pr_err("at91sam9263: support only 2 RTT (%d)\n",
> > - CONFIG_RTC_DRV_AT91SAM9_RTT);
> > + CONFIG_RTC_DRV_AT91SAM9_RTT);
> > return;
> > }
>
> >
> > + r[1].start = AT91SAM9263_BASE_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
> > + r[1].end = r[1].start + 3;
> > pdev->name = "rtc-at91sam9";
> > + pdev->num_resources++;
>
>
> Okay, makes a little more sense now. I really think it needs a comment
> explaining how the resources are being managed, since it is a bit
> non-obvious.
>
> Also, can only one of the RTT's can be used as an RTC at a time?
it was always the case as nearly all soc have only one rtt and via Kconfig
doc in Kconfig
Best Regards,
J.
>
> ~Ryan
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH 11/18] ARM: at91/rtc-at91sam9: each SoC can select the RTT device to use
2012-02-20 0:32 ` Ryan Mallon
@ 2012-02-20 1:25 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 0 replies; 43+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-02-20 1:25 UTC (permalink / raw)
To: Ryan Mallon; +Cc: Nicolas Ferre, linux-arm-kernel, linux-kernel
On 11:32 Mon 20 Feb , Ryan Mallon wrote:
> On 18/02/12 04:50, Nicolas Ferre wrote:
>
> > From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> >
> > For the RTT as RTC driver rtc-at91sam9, the platform_device structure
> > is filled during SoC initialization. This will allow to convert this
> > RTC driver as a standard platform driver.
> >
> > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> > Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> > ---
> > arch/arm/mach-at91/at91sam9260_devices.c | 11 +++++
> > arch/arm/mach-at91/at91sam9261_devices.c | 10 +++++
> > arch/arm/mach-at91/at91sam9263_devices.c | 25 ++++++++++++
> > arch/arm/mach-at91/at91sam9g45_devices.c | 10 +++++
> > arch/arm/mach-at91/at91sam9rl_devices.c | 10 +++++
> > drivers/rtc/rtc-at91sam9.c | 61 ++++-------------------------
> > 6 files changed, 75 insertions(+), 52 deletions(-)
> >
> > diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
> > index b93a337..2071017 100644
> > --- a/arch/arm/mach-at91/at91sam9260_devices.c
> > +++ b/arch/arm/mach-at91/at91sam9260_devices.c
> > @@ -728,8 +728,19 @@ static struct platform_device at91sam9260_rtt_device = {
> > .num_resources = ARRAY_SIZE(rtt_resources),
> > };
> >
> > +
> > +#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
> > +static void __init at91_add_device_rtt_rtc(void)
> > +{
> > + at91sam9260_rtt_device.name = "rtc-at91sam9";
> > +}
>
>
> Nitpickish: This function doesn't _add_ anything. It would probably be
> better called at91_init_device_rtt_rtc. Same goes for the other "add"
> functions in this patch.
yes but an other patch update it to add gpbr resource
>
> > +#else
> > +static void __init at91_add_device_rtt_rtc(void) {}
> > +#endif
> > +
> > static void __init at91_add_device_rtt(void)
> > {
> > + at91_add_device_rtt_rtc();
> > platform_device_register(&at91sam9260_rtt_device);
> > }
>
>
> Does this work by setting the rtt device name iff
> CONFIG_RTC_DRV_AT91SAM9 is set? If so, it seems a bit ugly. Why bother
> doing the platform_device_register at all if you know it isn't going to
> do anything? Shouldn't the at91sam9260_rrt_device struct declaration and
> the platform_device_register all be conditional on CONFIG_RTC_DRV_AT91SAM9?
no people use rtt for other purpose
RTT is a timer and the rtc use it
anyway this will be dropped via DT
and the resource will be optional
Best Regards,
J.
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH 04/18] ARM: at91: make ST (System Timer) soc independent
2012-02-20 0:22 ` Ryan Mallon
@ 2012-02-20 1:38 ` Jean-Christophe PLAGNIOL-VILLARD
2012-02-20 1:52 ` Ryan Mallon
0 siblings, 1 reply; 43+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-02-20 1:38 UTC (permalink / raw)
To: Ryan Mallon; +Cc: Nicolas Ferre, linux-arm-kernel, linux-kernel
On 11:22 Mon 20 Feb , Ryan Mallon wrote:
> On 18/02/12 04:49, Nicolas Ferre wrote:
>
> > From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> >
> > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> > Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> > ---
> > arch/arm/mach-at91/at91rm9200.c | 4 +-
> > arch/arm/mach-at91/at91rm9200_time.c | 37 ++++++++++++++++----------
> > arch/arm/mach-at91/generic.h | 1 +
> > arch/arm/mach-at91/include/mach/at91_st.h | 32 +++++++++++++++-------
> > arch/arm/mach-at91/include/mach/at91rm9200.h | 2 +-
> > drivers/watchdog/at91rm9200_wdt.c | 8 +++---
> > 6 files changed, 53 insertions(+), 31 deletions(-)
> >
> > diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
>
> Hi Jean, Nicolas,
>
> Patch looks mostly good, couple of points below.
>
> ~Ryan
>
> <snip>
>
> > /* Cancel any pending alarm; flush any pending IRQ */
> > - at91_sys_write(AT91_ST_RTAR, alm);
> > - (void) at91_sys_read(AT91_ST_SR);
> > + at91_st_write(AT91_ST_RTAR, alm);
> > + (void) at91_st_read(AT91_ST_SR);
>
>
> Can we please remove the (void) casting of the return value when making
> this change, especially since at91_st_read is now a macro which doesn't
> even have a return value. Same in a few other places.
modification done by script and it's no the scope of this patch
>
> >
> > /* Schedule alarm by writing RTAR. */
> > alm += delta;
> > - at91_sys_write(AT91_ST_RTAR, alm);
> > + at91_st_write(AT91_ST_RTAR, alm);
> >
> > return status;
> > }
> > @@ -175,15 +175,24 @@ static struct clock_event_device clkevt = {
> > .set_mode = clkevt32k_mode,
> > };
> >
> > +void __iomem *at91_st_base;
> > +
> > +void __init at91rm9200_ioremap_st(u32 addr)
> > +{
> > + at91_st_base = ioremap(AT91RM9200_BASE_ST, 256);
> > + if (!at91_st_base)
> > + panic("Impossible to ioremap ST\n");
> > +}
>
>
> I can't see anything in this patch which calls this function? Also, why
> is it extern? Can't it just be moved to whichever file is going to call
> it and make it static there
I see it too this need to be called by rm9200 code and this mustnot be static
as the idea is to have soc independant IP
Best Regards,
J.
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH 04/18] ARM: at91: make ST (System Timer) soc independent
2012-02-20 1:38 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2012-02-20 1:52 ` Ryan Mallon
2012-02-20 3:02 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 43+ messages in thread
From: Ryan Mallon @ 2012-02-20 1:52 UTC (permalink / raw)
To: Jean-Christophe PLAGNIOL-VILLARD
Cc: Nicolas Ferre, linux-arm-kernel, linux-kernel
On 20/02/12 12:38, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 11:22 Mon 20 Feb , Ryan Mallon wrote:
>> On 18/02/12 04:49, Nicolas Ferre wrote:
>>
>>> From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
>>>
>>> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
>>> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
>>> ---
>>> arch/arm/mach-at91/at91rm9200.c | 4 +-
>>> arch/arm/mach-at91/at91rm9200_time.c | 37 ++++++++++++++++----------
>>> arch/arm/mach-at91/generic.h | 1 +
>>> arch/arm/mach-at91/include/mach/at91_st.h | 32 +++++++++++++++-------
>>> arch/arm/mach-at91/include/mach/at91rm9200.h | 2 +-
>>> drivers/watchdog/at91rm9200_wdt.c | 8 +++---
>>> 6 files changed, 53 insertions(+), 31 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
>>
>> Hi Jean, Nicolas,
>>
>> Patch looks mostly good, couple of points below.
>>
>> ~Ryan
>>
>> <snip>
>>
>>> /* Cancel any pending alarm; flush any pending IRQ */
>>> - at91_sys_write(AT91_ST_RTAR, alm);
>>> - (void) at91_sys_read(AT91_ST_SR);
>>> + at91_st_write(AT91_ST_RTAR, alm);
>>> + (void) at91_st_read(AT91_ST_SR);
>>
>>
>> Can we please remove the (void) casting of the return value when making
>> this change, especially since at91_st_read is now a macro which doesn't
>> even have a return value. Same in a few other places.
> modification done by script and it's no the scope of this patch
That isn't an excuse to leave incorrect code there. It is a simple fix.
~Ryan
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH 04/18] ARM: at91: make ST (System Timer) soc independent
2012-02-20 1:52 ` Ryan Mallon
@ 2012-02-20 3:02 ` Jean-Christophe PLAGNIOL-VILLARD
2012-02-20 3:16 ` Ryan Mallon
2012-02-20 7:33 ` Russell King - ARM Linux
0 siblings, 2 replies; 43+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-02-20 3:02 UTC (permalink / raw)
To: Ryan Mallon; +Cc: Nicolas Ferre, linux-arm-kernel, linux-kernel
On 12:52 Mon 20 Feb , Ryan Mallon wrote:
> On 20/02/12 12:38, Jean-Christophe PLAGNIOL-VILLARD wrote:
>
> > On 11:22 Mon 20 Feb , Ryan Mallon wrote:
> >> On 18/02/12 04:49, Nicolas Ferre wrote:
> >>
> >>> From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> >>>
> >>> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> >>> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> >>> ---
> >>> arch/arm/mach-at91/at91rm9200.c | 4 +-
> >>> arch/arm/mach-at91/at91rm9200_time.c | 37 ++++++++++++++++----------
> >>> arch/arm/mach-at91/generic.h | 1 +
> >>> arch/arm/mach-at91/include/mach/at91_st.h | 32 +++++++++++++++-------
> >>> arch/arm/mach-at91/include/mach/at91rm9200.h | 2 +-
> >>> drivers/watchdog/at91rm9200_wdt.c | 8 +++---
> >>> 6 files changed, 53 insertions(+), 31 deletions(-)
> >>>
> >>> diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
> >>
> >> Hi Jean, Nicolas,
> >>
> >> Patch looks mostly good, couple of points below.
> >>
> >> ~Ryan
> >>
> >> <snip>
> >>
> >>> /* Cancel any pending alarm; flush any pending IRQ */
> >>> - at91_sys_write(AT91_ST_RTAR, alm);
> >>> - (void) at91_sys_read(AT91_ST_SR);
> >>> + at91_st_write(AT91_ST_RTAR, alm);
> >>> + (void) at91_st_read(AT91_ST_SR);
> >>
> >>
> >> Can we please remove the (void) casting of the return value when making
> >> this change, especially since at91_st_read is now a macro which doesn't
> >> even have a return value. Same in a few other places.
> > modification done by script and it's no the scope of this patch
>
>
> That isn't an excuse to leave incorrect code there. It is a simple fix.
no (void) in c means you don't care of the return so basically it's right
Best Regards,
J.
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH 04/18] ARM: at91: make ST (System Timer) soc independent
2012-02-20 3:02 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2012-02-20 3:16 ` Ryan Mallon
2012-02-20 3:23 ` Jean-Christophe PLAGNIOL-VILLARD
2012-02-20 7:33 ` Russell King - ARM Linux
1 sibling, 1 reply; 43+ messages in thread
From: Ryan Mallon @ 2012-02-20 3:16 UTC (permalink / raw)
To: Jean-Christophe PLAGNIOL-VILLARD
Cc: Nicolas Ferre, linux-arm-kernel, linux-kernel
On 20/02/12 14:02, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 12:52 Mon 20 Feb , Ryan Mallon wrote:
>> On 20/02/12 12:38, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>
>>> On 11:22 Mon 20 Feb , Ryan Mallon wrote:
>>>> On 18/02/12 04:49, Nicolas Ferre wrote:
>>>>
>>>>> From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
>>>>>
>>>>> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
>>>>> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
>>>>> ---
>>>>> arch/arm/mach-at91/at91rm9200.c | 4 +-
>>>>> arch/arm/mach-at91/at91rm9200_time.c | 37 ++++++++++++++++----------
>>>>> arch/arm/mach-at91/generic.h | 1 +
>>>>> arch/arm/mach-at91/include/mach/at91_st.h | 32 +++++++++++++++-------
>>>>> arch/arm/mach-at91/include/mach/at91rm9200.h | 2 +-
>>>>> drivers/watchdog/at91rm9200_wdt.c | 8 +++---
>>>>> 6 files changed, 53 insertions(+), 31 deletions(-)
>>>>>
>>>>> diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
>>>>
>>>> Hi Jean, Nicolas,
>>>>
>>>> Patch looks mostly good, couple of points below.
>>>>
>>>> ~Ryan
>>>>
>>>> <snip>
>>>>
>>>>> /* Cancel any pending alarm; flush any pending IRQ */
>>>>> - at91_sys_write(AT91_ST_RTAR, alm);
>>>>> - (void) at91_sys_read(AT91_ST_SR);
>>>>> + at91_st_write(AT91_ST_RTAR, alm);
>>>>> + (void) at91_st_read(AT91_ST_SR);
>>>>
>>>>
>>>> Can we please remove the (void) casting of the return value when making
>>>> this change, especially since at91_st_read is now a macro which doesn't
>>>> even have a return value. Same in a few other places.
>>> modification done by script and it's no the scope of this patch
>>
>>
>> That isn't an excuse to leave incorrect code there. It is a simple fix.
> no (void) in c means you don't care of the return so basically it's right
Because of the way the __raw_writel is defined you are casting the
result of an assignment, basically you are doing this:
int foo, bar;
(void)(foo = bar);
Which is pointless. Don't make excuses for silly, redundant code. Fix
it, please.
~Ryan
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH 04/18] ARM: at91: make ST (System Timer) soc independent
2012-02-20 3:16 ` Ryan Mallon
@ 2012-02-20 3:23 ` Jean-Christophe PLAGNIOL-VILLARD
2012-02-20 3:48 ` Ryan Mallon
0 siblings, 1 reply; 43+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-02-20 3:23 UTC (permalink / raw)
To: Ryan Mallon; +Cc: Nicolas Ferre, linux-arm-kernel, linux-kernel
On 14:16 Mon 20 Feb , Ryan Mallon wrote:
> On 20/02/12 14:02, Jean-Christophe PLAGNIOL-VILLARD wrote:
>
> > On 12:52 Mon 20 Feb , Ryan Mallon wrote:
> >> On 20/02/12 12:38, Jean-Christophe PLAGNIOL-VILLARD wrote:
> >>
> >>> On 11:22 Mon 20 Feb , Ryan Mallon wrote:
> >>>> On 18/02/12 04:49, Nicolas Ferre wrote:
> >>>>
> >>>>> From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> >>>>>
> >>>>> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> >>>>> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> >>>>> ---
> >>>>> arch/arm/mach-at91/at91rm9200.c | 4 +-
> >>>>> arch/arm/mach-at91/at91rm9200_time.c | 37 ++++++++++++++++----------
> >>>>> arch/arm/mach-at91/generic.h | 1 +
> >>>>> arch/arm/mach-at91/include/mach/at91_st.h | 32 +++++++++++++++-------
> >>>>> arch/arm/mach-at91/include/mach/at91rm9200.h | 2 +-
> >>>>> drivers/watchdog/at91rm9200_wdt.c | 8 +++---
> >>>>> 6 files changed, 53 insertions(+), 31 deletions(-)
> >>>>>
> >>>>> diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
> >>>>
> >>>> Hi Jean, Nicolas,
> >>>>
> >>>> Patch looks mostly good, couple of points below.
> >>>>
> >>>> ~Ryan
> >>>>
> >>>> <snip>
> >>>>
> >>>>> /* Cancel any pending alarm; flush any pending IRQ */
> >>>>> - at91_sys_write(AT91_ST_RTAR, alm);
> >>>>> - (void) at91_sys_read(AT91_ST_SR);
> >>>>> + at91_st_write(AT91_ST_RTAR, alm);
> >>>>> + (void) at91_st_read(AT91_ST_SR);
> >>>>
> >>>>
> >>>> Can we please remove the (void) casting of the return value when making
> >>>> this change, especially since at91_st_read is now a macro which doesn't
> >>>> even have a return value. Same in a few other places.
> >>> modification done by script and it's no the scope of this patch
> >>
> >>
> >> That isn't an excuse to leave incorrect code there. It is a simple fix.
> > no (void) in c means you don't care of the return so basically it's right
>
>
> Because of the way the __raw_writel is defined you are casting the
> result of an assignment, basically you are doing this:
>
> int foo, bar;
>
> (void)(foo = bar);
>
> Which is pointless. Don't make excuses for silly, redundant code. Fix
> it, please.
except it's a read it has nothing to do with that
Best Regards,
J.
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH 04/18] ARM: at91: make ST (System Timer) soc independent
2012-02-20 3:23 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2012-02-20 3:48 ` Ryan Mallon
2012-02-20 3:49 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 43+ messages in thread
From: Ryan Mallon @ 2012-02-20 3:48 UTC (permalink / raw)
To: Jean-Christophe PLAGNIOL-VILLARD
Cc: Nicolas Ferre, linux-arm-kernel, linux-kernel
On 20/02/12 14:23, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 14:16 Mon 20 Feb , Ryan Mallon wrote:
>> On 20/02/12 14:02, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>
>>> On 12:52 Mon 20 Feb , Ryan Mallon wrote:
>>>> On 20/02/12 12:38, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>>>
>>>>> On 11:22 Mon 20 Feb , Ryan Mallon wrote:
>>>>>> On 18/02/12 04:49, Nicolas Ferre wrote:
>>>>>>
>>>>>>> From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
>>>>>>>
>>>>>>> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
>>>>>>> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
>>>>>>> ---
>>>>>>> arch/arm/mach-at91/at91rm9200.c | 4 +-
>>>>>>> arch/arm/mach-at91/at91rm9200_time.c | 37 ++++++++++++++++----------
>>>>>>> arch/arm/mach-at91/generic.h | 1 +
>>>>>>> arch/arm/mach-at91/include/mach/at91_st.h | 32 +++++++++++++++-------
>>>>>>> arch/arm/mach-at91/include/mach/at91rm9200.h | 2 +-
>>>>>>> drivers/watchdog/at91rm9200_wdt.c | 8 +++---
>>>>>>> 6 files changed, 53 insertions(+), 31 deletions(-)
>>>>>>>
>>>>>>> diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
>>>>>>
>>>>>> Hi Jean, Nicolas,
>>>>>>
>>>>>> Patch looks mostly good, couple of points below.
>>>>>>
>>>>>> ~Ryan
>>>>>>
>>>>>> <snip>
>>>>>>
>>>>>>> /* Cancel any pending alarm; flush any pending IRQ */
>>>>>>> - at91_sys_write(AT91_ST_RTAR, alm);
>>>>>>> - (void) at91_sys_read(AT91_ST_SR);
>>>>>>> + at91_st_write(AT91_ST_RTAR, alm);
>>>>>>> + (void) at91_st_read(AT91_ST_SR);
>>>>>>
>>>>>>
>>>>>> Can we please remove the (void) casting of the return value when making
>>>>>> this change, especially since at91_st_read is now a macro which doesn't
>>>>>> even have a return value. Same in a few other places.
>>>>> modification done by script and it's no the scope of this patch
>>>>
>>>>
>>>> That isn't an excuse to leave incorrect code there. It is a simple fix.
>>> no (void) in c means you don't care of the return so basically it's right
>>
>>
>> Because of the way the __raw_writel is defined you are casting the
>> result of an assignment, basically you are doing this:
>>
>> int foo, bar;
>>
>> (void)(foo = bar);
>>
>> Which is pointless. Don't make excuses for silly, redundant code. Fix
>> it, please.
> except it's a read it has nothing to do with that
It makes no difference, it is still equally pointless. We don't cast
unused return values to void, for functions or assignments, in the kernel.
It is pointless, superfluous code, and now is a really good opportunity
to fix it. You can probably even make your script do it for you :-).
~Ryan
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH 04/18] ARM: at91: make ST (System Timer) soc independent
2012-02-20 3:48 ` Ryan Mallon
@ 2012-02-20 3:49 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 0 replies; 43+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-02-20 3:49 UTC (permalink / raw)
To: Ryan Mallon; +Cc: Nicolas Ferre, linux-arm-kernel, linux-kernel
On 14:48 Mon 20 Feb , Ryan Mallon wrote:
> On 20/02/12 14:23, Jean-Christophe PLAGNIOL-VILLARD wrote:
>
> > On 14:16 Mon 20 Feb , Ryan Mallon wrote:
> >> On 20/02/12 14:02, Jean-Christophe PLAGNIOL-VILLARD wrote:
> >>
> >>> On 12:52 Mon 20 Feb , Ryan Mallon wrote:
> >>>> On 20/02/12 12:38, Jean-Christophe PLAGNIOL-VILLARD wrote:
> >>>>
> >>>>> On 11:22 Mon 20 Feb , Ryan Mallon wrote:
> >>>>>> On 18/02/12 04:49, Nicolas Ferre wrote:
> >>>>>>
> >>>>>>> From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> >>>>>>>
> >>>>>>> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> >>>>>>> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> >>>>>>> ---
> >>>>>>> arch/arm/mach-at91/at91rm9200.c | 4 +-
> >>>>>>> arch/arm/mach-at91/at91rm9200_time.c | 37 ++++++++++++++++----------
> >>>>>>> arch/arm/mach-at91/generic.h | 1 +
> >>>>>>> arch/arm/mach-at91/include/mach/at91_st.h | 32 +++++++++++++++-------
> >>>>>>> arch/arm/mach-at91/include/mach/at91rm9200.h | 2 +-
> >>>>>>> drivers/watchdog/at91rm9200_wdt.c | 8 +++---
> >>>>>>> 6 files changed, 53 insertions(+), 31 deletions(-)
> >>>>>>>
> >>>>>>> diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
> >>>>>>
> >>>>>> Hi Jean, Nicolas,
> >>>>>>
> >>>>>> Patch looks mostly good, couple of points below.
> >>>>>>
> >>>>>> ~Ryan
> >>>>>>
> >>>>>> <snip>
> >>>>>>
> >>>>>>> /* Cancel any pending alarm; flush any pending IRQ */
> >>>>>>> - at91_sys_write(AT91_ST_RTAR, alm);
> >>>>>>> - (void) at91_sys_read(AT91_ST_SR);
> >>>>>>> + at91_st_write(AT91_ST_RTAR, alm);
> >>>>>>> + (void) at91_st_read(AT91_ST_SR);
> >>>>>>
> >>>>>>
> >>>>>> Can we please remove the (void) casting of the return value when making
> >>>>>> this change, especially since at91_st_read is now a macro which doesn't
> >>>>>> even have a return value. Same in a few other places.
> >>>>> modification done by script and it's no the scope of this patch
> >>>>
> >>>>
> >>>> That isn't an excuse to leave incorrect code there. It is a simple fix.
> >>> no (void) in c means you don't care of the return so basically it's right
> >>
> >>
> >> Because of the way the __raw_writel is defined you are casting the
> >> result of an assignment, basically you are doing this:
> >>
> >> int foo, bar;
> >>
> >> (void)(foo = bar);
> >>
> >> Which is pointless. Don't make excuses for silly, redundant code. Fix
> >> it, please.
> > except it's a read it has nothing to do with that
>
>
> It makes no difference, it is still equally pointless. We don't cast
> unused return values to void, for functions or assignments, in the kernel.
>
> It is pointless, superfluous code, and now is a really good opportunity
> to fix it. You can probably even make your script do it for you :-).
I do not want to do 2 thinks at the same time
[
if there is a need to o fix this, it must be done in other patch bisectable
Best Regards,
J.
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH 04/18] ARM: at91: make ST (System Timer) soc independent
2012-02-20 3:02 ` Jean-Christophe PLAGNIOL-VILLARD
2012-02-20 3:16 ` Ryan Mallon
@ 2012-02-20 7:33 ` Russell King - ARM Linux
2012-02-20 9:18 ` Jean-Christophe PLAGNIOL-VILLARD
1 sibling, 1 reply; 43+ messages in thread
From: Russell King - ARM Linux @ 2012-02-20 7:33 UTC (permalink / raw)
To: Jean-Christophe PLAGNIOL-VILLARD
Cc: Ryan Mallon, Nicolas Ferre, linux-kernel, linux-arm-kernel
On Mon, Feb 20, 2012 at 04:02:34AM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 12:52 Mon 20 Feb , Ryan Mallon wrote:
> > That isn't an excuse to leave incorrect code there. It is a simple fix.
> no (void) in c means you don't care of the return so basically it's right
Let's be clear: it's legal, but redundant and unnecessary.
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH 13/18] ARM: at91/rtc-at91sam9: pass the GPBR to use via ressources
2012-02-20 1:20 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2012-02-20 7:36 ` Russell King - ARM Linux
2012-02-20 9:16 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 1 reply; 43+ messages in thread
From: Russell King - ARM Linux @ 2012-02-20 7:36 UTC (permalink / raw)
To: Jean-Christophe PLAGNIOL-VILLARD
Cc: Ryan Mallon, Nicolas Ferre, linux-kernel, linux-arm-kernel
On Mon, Feb 20, 2012 at 02:20:10AM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 11:43 Mon 20 Feb , Ryan Mallon wrote:
> > On 18/02/12 04:50, Nicolas Ferre wrote:
> >
> > > From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> > >
> > > The GPBR registers are used for storing RTC values. The GPBR registers
> > > to use are now provided using standard resource entry. The array is
> > > filled in SoC specific code.
> > > rtc-at91sam9 RTT as RTC driver is modified to retrieve this information.
> > >
> > > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> > > Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> > > ---
> > > arch/arm/mach-at91/at91sam9260_devices.c | 10 +++++++-
> > > arch/arm/mach-at91/at91sam9261_devices.c | 8 ++++++-
> > > arch/arm/mach-at91/at91sam9263_devices.c | 16 +++++++++++--
> > > arch/arm/mach-at91/at91sam9g45_devices.c | 8 ++++++-
> > > arch/arm/mach-at91/at91sam9rl_devices.c | 8 ++++++-
> > > arch/arm/mach-at91/include/mach/at91sam9260.h | 5 +--
> > > arch/arm/mach-at91/include/mach/at91sam9261.h | 5 +--
> > > arch/arm/mach-at91/include/mach/at91sam9263.h | 5 +--
> > > arch/arm/mach-at91/include/mach/at91sam9g45.h | 5 +--
> > > arch/arm/mach-at91/include/mach/at91sam9rl.h | 2 +-
> > > drivers/rtc/rtc-at91sam9.c | 29 +++++++++++++++++++++---
> > > 11 files changed, 76 insertions(+), 25 deletions(-)
> > >
> > > diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
> > > index 2071017..ae2b648 100644
> > > --- a/arch/arm/mach-at91/at91sam9260_devices.c
> > > +++ b/arch/arm/mach-at91/at91sam9260_devices.c
> > > @@ -718,14 +718,16 @@ static struct resource rtt_resources[] = {
> > > .start = AT91SAM9260_BASE_RTT,
> > > .end = AT91SAM9260_BASE_RTT + SZ_16 - 1,
> > > .flags = IORESOURCE_MEM,
> > > - }
> > > + }, {
> > > + .flags = IORESOURCE_MEM,
> > > + },
> > > };
> > >
> > > static struct platform_device at91sam9260_rtt_device = {
> > > .name = "at91_rtt",
> > > .id = 0,
> > > .resource = rtt_resources,
> > > - .num_resources = ARRAY_SIZE(rtt_resources),
> > > + .num_resources = 1,
> >
> >
> > Why this change? The device has two resources, and the rtc driver
> > request both of them, so why are you saying there is only one resource
> > here. It either needs to be changed back to use ARRAY_SIZE, or needs a
> > comment explaining what magic is in use.
> because the number of resources depends on the user of rtt
> we must not hardcode the GPBR reg as this resource will be present only if the
> rtc-at91sam9 is enabled
Better would be to leave .num_resources uninitalized and set that
appropriately elsewhere when you make the decision whether GPBR is
present or not. That may help to avoid people trying to "fix" this
for you via static checking tools.
As Ryan mentions, a comment in the code would be a good idea too.
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH 13/18] ARM: at91/rtc-at91sam9: pass the GPBR to use via ressources
2012-02-20 7:36 ` Russell King - ARM Linux
@ 2012-02-20 9:16 ` Jean-Christophe PLAGNIOL-VILLARD
2012-02-20 10:04 ` Russell King - ARM Linux
0 siblings, 1 reply; 43+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-02-20 9:16 UTC (permalink / raw)
To: Russell King - ARM Linux
Cc: Ryan Mallon, Nicolas Ferre, linux-kernel, linux-arm-kernel
On 07:36 Mon 20 Feb , Russell King - ARM Linux wrote:
> On Mon, Feb 20, 2012 at 02:20:10AM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > On 11:43 Mon 20 Feb , Ryan Mallon wrote:
> > > On 18/02/12 04:50, Nicolas Ferre wrote:
> > >
> > > > From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> > > >
> > > > The GPBR registers are used for storing RTC values. The GPBR registers
> > > > to use are now provided using standard resource entry. The array is
> > > > filled in SoC specific code.
> > > > rtc-at91sam9 RTT as RTC driver is modified to retrieve this information.
> > > >
> > > > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> > > > Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> > > > ---
> > > > arch/arm/mach-at91/at91sam9260_devices.c | 10 +++++++-
> > > > arch/arm/mach-at91/at91sam9261_devices.c | 8 ++++++-
> > > > arch/arm/mach-at91/at91sam9263_devices.c | 16 +++++++++++--
> > > > arch/arm/mach-at91/at91sam9g45_devices.c | 8 ++++++-
> > > > arch/arm/mach-at91/at91sam9rl_devices.c | 8 ++++++-
> > > > arch/arm/mach-at91/include/mach/at91sam9260.h | 5 +--
> > > > arch/arm/mach-at91/include/mach/at91sam9261.h | 5 +--
> > > > arch/arm/mach-at91/include/mach/at91sam9263.h | 5 +--
> > > > arch/arm/mach-at91/include/mach/at91sam9g45.h | 5 +--
> > > > arch/arm/mach-at91/include/mach/at91sam9rl.h | 2 +-
> > > > drivers/rtc/rtc-at91sam9.c | 29 +++++++++++++++++++++---
> > > > 11 files changed, 76 insertions(+), 25 deletions(-)
> > > >
> > > > diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
> > > > index 2071017..ae2b648 100644
> > > > --- a/arch/arm/mach-at91/at91sam9260_devices.c
> > > > +++ b/arch/arm/mach-at91/at91sam9260_devices.c
> > > > @@ -718,14 +718,16 @@ static struct resource rtt_resources[] = {
> > > > .start = AT91SAM9260_BASE_RTT,
> > > > .end = AT91SAM9260_BASE_RTT + SZ_16 - 1,
> > > > .flags = IORESOURCE_MEM,
> > > > - }
> > > > + }, {
> > > > + .flags = IORESOURCE_MEM,
> > > > + },
> > > > };
> > > >
> > > > static struct platform_device at91sam9260_rtt_device = {
> > > > .name = "at91_rtt",
> > > > .id = 0,
> > > > .resource = rtt_resources,
> > > > - .num_resources = ARRAY_SIZE(rtt_resources),
> > > > + .num_resources = 1,
> > >
> > >
> > > Why this change? The device has two resources, and the rtc driver
> > > request both of them, so why are you saying there is only one resource
> > > here. It either needs to be changed back to use ARRAY_SIZE, or needs a
> > > comment explaining what magic is in use.
> > because the number of resources depends on the user of rtt
> > we must not hardcode the GPBR reg as this resource will be present only if the
> > rtc-at91sam9 is enabled
>
> Better would be to leave .num_resources uninitalized and set that
> appropriately elsewhere when you make the decision whether GPBR is
> present or not. That may help to avoid people trying to "fix" this
> for you via static checking tools.
>
> As Ryan mentions, a comment in the code would be a good idea too.
the comment is in the drivers code and Kconfig
and will be drop soon in favor of DT
Best Regards,
J.
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH 04/18] ARM: at91: make ST (System Timer) soc independent
2012-02-20 7:33 ` Russell King - ARM Linux
@ 2012-02-20 9:18 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 0 replies; 43+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-02-20 9:18 UTC (permalink / raw)
To: Russell King - ARM Linux
Cc: Ryan Mallon, Nicolas Ferre, linux-kernel, linux-arm-kernel
On 07:33 Mon 20 Feb , Russell King - ARM Linux wrote:
> On Mon, Feb 20, 2012 at 04:02:34AM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > On 12:52 Mon 20 Feb , Ryan Mallon wrote:
> > > That isn't an excuse to leave incorrect code there. It is a simple fix.
> > no (void) in c means you don't care of the return so basically it's right
>
> Let's be clear: it's legal, but redundant and unnecessary.
So as I said it's no the focus of this patch
I don't want to do it at the same time
Best Regards,
J.
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH 13/18] ARM: at91/rtc-at91sam9: pass the GPBR to use via ressources
2012-02-20 9:16 ` Jean-Christophe PLAGNIOL-VILLARD
@ 2012-02-20 10:04 ` Russell King - ARM Linux
2012-02-20 11:21 ` Nicolas Ferre
2012-02-20 14:45 ` [PATCH] ARM: at91/rtc-at91sam9: rework resources assignment Nicolas Ferre
0 siblings, 2 replies; 43+ messages in thread
From: Russell King - ARM Linux @ 2012-02-20 10:04 UTC (permalink / raw)
To: Jean-Christophe PLAGNIOL-VILLARD
Cc: Ryan Mallon, Nicolas Ferre, linux-kernel, linux-arm-kernel
On Mon, Feb 20, 2012 at 10:16:47AM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 07:36 Mon 20 Feb , Russell King - ARM Linux wrote:
> > On Mon, Feb 20, 2012 at 02:20:10AM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> > > On 11:43 Mon 20 Feb , Ryan Mallon wrote:
> > > > On 18/02/12 04:50, Nicolas Ferre wrote:
> > > >
> > > > > From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> > > > >
> > > > > The GPBR registers are used for storing RTC values. The GPBR registers
> > > > > to use are now provided using standard resource entry. The array is
> > > > > filled in SoC specific code.
> > > > > rtc-at91sam9 RTT as RTC driver is modified to retrieve this information.
> > > > >
> > > > > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> > > > > Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> > > > > ---
> > > > > arch/arm/mach-at91/at91sam9260_devices.c | 10 +++++++-
> > > > > arch/arm/mach-at91/at91sam9261_devices.c | 8 ++++++-
> > > > > arch/arm/mach-at91/at91sam9263_devices.c | 16 +++++++++++--
> > > > > arch/arm/mach-at91/at91sam9g45_devices.c | 8 ++++++-
> > > > > arch/arm/mach-at91/at91sam9rl_devices.c | 8 ++++++-
> > > > > arch/arm/mach-at91/include/mach/at91sam9260.h | 5 +--
> > > > > arch/arm/mach-at91/include/mach/at91sam9261.h | 5 +--
> > > > > arch/arm/mach-at91/include/mach/at91sam9263.h | 5 +--
> > > > > arch/arm/mach-at91/include/mach/at91sam9g45.h | 5 +--
> > > > > arch/arm/mach-at91/include/mach/at91sam9rl.h | 2 +-
> > > > > drivers/rtc/rtc-at91sam9.c | 29 +++++++++++++++++++++---
> > > > > 11 files changed, 76 insertions(+), 25 deletions(-)
> > > > >
> > > > > diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
> > > > > index 2071017..ae2b648 100644
> > > > > --- a/arch/arm/mach-at91/at91sam9260_devices.c
> > > > > +++ b/arch/arm/mach-at91/at91sam9260_devices.c
> > > > > @@ -718,14 +718,16 @@ static struct resource rtt_resources[] = {
> > > > > .start = AT91SAM9260_BASE_RTT,
> > > > > .end = AT91SAM9260_BASE_RTT + SZ_16 - 1,
> > > > > .flags = IORESOURCE_MEM,
> > > > > - }
> > > > > + }, {
> > > > > + .flags = IORESOURCE_MEM,
> > > > > + },
> > > > > };
> > > > >
> > > > > static struct platform_device at91sam9260_rtt_device = {
> > > > > .name = "at91_rtt",
> > > > > .id = 0,
> > > > > .resource = rtt_resources,
> > > > > - .num_resources = ARRAY_SIZE(rtt_resources),
> > > > > + .num_resources = 1,
> > > >
> > > >
> > > > Why this change? The device has two resources, and the rtc driver
> > > > request both of them, so why are you saying there is only one resource
> > > > here. It either needs to be changed back to use ARRAY_SIZE, or needs a
> > > > comment explaining what magic is in use.
> > > because the number of resources depends on the user of rtt
> > > we must not hardcode the GPBR reg as this resource will be present only if the
> > > rtc-at91sam9 is enabled
> >
> > Better would be to leave .num_resources uninitalized and set that
> > appropriately elsewhere when you make the decision whether GPBR is
> > present or not. That may help to avoid people trying to "fix" this
> > for you via static checking tools.
> >
> > As Ryan mentions, a comment in the code would be a good idea too.
> the comment is in the drivers code and Kconfig
Not good enough. It needs to explain at the at91sam9260_rtt_device
definition why there is a disparity between the number of resources
and the number in the device definition.
People running static checking tools or reading this code aren't going
to look in the Kconfig nor the corresponding driver source for this
information.
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH 13/18] ARM: at91/rtc-at91sam9: pass the GPBR to use via ressources
2012-02-20 10:04 ` Russell King - ARM Linux
@ 2012-02-20 11:21 ` Nicolas Ferre
2012-02-20 14:45 ` [PATCH] ARM: at91/rtc-at91sam9: rework resources assignment Nicolas Ferre
1 sibling, 0 replies; 43+ messages in thread
From: Nicolas Ferre @ 2012-02-20 11:21 UTC (permalink / raw)
To: Russell King - ARM Linux, Ryan Mallon
Cc: Jean-Christophe PLAGNIOL-VILLARD, linux-kernel, linux-arm-kernel
On 02/20/2012 11:04 AM, Russell King - ARM Linux :
> On Mon, Feb 20, 2012 at 10:16:47AM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
>> On 07:36 Mon 20 Feb , Russell King - ARM Linux wrote:
>>> On Mon, Feb 20, 2012 at 02:20:10AM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>>> On 11:43 Mon 20 Feb , Ryan Mallon wrote:
>>>>> On 18/02/12 04:50, Nicolas Ferre wrote:
>>>>>
>>>>>> From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
>>>>>>
>>>>>> The GPBR registers are used for storing RTC values. The GPBR registers
>>>>>> to use are now provided using standard resource entry. The array is
>>>>>> filled in SoC specific code.
>>>>>> rtc-at91sam9 RTT as RTC driver is modified to retrieve this information.
>>>>>>
>>>>>> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
>>>>>> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
>>>>>> ---
>>>>>> arch/arm/mach-at91/at91sam9260_devices.c | 10 +++++++-
>>>>>> arch/arm/mach-at91/at91sam9261_devices.c | 8 ++++++-
>>>>>> arch/arm/mach-at91/at91sam9263_devices.c | 16 +++++++++++--
>>>>>> arch/arm/mach-at91/at91sam9g45_devices.c | 8 ++++++-
>>>>>> arch/arm/mach-at91/at91sam9rl_devices.c | 8 ++++++-
>>>>>> arch/arm/mach-at91/include/mach/at91sam9260.h | 5 +--
>>>>>> arch/arm/mach-at91/include/mach/at91sam9261.h | 5 +--
>>>>>> arch/arm/mach-at91/include/mach/at91sam9263.h | 5 +--
>>>>>> arch/arm/mach-at91/include/mach/at91sam9g45.h | 5 +--
>>>>>> arch/arm/mach-at91/include/mach/at91sam9rl.h | 2 +-
>>>>>> drivers/rtc/rtc-at91sam9.c | 29 +++++++++++++++++++++---
>>>>>> 11 files changed, 76 insertions(+), 25 deletions(-)
>>>>>>
>>>>>> diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
>>>>>> index 2071017..ae2b648 100644
>>>>>> --- a/arch/arm/mach-at91/at91sam9260_devices.c
>>>>>> +++ b/arch/arm/mach-at91/at91sam9260_devices.c
>>>>>> @@ -718,14 +718,16 @@ static struct resource rtt_resources[] = {
>>>>>> .start = AT91SAM9260_BASE_RTT,
>>>>>> .end = AT91SAM9260_BASE_RTT + SZ_16 - 1,
>>>>>> .flags = IORESOURCE_MEM,
>>>>>> - }
>>>>>> + }, {
>>>>>> + .flags = IORESOURCE_MEM,
>>>>>> + },
>>>>>> };
>>>>>>
>>>>>> static struct platform_device at91sam9260_rtt_device = {
>>>>>> .name = "at91_rtt",
>>>>>> .id = 0,
>>>>>> .resource = rtt_resources,
>>>>>> - .num_resources = ARRAY_SIZE(rtt_resources),
>>>>>> + .num_resources = 1,
>>>>>
>>>>>
>>>>> Why this change? The device has two resources, and the rtc driver
>>>>> request both of them, so why are you saying there is only one resource
>>>>> here. It either needs to be changed back to use ARRAY_SIZE, or needs a
>>>>> comment explaining what magic is in use.
>>>> because the number of resources depends on the user of rtt
>>>> we must not hardcode the GPBR reg as this resource will be present only if the
>>>> rtc-at91sam9 is enabled
>>>
>>> Better would be to leave .num_resources uninitalized and set that
>>> appropriately elsewhere when you make the decision whether GPBR is
>>> present or not. That may help to avoid people trying to "fix" this
>>> for you via static checking tools.
>>>
>>> As Ryan mentions, a comment in the code would be a good idea too.
>> the comment is in the drivers code and Kconfig
>
> Not good enough. It needs to explain at the at91sam9260_rtt_device
> definition why there is a disparity between the number of resources
> and the number in the device definition.
>
> People running static checking tools or reading this code aren't going
> to look in the Kconfig nor the corresponding driver source for this
> information.
Absolutely, I am in favor of clear documentation.
Moreover, it seems that some lines of explanation have been lost during
the reworking process.
So, we cook another patch series now...
Best regards,
--
Nicolas Ferre
^ permalink raw reply [flat|nested] 43+ messages in thread
* [PATCH] ARM: at91/rtc-at91sam9: rework resources assignment
2012-02-20 10:04 ` Russell King - ARM Linux
2012-02-20 11:21 ` Nicolas Ferre
@ 2012-02-20 14:45 ` Nicolas Ferre
2012-02-20 15:06 ` Russell King - ARM Linux
2012-02-20 20:04 ` Ryan Mallon
1 sibling, 2 replies; 43+ messages in thread
From: Nicolas Ferre @ 2012-02-20 14:45 UTC (permalink / raw)
To: linux, rmallon, plagnioj; +Cc: linux-arm-kernel, linux-kernel, Nicolas Ferre
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
Russell, Ryan,
As I do think that these changes need explanation, here is my rework of Jean's
patch. I would like to know if the little comment and general rework of
resources assignment sound ok...
I plan to merge this patch with the one discussed previously:
"[PATCH 13/18] ARM: at91/rtc-at91sam9: pass the GPBR to use via ressources"
If you agree, I will repost the whole series afterwards.
arch/arm/mach-at91/at91sam9260_devices.c | 13 ++++++++++---
arch/arm/mach-at91/at91sam9261_devices.c | 13 ++++++++++---
arch/arm/mach-at91/at91sam9263_devices.c | 22 ++++++++++++++++------
arch/arm/mach-at91/at91sam9g45_devices.c | 13 ++++++++++---
arch/arm/mach-at91/at91sam9rl_devices.c | 13 ++++++++++---
5 files changed, 56 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index f8a88fb..df487ce 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -727,7 +727,6 @@ static struct platform_device at91sam9260_rtt_device = {
.name = "at91_rtt",
.id = 0,
.resource = rtt_resources,
- .num_resources = 1,
};
@@ -735,13 +734,21 @@ static struct platform_device at91sam9260_rtt_device = {
static void __init at91_add_device_rtt_rtc(void)
{
at91sam9260_rtt_device.name = "rtc-at91sam9";
- at91sam9260_rtt_device.num_resources++;
+ /*
+ * The second resource is needed:
+ * GPBR will serve as the storage for RTC time offset
+ */
+ at91sam9260_rtt_device.num_resources = 2;
rtt_resources[1].start = AT91SAM9260_BASE_GPBR +
4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
rtt_resources[1].end = rtt_resources[1].start + 3;
}
#else
-static void __init at91_add_device_rtt_rtc(void) {}
+static void __init at91_add_device_rtt_rtc(void)
+{
+ /* Only one resource is needed: RTT not used as RTC */
+ at91sam9260_rtt_device.num_resources = 1;
+}
#endif
static void __init at91_add_device_rtt(void)
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 32a20ef..3bd10ce 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -613,20 +613,27 @@ static struct platform_device at91sam9261_rtt_device = {
.name = "at91_rtt",
.id = 0,
.resource = rtt_resources,
- .num_resources = 1,
};
#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
static void __init at91_add_device_rtt_rtc(void)
{
at91sam9261_rtt_device.name = "rtc-at91sam9";
- at91sam9261_rtt_device.num_resources++;
+ /*
+ * The second resource is needed:
+ * GPBR will serve as the storage for RTC time offset
+ */
+ at91sam9261_rtt_device.num_resources = 2;
rtt_resources[1].start = AT91SAM9261_BASE_GPBR +
4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
rtt_resources[1].end = rtt_resources[1].start + 3;
}
#else
-static void __init at91_add_device_rtt_rtc(void) {}
+static void __init at91_add_device_rtt_rtc(void)
+{
+ /* Only one resource is needed: RTT not used as RTC */
+ at91sam9261_rtt_device.num_resources = 1;
+}
#endif
static void __init at91_add_device_rtt(void)
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 28cb074..7792de5 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -976,7 +976,6 @@ static struct platform_device at91sam9263_rtt0_device = {
.name = "at91_rtt",
.id = 0,
.resource = rtt0_resources,
- .num_resources = 1,
};
static struct resource rtt1_resources[] = {
@@ -993,7 +992,6 @@ static struct platform_device at91sam9263_rtt1_device = {
.name = "at91_rtt",
.id = 1,
.resource = rtt1_resources,
- .num_resources = 1,
};
#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
@@ -1004,26 +1002,38 @@ static void __init at91_add_device_rtt_rtc(void)
switch (CONFIG_RTC_DRV_AT91SAM9_RTT) {
case 0:
+ /*
+ * The second resource is needed only for the chosen RTT:
+ * GPBR will serve as the storage for RTC time offset
+ */
+ at91sam9263_rtt0_device.num_resources = 2;
+ at91sam9263_rtt1_device.num_resources = 1;
pdev = &at91sam9263_rtt0_device;
r = rtt0_resources;
break;
case 1:
+ at91sam9263_rtt0_device.num_resources = 1;
+ at91sam9263_rtt1_device.num_resources = 2;
pdev = &at91sam9263_rtt1_device;
r = rtt1_resources;
break;
default:
- pr_err("at91sam9263: support only 2 RTT (%d)\n",
+ pr_err("at91sam9263: only supports 2 RTT (%d)\n",
CONFIG_RTC_DRV_AT91SAM9_RTT);
return;
}
+ pdev->name = "rtc-at91sam9";
r[1].start = AT91SAM9263_BASE_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
r[1].end = r[1].start + 3;
- pdev->name = "rtc-at91sam9";
- pdev->num_resources++;
}
#else
-static void __init at91_add_device_rtt_rtc(void) {}
+static void __init at91_add_device_rtt_rtc(void)
+{
+ /* Only one resource is needed: RTT not used as RTC */
+ at91sam9263_rtt0_device.num_resources = 1;
+ at91sam9263_rtt1_device.num_resources = 1;
+}
#endif
static void __init at91_add_device_rtt(void)
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index bb7e2ce..4108295 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -1203,20 +1203,27 @@ static struct platform_device at91sam9g45_rtt_device = {
.name = "at91_rtt",
.id = 0,
.resource = rtt_resources,
- .num_resources = 1,
};
#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
static void __init at91_add_device_rtt_rtc(void)
{
at91sam9g45_rtt_device.name = "rtc-at91sam9";
- at91sam9g45_rtt_device.num_resources++;
+ /*
+ * The second resource is needed:
+ * GPBR will serve as the storage for RTC time offset
+ */
+ at91sam9g45_rtt_device.num_resources = 2;
rtt_resources[1].start = AT91SAM9G45_BASE_GPBR +
4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
rtt_resources[1].end = rtt_resources[1].start + 3;
}
#else
-static void __init at91_add_device_rtt_rtc(void) {}
+static void __init at91_add_device_rtt_rtc(void)
+{
+ /* Only one resource is needed: RTT not used as RTC */
+ at91sam9g45_rtt_device.num_resources = 1;
+}
#endif
static void __init at91_add_device_rtt(void)
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 16fd20b..eda72e8 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -692,20 +692,27 @@ static struct platform_device at91sam9rl_rtt_device = {
.name = "at91_rtt",
.id = 0,
.resource = rtt_resources,
- .num_resources = 1,
};
#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
static void __init at91_add_device_rtt_rtc(void)
{
at91sam9rl_rtt_device.name = "rtc-at91sam9";
- at91sam9rl_rtt_device.num_resources++;
+ /*
+ * The second resource is needed:
+ * GPBR will serve as the storage for RTC time offset
+ */
+ at91sam9rl_rtt_device.num_resources = 2;
rtt_resources[1].start = AT91SAM9RL_BASE_GPBR +
4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
rtt_resources[1].end = rtt_resources[1].start + 3;
}
#else
-static void __init at91_add_device_rtt_rtc(void) {}
+static void __init at91_add_device_rtt_rtc(void)
+{
+ /* Only one resource is needed: RTT not used as RTC */
+ at91sam9rl_rtt_device.num_resources = 1;
+}
#endif
static void __init at91_add_device_rtt(void)
--
1.7.9
^ permalink raw reply related [flat|nested] 43+ messages in thread
* Re: [PATCH] ARM: at91/rtc-at91sam9: rework resources assignment
2012-02-20 14:45 ` [PATCH] ARM: at91/rtc-at91sam9: rework resources assignment Nicolas Ferre
@ 2012-02-20 15:06 ` Russell King - ARM Linux
2012-02-20 20:04 ` Ryan Mallon
1 sibling, 0 replies; 43+ messages in thread
From: Russell King - ARM Linux @ 2012-02-20 15:06 UTC (permalink / raw)
To: Nicolas Ferre; +Cc: rmallon, plagnioj, linux-arm-kernel, linux-kernel
On Mon, Feb 20, 2012 at 03:45:42PM +0100, Nicolas Ferre wrote:
> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> ---
> Russell, Ryan,
>
> As I do think that these changes need explanation, here is my rework of Jean's
> patch. I would like to know if the little comment and general rework of
> resources assignment sound ok...
Nicolas, thanks for this.
This is way better by miles than Jean's patch, and shows how it should
have been done in the first place.
> I plan to merge this patch with the one discussed previously:
> "[PATCH 13/18] ARM: at91/rtc-at91sam9: pass the GPBR to use via ressources"
>
> If you agree, I will repost the whole series afterwards.
>
>
> arch/arm/mach-at91/at91sam9260_devices.c | 13 ++++++++++---
> arch/arm/mach-at91/at91sam9261_devices.c | 13 ++++++++++---
> arch/arm/mach-at91/at91sam9263_devices.c | 22 ++++++++++++++++------
> arch/arm/mach-at91/at91sam9g45_devices.c | 13 ++++++++++---
> arch/arm/mach-at91/at91sam9rl_devices.c | 13 ++++++++++---
> 5 files changed, 56 insertions(+), 18 deletions(-)
>
> diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
> index f8a88fb..df487ce 100644
> --- a/arch/arm/mach-at91/at91sam9260_devices.c
> +++ b/arch/arm/mach-at91/at91sam9260_devices.c
> @@ -727,7 +727,6 @@ static struct platform_device at91sam9260_rtt_device = {
> .name = "at91_rtt",
> .id = 0,
> .resource = rtt_resources,
> - .num_resources = 1,
> };
>
>
> @@ -735,13 +734,21 @@ static struct platform_device at91sam9260_rtt_device = {
> static void __init at91_add_device_rtt_rtc(void)
> {
> at91sam9260_rtt_device.name = "rtc-at91sam9";
> - at91sam9260_rtt_device.num_resources++;
> + /*
> + * The second resource is needed:
> + * GPBR will serve as the storage for RTC time offset
> + */
> + at91sam9260_rtt_device.num_resources = 2;
> rtt_resources[1].start = AT91SAM9260_BASE_GPBR +
> 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
> rtt_resources[1].end = rtt_resources[1].start + 3;
> }
> #else
> -static void __init at91_add_device_rtt_rtc(void) {}
> +static void __init at91_add_device_rtt_rtc(void)
> +{
> + /* Only one resource is needed: RTT not used as RTC */
> + at91sam9260_rtt_device.num_resources = 1;
> +}
> #endif
>
> static void __init at91_add_device_rtt(void)
> diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
> index 32a20ef..3bd10ce 100644
> --- a/arch/arm/mach-at91/at91sam9261_devices.c
> +++ b/arch/arm/mach-at91/at91sam9261_devices.c
> @@ -613,20 +613,27 @@ static struct platform_device at91sam9261_rtt_device = {
> .name = "at91_rtt",
> .id = 0,
> .resource = rtt_resources,
> - .num_resources = 1,
> };
>
> #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
> static void __init at91_add_device_rtt_rtc(void)
> {
> at91sam9261_rtt_device.name = "rtc-at91sam9";
> - at91sam9261_rtt_device.num_resources++;
> + /*
> + * The second resource is needed:
> + * GPBR will serve as the storage for RTC time offset
> + */
> + at91sam9261_rtt_device.num_resources = 2;
> rtt_resources[1].start = AT91SAM9261_BASE_GPBR +
> 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
> rtt_resources[1].end = rtt_resources[1].start + 3;
> }
> #else
> -static void __init at91_add_device_rtt_rtc(void) {}
> +static void __init at91_add_device_rtt_rtc(void)
> +{
> + /* Only one resource is needed: RTT not used as RTC */
> + at91sam9261_rtt_device.num_resources = 1;
> +}
> #endif
>
> static void __init at91_add_device_rtt(void)
> diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
> index 28cb074..7792de5 100644
> --- a/arch/arm/mach-at91/at91sam9263_devices.c
> +++ b/arch/arm/mach-at91/at91sam9263_devices.c
> @@ -976,7 +976,6 @@ static struct platform_device at91sam9263_rtt0_device = {
> .name = "at91_rtt",
> .id = 0,
> .resource = rtt0_resources,
> - .num_resources = 1,
> };
>
> static struct resource rtt1_resources[] = {
> @@ -993,7 +992,6 @@ static struct platform_device at91sam9263_rtt1_device = {
> .name = "at91_rtt",
> .id = 1,
> .resource = rtt1_resources,
> - .num_resources = 1,
> };
>
> #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
> @@ -1004,26 +1002,38 @@ static void __init at91_add_device_rtt_rtc(void)
>
> switch (CONFIG_RTC_DRV_AT91SAM9_RTT) {
> case 0:
> + /*
> + * The second resource is needed only for the chosen RTT:
> + * GPBR will serve as the storage for RTC time offset
> + */
> + at91sam9263_rtt0_device.num_resources = 2;
> + at91sam9263_rtt1_device.num_resources = 1;
> pdev = &at91sam9263_rtt0_device;
> r = rtt0_resources;
> break;
> case 1:
> + at91sam9263_rtt0_device.num_resources = 1;
> + at91sam9263_rtt1_device.num_resources = 2;
> pdev = &at91sam9263_rtt1_device;
> r = rtt1_resources;
> break;
> default:
> - pr_err("at91sam9263: support only 2 RTT (%d)\n",
> + pr_err("at91sam9263: only supports 2 RTT (%d)\n",
> CONFIG_RTC_DRV_AT91SAM9_RTT);
> return;
> }
>
> + pdev->name = "rtc-at91sam9";
> r[1].start = AT91SAM9263_BASE_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
> r[1].end = r[1].start + 3;
> - pdev->name = "rtc-at91sam9";
> - pdev->num_resources++;
> }
> #else
> -static void __init at91_add_device_rtt_rtc(void) {}
> +static void __init at91_add_device_rtt_rtc(void)
> +{
> + /* Only one resource is needed: RTT not used as RTC */
> + at91sam9263_rtt0_device.num_resources = 1;
> + at91sam9263_rtt1_device.num_resources = 1;
> +}
> #endif
>
> static void __init at91_add_device_rtt(void)
> diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
> index bb7e2ce..4108295 100644
> --- a/arch/arm/mach-at91/at91sam9g45_devices.c
> +++ b/arch/arm/mach-at91/at91sam9g45_devices.c
> @@ -1203,20 +1203,27 @@ static struct platform_device at91sam9g45_rtt_device = {
> .name = "at91_rtt",
> .id = 0,
> .resource = rtt_resources,
> - .num_resources = 1,
> };
>
> #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
> static void __init at91_add_device_rtt_rtc(void)
> {
> at91sam9g45_rtt_device.name = "rtc-at91sam9";
> - at91sam9g45_rtt_device.num_resources++;
> + /*
> + * The second resource is needed:
> + * GPBR will serve as the storage for RTC time offset
> + */
> + at91sam9g45_rtt_device.num_resources = 2;
> rtt_resources[1].start = AT91SAM9G45_BASE_GPBR +
> 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
> rtt_resources[1].end = rtt_resources[1].start + 3;
> }
> #else
> -static void __init at91_add_device_rtt_rtc(void) {}
> +static void __init at91_add_device_rtt_rtc(void)
> +{
> + /* Only one resource is needed: RTT not used as RTC */
> + at91sam9g45_rtt_device.num_resources = 1;
> +}
> #endif
>
> static void __init at91_add_device_rtt(void)
> diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
> index 16fd20b..eda72e8 100644
> --- a/arch/arm/mach-at91/at91sam9rl_devices.c
> +++ b/arch/arm/mach-at91/at91sam9rl_devices.c
> @@ -692,20 +692,27 @@ static struct platform_device at91sam9rl_rtt_device = {
> .name = "at91_rtt",
> .id = 0,
> .resource = rtt_resources,
> - .num_resources = 1,
> };
>
> #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
> static void __init at91_add_device_rtt_rtc(void)
> {
> at91sam9rl_rtt_device.name = "rtc-at91sam9";
> - at91sam9rl_rtt_device.num_resources++;
> + /*
> + * The second resource is needed:
> + * GPBR will serve as the storage for RTC time offset
> + */
> + at91sam9rl_rtt_device.num_resources = 2;
> rtt_resources[1].start = AT91SAM9RL_BASE_GPBR +
> 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
> rtt_resources[1].end = rtt_resources[1].start + 3;
> }
> #else
> -static void __init at91_add_device_rtt_rtc(void) {}
> +static void __init at91_add_device_rtt_rtc(void)
> +{
> + /* Only one resource is needed: RTT not used as RTC */
> + at91sam9rl_rtt_device.num_resources = 1;
> +}
> #endif
>
> static void __init at91_add_device_rtt(void)
> --
> 1.7.9
>
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH] ARM: at91/rtc-at91sam9: rework resources assignment
2012-02-20 14:45 ` [PATCH] ARM: at91/rtc-at91sam9: rework resources assignment Nicolas Ferre
2012-02-20 15:06 ` Russell King - ARM Linux
@ 2012-02-20 20:04 ` Ryan Mallon
1 sibling, 0 replies; 43+ messages in thread
From: Ryan Mallon @ 2012-02-20 20:04 UTC (permalink / raw)
To: Nicolas Ferre; +Cc: linux, plagnioj, linux-arm-kernel, linux-kernel
On 21/02/12 01:45, Nicolas Ferre wrote:
> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> ---
> Russell, Ryan,
>
> As I do think that these changes need explanation, here is my rework of Jean's
> patch. I would like to know if the little comment and general rework of
> resources assignment sound ok...
>
> I plan to merge this patch with the one discussed previously:
> "[PATCH 13/18] ARM: at91/rtc-at91sam9: pass the GPBR to use via ressources"
Thanks Nicolas,
Reviewed-by: Ryan Mallon <rmallon@gmail.com>
> If you agree, I will repost the whole series afterwards.
>
>
> arch/arm/mach-at91/at91sam9260_devices.c | 13 ++++++++++---
> arch/arm/mach-at91/at91sam9261_devices.c | 13 ++++++++++---
> arch/arm/mach-at91/at91sam9263_devices.c | 22 ++++++++++++++++------
> arch/arm/mach-at91/at91sam9g45_devices.c | 13 ++++++++++---
> arch/arm/mach-at91/at91sam9rl_devices.c | 13 ++++++++++---
> 5 files changed, 56 insertions(+), 18 deletions(-)
>
> diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
> index f8a88fb..df487ce 100644
> --- a/arch/arm/mach-at91/at91sam9260_devices.c
> +++ b/arch/arm/mach-at91/at91sam9260_devices.c
> @@ -727,7 +727,6 @@ static struct platform_device at91sam9260_rtt_device = {
> .name = "at91_rtt",
> .id = 0,
> .resource = rtt_resources,
> - .num_resources = 1,
> };
>
>
> @@ -735,13 +734,21 @@ static struct platform_device at91sam9260_rtt_device = {
> static void __init at91_add_device_rtt_rtc(void)
> {
> at91sam9260_rtt_device.name = "rtc-at91sam9";
> - at91sam9260_rtt_device.num_resources++;
> + /*
> + * The second resource is needed:
> + * GPBR will serve as the storage for RTC time offset
> + */
> + at91sam9260_rtt_device.num_resources = 2;
> rtt_resources[1].start = AT91SAM9260_BASE_GPBR +
> 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
> rtt_resources[1].end = rtt_resources[1].start + 3;
> }
> #else
> -static void __init at91_add_device_rtt_rtc(void) {}
> +static void __init at91_add_device_rtt_rtc(void)
> +{
> + /* Only one resource is needed: RTT not used as RTC */
> + at91sam9260_rtt_device.num_resources = 1;
> +}
> #endif
>
> static void __init at91_add_device_rtt(void)
> diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
> index 32a20ef..3bd10ce 100644
> --- a/arch/arm/mach-at91/at91sam9261_devices.c
> +++ b/arch/arm/mach-at91/at91sam9261_devices.c
> @@ -613,20 +613,27 @@ static struct platform_device at91sam9261_rtt_device = {
> .name = "at91_rtt",
> .id = 0,
> .resource = rtt_resources,
> - .num_resources = 1,
> };
>
> #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
> static void __init at91_add_device_rtt_rtc(void)
> {
> at91sam9261_rtt_device.name = "rtc-at91sam9";
> - at91sam9261_rtt_device.num_resources++;
> + /*
> + * The second resource is needed:
> + * GPBR will serve as the storage for RTC time offset
> + */
> + at91sam9261_rtt_device.num_resources = 2;
> rtt_resources[1].start = AT91SAM9261_BASE_GPBR +
> 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
> rtt_resources[1].end = rtt_resources[1].start + 3;
> }
> #else
> -static void __init at91_add_device_rtt_rtc(void) {}
> +static void __init at91_add_device_rtt_rtc(void)
> +{
> + /* Only one resource is needed: RTT not used as RTC */
> + at91sam9261_rtt_device.num_resources = 1;
> +}
> #endif
>
> static void __init at91_add_device_rtt(void)
> diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
> index 28cb074..7792de5 100644
> --- a/arch/arm/mach-at91/at91sam9263_devices.c
> +++ b/arch/arm/mach-at91/at91sam9263_devices.c
> @@ -976,7 +976,6 @@ static struct platform_device at91sam9263_rtt0_device = {
> .name = "at91_rtt",
> .id = 0,
> .resource = rtt0_resources,
> - .num_resources = 1,
> };
>
> static struct resource rtt1_resources[] = {
> @@ -993,7 +992,6 @@ static struct platform_device at91sam9263_rtt1_device = {
> .name = "at91_rtt",
> .id = 1,
> .resource = rtt1_resources,
> - .num_resources = 1,
> };
>
> #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
> @@ -1004,26 +1002,38 @@ static void __init at91_add_device_rtt_rtc(void)
>
> switch (CONFIG_RTC_DRV_AT91SAM9_RTT) {
> case 0:
> + /*
> + * The second resource is needed only for the chosen RTT:
> + * GPBR will serve as the storage for RTC time offset
> + */
> + at91sam9263_rtt0_device.num_resources = 2;
> + at91sam9263_rtt1_device.num_resources = 1;
> pdev = &at91sam9263_rtt0_device;
> r = rtt0_resources;
> break;
> case 1:
> + at91sam9263_rtt0_device.num_resources = 1;
> + at91sam9263_rtt1_device.num_resources = 2;
> pdev = &at91sam9263_rtt1_device;
> r = rtt1_resources;
> break;
> default:
> - pr_err("at91sam9263: support only 2 RTT (%d)\n",
> + pr_err("at91sam9263: only supports 2 RTT (%d)\n",
> CONFIG_RTC_DRV_AT91SAM9_RTT);
> return;
> }
>
> + pdev->name = "rtc-at91sam9";
> r[1].start = AT91SAM9263_BASE_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
> r[1].end = r[1].start + 3;
> - pdev->name = "rtc-at91sam9";
> - pdev->num_resources++;
> }
> #else
> -static void __init at91_add_device_rtt_rtc(void) {}
> +static void __init at91_add_device_rtt_rtc(void)
> +{
> + /* Only one resource is needed: RTT not used as RTC */
> + at91sam9263_rtt0_device.num_resources = 1;
> + at91sam9263_rtt1_device.num_resources = 1;
> +}
> #endif
>
> static void __init at91_add_device_rtt(void)
> diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
> index bb7e2ce..4108295 100644
> --- a/arch/arm/mach-at91/at91sam9g45_devices.c
> +++ b/arch/arm/mach-at91/at91sam9g45_devices.c
> @@ -1203,20 +1203,27 @@ static struct platform_device at91sam9g45_rtt_device = {
> .name = "at91_rtt",
> .id = 0,
> .resource = rtt_resources,
> - .num_resources = 1,
> };
>
> #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
> static void __init at91_add_device_rtt_rtc(void)
> {
> at91sam9g45_rtt_device.name = "rtc-at91sam9";
> - at91sam9g45_rtt_device.num_resources++;
> + /*
> + * The second resource is needed:
> + * GPBR will serve as the storage for RTC time offset
> + */
> + at91sam9g45_rtt_device.num_resources = 2;
> rtt_resources[1].start = AT91SAM9G45_BASE_GPBR +
> 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
> rtt_resources[1].end = rtt_resources[1].start + 3;
> }
> #else
> -static void __init at91_add_device_rtt_rtc(void) {}
> +static void __init at91_add_device_rtt_rtc(void)
> +{
> + /* Only one resource is needed: RTT not used as RTC */
> + at91sam9g45_rtt_device.num_resources = 1;
> +}
> #endif
>
> static void __init at91_add_device_rtt(void)
> diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
> index 16fd20b..eda72e8 100644
> --- a/arch/arm/mach-at91/at91sam9rl_devices.c
> +++ b/arch/arm/mach-at91/at91sam9rl_devices.c
> @@ -692,20 +692,27 @@ static struct platform_device at91sam9rl_rtt_device = {
> .name = "at91_rtt",
> .id = 0,
> .resource = rtt_resources,
> - .num_resources = 1,
> };
>
> #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
> static void __init at91_add_device_rtt_rtc(void)
> {
> at91sam9rl_rtt_device.name = "rtc-at91sam9";
> - at91sam9rl_rtt_device.num_resources++;
> + /*
> + * The second resource is needed:
> + * GPBR will serve as the storage for RTC time offset
> + */
> + at91sam9rl_rtt_device.num_resources = 2;
> rtt_resources[1].start = AT91SAM9RL_BASE_GPBR +
> 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
> rtt_resources[1].end = rtt_resources[1].start + 3;
> }
> #else
> -static void __init at91_add_device_rtt_rtc(void) {}
> +static void __init at91_add_device_rtt_rtc(void)
> +{
> + /* Only one resource is needed: RTT not used as RTC */
> + at91sam9rl_rtt_device.num_resources = 1;
> +}
> #endif
>
> static void __init at91_add_device_rtt(void)
^ permalink raw reply [flat|nested] 43+ messages in thread
end of thread, other threads:[~2012-02-20 20:03 UTC | newest]
Thread overview: 43+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-02-17 17:49 [PATCH 00/18] at91 first cleanup series for 3.4 Nicolas Ferre
2012-02-17 17:49 ` [PATCH 01/18] ARM: at91: factorise duplicated at91sam9 idle Nicolas Ferre
2012-02-17 17:49 ` [PATCH 02/18] ARM: at91/at91x40: remove use of at91_sys_read/write Nicolas Ferre
2012-02-17 17:49 ` [PATCH 03/18] ARM: at91: make matrix register base soc independent Nicolas Ferre
2012-02-17 17:49 ` [PATCH 04/18] ARM: at91: make ST (System Timer) " Nicolas Ferre
2012-02-20 0:22 ` Ryan Mallon
2012-02-20 1:38 ` Jean-Christophe PLAGNIOL-VILLARD
2012-02-20 1:52 ` Ryan Mallon
2012-02-20 3:02 ` Jean-Christophe PLAGNIOL-VILLARD
2012-02-20 3:16 ` Ryan Mallon
2012-02-20 3:23 ` Jean-Christophe PLAGNIOL-VILLARD
2012-02-20 3:48 ` Ryan Mallon
2012-02-20 3:49 ` Jean-Christophe PLAGNIOL-VILLARD
2012-02-20 7:33 ` Russell King - ARM Linux
2012-02-20 9:18 ` Jean-Christophe PLAGNIOL-VILLARD
2012-02-17 17:49 ` [PATCH 05/18] ARM: at91/pm_slowclock: rename register to named define Nicolas Ferre
2012-02-17 17:49 ` [PATCH 06/18] ARM: at91/pm_slowclock: function slow_clock() accepts parameters Nicolas Ferre
2012-02-17 17:49 ` [PATCH 07/18] ARM: at91: move at91rm9200 sdramc defines to at91rm9200_sdramc.h Nicolas Ferre
2012-02-17 17:50 ` [PATCH 08/18] ARM: at91: make sdram/ddr register base soc independent Nicolas Ferre
2012-02-17 17:50 ` [PATCH 09/18] ARM: at91/pm_slowclock: add runtime detection of memory contoller Nicolas Ferre
2012-02-17 17:50 ` [PATCH 10/18] ARM: at91/PMC: make register base soc independent Nicolas Ferre
2012-02-20 0:27 ` Ryan Mallon
2012-02-17 17:50 ` [PATCH 11/18] ARM: at91/rtc-at91sam9: each SoC can select the RTT device to use Nicolas Ferre
2012-02-20 0:32 ` Ryan Mallon
2012-02-20 1:25 ` Jean-Christophe PLAGNIOL-VILLARD
2012-02-17 17:50 ` [PATCH 12/18] ARM: at91:rtc/rtc-at91sam9: ioremap register bank Nicolas Ferre
2012-02-17 17:50 ` [PATCH 13/18] ARM: at91/rtc-at91sam9: pass the GPBR to use via ressources Nicolas Ferre
2012-02-20 0:43 ` Ryan Mallon
2012-02-20 1:20 ` Jean-Christophe PLAGNIOL-VILLARD
2012-02-20 7:36 ` Russell King - ARM Linux
2012-02-20 9:16 ` Jean-Christophe PLAGNIOL-VILLARD
2012-02-20 10:04 ` Russell King - ARM Linux
2012-02-20 11:21 ` Nicolas Ferre
2012-02-20 14:45 ` [PATCH] ARM: at91/rtc-at91sam9: rework resources assignment Nicolas Ferre
2012-02-20 15:06 ` Russell King - ARM Linux
2012-02-20 20:04 ` Ryan Mallon
2012-02-17 17:50 ` [PATCH 14/18] ARM: at91: finally drop at91_sys_read/write Nicolas Ferre
2012-02-17 17:50 ` [PATCH 15/18] ARM: at91: merge SRAM Memory banks thanks to mirroring Nicolas Ferre
2012-02-17 17:50 ` [PATCH 16/18] Atmel: move console default platform_device to serial driver Nicolas Ferre
2012-02-18 9:17 ` Hans-Christian Egtvedt
2012-02-19 7:07 ` Jean-Christophe PLAGNIOL-VILLARD
2012-02-17 17:50 ` [PATCH 17/18] ARM: at91/board-dt: drop default console Nicolas Ferre
2012-02-17 17:50 ` [PATCH 18/18] ARM: at91/board-dt: move at91_initialize() to init_irq() Nicolas Ferre
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