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Date: Tue, 3 Apr 2012 09:53:20 -0700
From: Chris Wright <chrisw@sous-sol.org>
To: Ivo Sieben <meltedpianoman@gmail.com>
Cc: linux-kernel@vger.kernel.org, Wolfram Sang <w.sang@pengutronix.de>,
        Jean Delvare <khali@linux-fr.org>,
        Kevin Hilman <khilman@deeprootsystems.com>,
        Chris Wright <chrisw@sous-sol.org>
Subject: Re: [PATCH-v3] Support M95040 SPI EEPROM
Message-ID: <20120403165320.GG19952@sequoia.sous-sol.org>
References: <1333434302-14897-1-git-send-email-meltedpianoman@gmail.com>
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* Ivo Sieben (meltedpianoman@gmail.com) wrote:
> +	instr = AT25_READ;
> +	if (at25->chip.flags & EE_INSTR_BIT3_IS_ADDR)
> +		if (offset >= (1U << (at25->addrlen * 8)))
> +			instr |= AT25_INSTR_BIT3;
> +	*cp++ = instr;
<snip>
> +	/*
> +	 * Certain EEPROMS have a size that is larger than the number of address
> +	 * bytes would allow (e.g. like M95040 from ST that has 512 Byte size
> +	 * but uses only one address byte (A0 to A7) for addressing.) For
> +	 * the extra address bit (A8, A16 or A24) bit 3 of the instruction byte
> +	 * is used. This instruction bit is normally defined as don't care for
> +	 * other AT25 like chips.
> +	 */
> +#define EE_INSTR_BIT3_IS_ADDR	0x0010

Is there some guarantee that this chip flag will always have this
meaning?

thanks,
-chris