From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: Jiri Slaby <jslaby@suse.cz>
Cc: Chris Wilson <chris@chris-wilson.co.uk>,
Jiri Slaby <jirislaby@gmail.com>,
LKML <linux-kernel@vger.kernel.org>,
dri-devel@lists.freedesktop.org
Subject: Re: i915_driver_irq_handler: irq 42: nobody cared
Date: Tue, 10 Apr 2012 09:26:19 -0700 [thread overview]
Message-ID: <20120410092619.26a15165@jbarnes-desktop> (raw)
In-Reply-To: <4F83F3B5.8080704@suse.cz>
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On Tue, 10 Apr 2012 10:47:49 +0200
Jiri Slaby <jslaby@suse.cz> wrote:
> On 04/09/2012 07:11 PM, Jesse Barnes wrote:
> > On Fri, 30 Mar 2012 11:45:43 +0100 Chris Wilson
> > <chris@chris-wilson.co.uk> wrote:
> >
> >> On Fri, 30 Mar 2012 11:59:28 +0200, Jiri Slaby <jslaby@suse.cz>
> >> wrote:
> >>> I don't know what to dump more, because iir is obviously zero
> >>> too. What other sources of interrupts are on the (G33) chip?
> >>
> >> IIR is the master interrupt, with chained secondary interrupt
> >> statuses. If IIR is 0, the interrupt wasn't raised by the GPU.
> >
> > I've actually seen cases where one of the PIPE*STAT regs is stuck,
> > and even if IIR is 0 we still get interrupts... Jiri can you verify
> > the PIPE*STAT regs have bits set, maybe one or more we don't check
> > for?
>
> Note that I already attached their contents... This is what is in them
> (pipes 0 and 1):
> [ 3572.968581] i915_driver_irq_handler: 0=00000000 1=00000000
> [ 3572.977472] i915_driver_irq_handler: 0=00000000 1=00000000
> [ 3576.224839] i915_driver_irq_handler: 0=00000000 1=00000000
> [ 3576.243558] i915_driver_irq_handler: 0=00000000 1=00000000
> [ 3576.384912] i915_driver_irq_handler: 0=00000000 1=00000000
> [ 3576.403462] i915_driver_irq_handler: 0=00000000 1=00000000
> [ 3577.464100] i915_driver_irq_handler: 0=00000000 1=00000000
> [ 3577.477383] i915_driver_irq_handler: 0=00000000 1=00000000
> [ 3577.829016] i915_driver_irq_handler: 0=00020000 1=00000000
> [ 3577.830093] i915_driver_irq_handler: 0=00020000 1=00000000
>
> I.e. the handler is called when IIR=0 and both pipe stats are 0.
Oh sorry missed the PIPE*STAT, I thought it was IMR or something, I
should have read more closely.
So port hotplug is always reporting that port C has a hotplug interrupt
though... If you write 0x3 back to it does the interrupt stop?
--
Jesse Barnes, Intel Open Source Technology Center
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next prev parent reply other threads:[~2012-04-10 16:26 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <4F717CE3.4040206@suse.cz>
2012-03-27 8:42 ` i915_driver_irq_handler: irq 42: nobody cared Jiri Slaby
2012-03-30 9:59 ` Jiri Slaby
2012-03-30 10:45 ` Chris Wilson
2012-03-30 12:11 ` Jiri Slaby
2012-03-30 12:24 ` Chris Wilson
2012-04-06 21:31 ` i915_driver_irq_handler: irq 42: nobody cared [generic IRQ handling broken?] Jiri Slaby
2012-04-06 22:40 ` Thomas Gleixner
2012-04-09 17:12 ` Jesse Barnes
2012-04-09 17:52 ` Dave Airlie
2012-04-10 8:44 ` Jiri Slaby
2012-04-10 8:50 ` Daniel Vetter
2012-04-10 8:52 ` i915_driver_irq_handler: irq 42: nobody cared Jiri Slaby
2012-04-10 16:50 ` Marcin Slusarz
2012-04-09 17:11 ` Jesse Barnes
2012-04-10 8:47 ` Jiri Slaby
2012-04-10 8:58 ` Daniel Vetter
2012-04-10 9:48 ` Jiri Slaby
2012-04-10 16:26 ` Jesse Barnes [this message]
2012-04-10 18:11 ` Jiri Slaby
2012-04-10 18:34 ` Jesse Barnes
2012-04-10 19:52 ` Jiri Slaby
2012-04-10 20:32 ` Daniel Vetter
2012-04-10 20:34 ` Jesse Barnes
2012-04-11 10:40 ` Daniel Vetter
2012-05-03 19:56 ` Jiri Slaby
2012-05-03 21:15 ` Daniel Vetter
2012-05-03 21:16 ` Jiri Slaby
2012-05-03 21:54 ` Jesse Barnes
2012-05-03 23:15 ` Ben Widawsky
2012-04-11 6:29 ` Michel Dänzer
2012-04-11 16:03 ` Jesse Barnes
[not found] ` <20120327085749.GE4276@phenom.ffwll.local>
2012-03-27 10:54 ` Jiri Slaby
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