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From: Borislav Petkov <bp@alien8.de>
To: George Spelvin <linux@horizon.com>
Cc: linux-kernel@vger.kernel.org, Ma Ling <ling.ma@intel.com>,
	x86@kernel.org
Subject: Re: [PATCH RFC 2/2] [x86] Optimize copy_page by re-arranging instruction sequence and saving register
Date: Sat, 13 Oct 2012 01:17:19 +0200	[thread overview]
Message-ID: <20121012231719.GA21198@liondog.tnic> (raw)
In-Reply-To: <20121012210257.11451.qmail@science.horizon.com>

On Fri, Oct 12, 2012 at 05:02:57PM -0400, George Spelvin wrote:
> Here are some Phenom results for that benchmark.  The average time
> increases from 700 to 760 cycles (+8.6%).

I was afraid something like that would show up.

Btw, in looking at this more and IINM, we use the REP MOVSQ version on
AMD anyway because of X86_FEATURE_REP_GOOD being set on some K8 and
everything from F10h on.

So, actually this µbenchmark should be comparing the REP MOVSQ case too
and the changes to the unrolled copy_page shouldn't concern AMD boxes
actually...

Hmm.

-- 
Regards/Gruss,
    Boris.

  reply	other threads:[~2012-10-12 23:17 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-12 21:02 [PATCH RFC 2/2] [x86] Optimize copy_page by re-arranging instruction sequence and saving register George Spelvin
2012-10-12 23:17 ` Borislav Petkov [this message]
  -- strict thread matches above, loose matches on Subject: below --
2012-10-11 12:29 ling.ma
2012-10-11 13:40 ` Andi Kleen
2012-10-12  3:10   ` Ma, Ling
2012-10-12 13:35     ` Andi Kleen
2012-10-12 14:54       ` Ma, Ling
2012-10-12 15:14         ` Andi Kleen
2012-10-11 14:35 ` Konrad Rzeszutek Wilk
2012-10-12  3:37   ` Ma, Ling
2012-10-12  6:18     ` Borislav Petkov
2012-10-12  9:07       ` Ma, Ling
2012-10-12 18:04         ` Borislav Petkov
2012-10-14 10:58           ` Borislav Petkov
2012-10-15  5:00             ` Ma, Ling
2012-10-15  5:13             ` George Spelvin

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