From: Robert Richter <rric@kernel.org>
To: Jacob Shin <jacob.shin@amd.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>,
Paul Mackerras <paulus@samba.org>, Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@ghostprotocols.net>,
Thomas Gleixner <tglx@linutronix.de>,
"H. Peter Anvin" <hpa@zytor.com>,
Stephane Eranian <eranian@google.com>,
x86@kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 4/4] perf, amd: Enable northbridge performance counters on AMD family 15h
Date: Sun, 18 Nov 2012 17:35:22 +0100 [thread overview]
Message-ID: <20121118163522.GU2504@rric.localhost> (raw)
In-Reply-To: <20121116190030.GA21468@jshin-Toonie>
On 16.11.12 13:00:30, Jacob Shin wrote:
> > > static int setup_event_constraints(void)
> > > {
> > > - if (boot_cpu_data.x86 >= 0x15)
> > > + if (boot_cpu_data.x86 == 0x15)
> > > x86_pmu.get_event_constraints = amd_get_event_constraints_f15h;
> >
> > Since this does not cover family 16h anymore, you also need to extend
> > amd_get_event_ constraints() to setup nb counters with __amd_get_nb_
> > event_constraints() if cpu_has_perfctr_nb is set.
>
> Yes family 16h will be covered by a separate patch at a later date.
This is fine, if functionality is added later. But If you run the
patch as it is on family 16h, you need to make sure nb counters are
not enabled at all. This is not the case since you have several checks
for cpu_has_perfctr_nb. This code must also run on family 16h as it
is, thus you need strictly disable nb counters in this case, or enable
it.
-Robert
next prev parent reply other threads:[~2012-11-18 16:35 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-11-15 21:31 [PATCH V2 0/4] perf, amd: Enable AMD family 15h northbridge counters Jacob Shin
2012-11-15 21:31 ` [PATCH 1/4] perf, amd: Rework northbridge event constraints handler Jacob Shin
2012-11-15 21:31 ` [PATCH 2/4] perf, amd: Generalize northbridge constraints code for family 15h Jacob Shin
2012-11-15 21:31 ` [PATCH 3/4] perf, x86: Move MSR address offset calculation to architecture specific files Jacob Shin
2012-11-15 21:31 ` [PATCH 4/4] perf, amd: Enable northbridge performance counters on AMD family 15h Jacob Shin
2012-11-16 18:43 ` Robert Richter
2012-11-16 19:00 ` Jacob Shin
2012-11-16 19:32 ` Robert Richter
2012-11-16 21:57 ` Jacob Shin
2012-11-26 12:15 ` Robert Richter
2012-11-28 17:42 ` Jacob Shin
2012-11-18 16:35 ` Robert Richter [this message]
2012-11-15 21:40 ` [PATCH V2 0/4] perf, amd: Enable AMD family 15h northbridge counters Jacob Shin
-- strict thread matches above, loose matches on Subject: below --
2012-11-10 1:01 [PATCH " Jacob Shin
2012-11-10 1:01 ` [PATCH 4/4] perf, amd: Enable northbridge performance counters on AMD family 15h Jacob Shin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20121118163522.GU2504@rric.localhost \
--to=rric@kernel.org \
--cc=a.p.zijlstra@chello.nl \
--cc=acme@ghostprotocols.net \
--cc=eranian@google.com \
--cc=hpa@zytor.com \
--cc=jacob.shin@amd.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=paulus@samba.org \
--cc=tglx@linutronix.de \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).